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In this paper, we for the first time demonstrate the analog performance of a block-oxide structure in polycrystalline silicon thin-film transistor with source/drain-tie and additional poly-Si body (BO-SDT-APSB TFT) experimentally and compared with the similar device with zero block-oxide structure (SDT-APSB TFT). The block-oxide in BOSDT-SDT-APSB TFT is fabricated to reduce the drain-induced barrier lowering and channel-length modulation. The source-drain tie and additional poly-silicon body region are fabricated in both devices to improve the device performance and reduce the self-heating effect. Experimental results show that the block-oxide structure can offer enhanced gate controllability over the channel, and the transconductance (gm) of the BO-SDT-APSB TFT is therefore improved. In addition, although a higher drain conductance (gd), implying a lower output resistance r0, is observed for a BO-SDT-APSB TFT, the enhanced gm still helps to achieve the desired intrinsic voltage gain (Av = gm/gd ) behavior. [ABSTRACT FROM AUTHOR]

We demonstrate improved device performance by applying oxide sidewall spacer technology to a block-oxide-enclosed Si body to create a fully depleted silicon-on-insulator (FDSOI) nMOSFET, which overcomes the need for a uniform ultrathin silicon film. The presence of block-oxide along the sidewalls of the Si body significantly reduces the influence of drain bias over the channel. The proposed FDSOI structure therefore outperforms conventional FDSOI with regard to its drain-induced barrier lowering (DIBL), on/off current ratio, subthreshold swing, and threshold voltage rolloff. The new FDSOI structure is in fact shown to behave similarly to an ultrathin body (UTB) SOI but without the associated disadvantages and technological challenges of the ultrathin film, because a thick Si body allows for reduced sensitivity to self-heating, thereby improving thermal stability. [ABSTRACT FROM AUTHOR]

A novel device architecture-the self-aligned Π-shaped source/drain (S/D) ultrathin silicon-on-insulator (UTSOI) FET-is presented for the first time in the field of silicon-on-insulator (SOI) technology; this new device demonstrates how to decrease the self-heating effects in the SOI-based devices. Two-dimensional simulations show that the cost of building an S/D tie into the UTSOI-FET is a modest degradation of the short-channel characteristics including drain-induced barrier lowering (DIBL) and subthreshold swing (SS), when compared with a traditional UTSOI-FET. This degradation occurs because the S/D-tied scheme introduces two additional pathways between the S/D regions and the silicon substrate, thereby reducing the gate's ability to control the channel. Yet, the results presented here show these negative effects to be reasonably small (e.g., DIBL < 90 mV/V and SS < 100 mV/dec), whereas the positive effect of reduced self-induced heating is substantial and significantly improves device reliability. [ABSTRACT FROM AUTHOR]

An original blocking technology is proposed for improving the short-channel characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs). In particular, two types of modified devices called poly-Si TFT with block oxide and poly-Si on partial insulator (POPI)-TFT are designed for the first time in this field to enhance device performance. The proposed TFT structures can significantly reduce short-channel effects when compared with a thick source/drain (SID) poly-Si TFT (i.e., the fully depleted TFT). In addition, an ultrathin (UT) S/D structure (UT-TFT) is designed to verify that the block oxide TFT devices do achieve improved performance without needing the thin active layers and ultrashallow junction depth. Also, the POPI-TFT is found to reduce the thermal instability through its natural body-tied scheme. [ABSTRACT FROM AUTHOR]

In this paper, the influence of block oxide width (WBO) variations on a newly designed 40-nm gate-length silicon-on-partial-insulator field-effect transistor with block oxide (bSPIFET) was demonstrated and characterized. By utilizing the block oxide (BO) enclosing the sidewall of the Si body, the charge sharing from the source/drain (S/D) regions for a bSPIFET can be significantly reduced. Essentially, because the BO is adopted for a bSPIFET, its ultrashort-channel characteristics are similar to an ultrathin-body silicon-on-insulator (UTBSOI), although it possesses a thicker S/D region than a UTBSOI. From the simulation tests, it was also found that although the wider BO can suppress the ultrashort-channel effects (USCEs), the drain ON-state current ION slightly decreases because certain areas of the S/D are occupied by BO. Despite this problem, the bSPIFET still exhibits a good USCE control and a high-drive current. In addition, the self-heating effects are also ameliorated as a result of the natural body-tied scheme. [ABSTRACT FROM AUTHOR]