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The binding correlation between electrocatalyst and lithium polysulfides (LiPSs) determines the regulation of LiPSs' redox conversion. However, how the correlation works on the LiPSs under voltage remains obscured. In this paper, the π‐conjugated aromatic pyridyl porphyrin with nitrogen of a lone pair of electrons is introduced as electrocatalyst to accelerate redox kinetics and inhibit polysulfides shuttle. On the foundation of DFT calculation and experimental tests, it is stated that the chemical binding between pyridyl porphyrin and lithium polysulfides is beefed up under higher voltage, which facilitates the charge transfer. Moreover, the molecular dynamics (MD) simulation of the solid‐liquid model shows that the presence of pyridyl porphyrin increases the binding chances between Li+ and S62− and forms clusters rather than dissolving in electrolyte, which is good for charge transfer and polysulfides localization. By hybridizing the pyridyl porphyrin with conductive cathode matrix of carbon nanotube and graphene oxide, the as‐fabricated Li2S‐T4PP‐GO‐CNT cathode delivers a high initial discharge capacity of 996.4 mAh g−1 at 0.1 C. The as‐made batteries with good electrochemical performance therefore show potential for trouble‐shooting and commercial utilization of lithium‐sulfur batteries (LSBs) in the future. [ABSTRACT FROM AUTHOR]

Catalytic stability is the prerequisite for the catalyst to achieve high catalytic efficiency. This study finds a new path that Prussian Blue (PB) ultrathin nanosheet assembly material (PB‐NSa) is designed and used to reach efficient catalysis through continuous interaction with ammonium perchlorate (AP, component to be catalyzed). Based on the strong oxidation environment provided by AP, the decomposition of PB occurs in advance, the product Fe2O3 accelerates the decomposition of AP that can release a large amount of gas, then reacts on Fe2O3 and disperses it near the undecomposed AP, finally realizing continuous and efficient catalysis. The results show that under the catalysis of PB‐N, "deactivation" stage of AP thermal decomposition disappears, showing two consecutive exothermic stages, high temperature decomposition peak of AP is reduced to 341.1 °C, the reduction range is 73.1 °C. Combining kinetic calculation and TG‐IR test, it is found that PB‐NSa can keep excellent catalytic stability, which depends on its special structure and interaction with AP. This research provides a design idea for the material to achieve catalytic stability, which will greatly promote its rapid industrialization. [ABSTRACT FROM AUTHOR]

The introduction of composite components to construct heterointerfaces is an important way to improve the electrocatalytic performance of materials. However, selecting appropriate components to accelerate the elementary reaction rates of the hydrogen evolution reaction (HER) in alkaline media is still in challenge. Here, a Ni‐CeF3‐VN multi‐component material is successfully constructed, which exhibits excellent HER catalytic activity (33 mV at 10 mA cm−2). The experimental and computational results show that the Ni‐VN and Ni‐CeF3 dual heterointerfaces can effectively promote the transfer of OH− adsorption site from Ni to VN and optimize the adsorption energy of intermediate H respectively, which together accelerate the rate of the multi‐step hydrogen evolution reaction in alkaline solution and thus lead to a significantly improved HER performance compared to the pure Ni. Furthermore, the solar to hydrogen (STH) efficiency can reach 10.34%. This work provides an effective guide for the design of high‐efficiency multicomponent materials in the future. [ABSTRACT FROM AUTHOR]

Photoelectric synaptic devices with optical sensing capability are of great importance in simulating human vision systems. Especially realizing all‐in‐one vision neuristor on silicon based new materials and principles is being pursued. 2D van der Waals (vdW) materials have the unique advantage of arbitrary stacking on demand. Herein, a full‐vdW two‐terminal 2D ferroelectric α‐In2Se3/SnSe p–n heterojunction is proposed to construct an optoelectronic neuristor to simulate visual synaptic functions. Implementation of these simulations is attributed to the co‐modulation of the electrical polarization reconfigurable built‐in electric field caused by p–n junction and photo‐inducing ferroelectric polarization switching. These functions include ultra‐high paired‐pulse facilitation index (457%), short synaptic plasticity, long synaptic plasticity, and retina‐like optical adaptations. The high PPF is crucial for high‐precision decoding and processing of visual information. Meanwhile, the classical Pavlovian conditioned reflexes associated with associative learning are also emulated showing the ability of the device to handle complex electrical and optical inputs. This study demonstrates that two‐terminal ferroelectric p–n heterojunctions have great potential in high‐precision multifunctional optoelectronic visual synaptic devices. [ABSTRACT FROM AUTHOR]

2D semiconductors have emerged as candidates for next‐generation electronics. However, previously reported 2D transistors which typically employ the gate‐first process to fabricate a back‐gate (BG) configuration while neglecting the thorough impact on the dielectric capping layer, are severely constrained in large‐scale manufacturing and compatibility with complementary metal–oxide–semiconductor (CMOS) technology. In this study, dual‐gate (DG) field‐effect transistors have been realized based on wafer‐scale monolayer MoS2 and the gate‐last processing, which avoids the transfer process and utilizes an optimized top‐gate (TG) dielectric stack, rendering it highly compatible with CMOS technology. Subsequently, the physical mechanism of TG dielectric deposition and the corresponding controllable threshold voltage (VTH) shift is investigated. Then the fabricated TG‐devices with a large on/off ratio up to 1.7 × 109, negligible hysteresis (≈14 mV), and favorable stability. Additionally, encapsulated TG structured photodetectors have been demonstrated which exhibit photo responsivity (R) up to 9.39 × 103 A W−1 and detectivity (D*) ≈2.13 × 1013 Jones. The result paves the way for future CMOS‐compatible integration of 2D semiconductors for complex multifunctional IC applications. [ABSTRACT FROM AUTHOR]

Metal halide perovskite light‐emitting diodes (Pero‐LEDs) have gained great attention due to their promising applications in lighting and displays. However, in their conventional three‐layered sandwich structure, some undeserved carrier behaviors, such as imbalanced carrier injection, severe carrier loss, and unstable recombination zone, limit the device's performance. Herein, a four‐layered design by inserting a nickel acetate (Ni(OAc)2) interlayer between the emitter and hole‐transport layer(HTL) to manage carrier behavior and improve radiative recombination efficiency is proposed. Specifically, the Ni(OAc)2 interlayer is poorly conductive and can partially block the hole injection, making the hole‐electron injection more balanced. And the Ni(OAc)2 interlayer avoids the direct contact between the perovskite emitter and hole transporter, reducing the interfacial carrier quenching. Moreover, the Ni(OAc)2 interlayer inhibits the electron‐migrated recombination at the hole transporter interface, confining the carrier recombination zone in the emitter layer. As a result, the corresponding Pero‐LEDs achieve a maximum external quantum efficiency (EQEmax) of 24.6% with good reproducibility, showing an average EQEmax of over 20%. [ABSTRACT FROM AUTHOR]

Reconfigurable logic‐in‐memory device, albeit a promising hardware platform for constructing parallel computing architectures, still suffers from high power‐consumption and low area‐efficiency arising from the circuit redundancy in silicon (Si) based technical path. 2D materials are identified as potential building blocks to significantly reduce the circuit footprints with outstanding power‐efficiency, owing to their atomically thin nature and unique electronic properties. However, the present 2D logic devices are primarily based on single channel materials with homogeneous transport polarities, limiting the device reconfigurability for multi‐functional applications. Here, 2D p–n junction based dual‐gate Gaussian‐type transistors for simplified reconfigurable logic circuits are reported. All fundamental Boolean logic operators are implemented in a single device with electrically driven reconfigurability, giving rise to an ultra‐low transistor consumption down to 13% of the traditional circuits. The device is also demonstrated as a reliable image processing unit for various computing tasks (pixel processing, comparing, and ciphering) by executing the corresponding logic operations. Moreover, in situ memory of the Boolean logics is achieved by engineering the dielectric properties of the transistor without compromising its reconfigurability. These findings provide a potential approach to achieving reconfigurable logic‐in‐memory operations at the hardware level, with significant implications for the advancement of parallel computing. [ABSTRACT FROM AUTHOR]

The atomically thin nature and exceptional electrical properties of 2D materials (2DMs) have garnered significant interest in circuit applications. Researchers have developed circuits based on wafer‐level 2DM fabrication and monolithic integration in the laboratory. Numerous studies have been conducted on discrete device processes; however, circuit manufacturing is a multifaceted and methodical engineering process that demands seamless integration of multiple procedures. Notably, the optimization of crucial processes holds paramount significance in achieving expected results. This review presents the existing research on process integration of 2DM devices and circuit applications. The selection of suitable 2DMs for circuit applications is outlined, considering their excellent theoretical properties and feasible high‐quality growth processes. Drawing on highly mature semiconductor manufacturing process, while incorporating customized key processes, 2DM devices have the potential to strongly compete with, and even outperform, the conventional devices. Finally, the recent circuit applications of 2DMs are also discussed in detail. 2DM integrated circuits (2DM ICs) are now being practically applied in advanced manufacturing, transitioning from laboratory development to fabrication plant deployment. The implementation of underlying 2DM IC fabrication provides effective and unique solutions for More Moore, More than Moore, and Beyond CMOS technology routes. [ABSTRACT FROM AUTHOR]

In the article "Highly Reconfigurable Logic-In-Memory Operations in Tunable Gaussian Transistors for Multifunctional Image Processing," Du Xiang, Peng Zhou, Tao Liu, and their colleagues discuss their research on reconfigurable logic gates in Gaussian transistors. They demonstrate the use of a single Gaussian transistor to achieve in situ memory of Boolean logic gates, allowing for multiple image processing tasks. The transistor consumes only 13% of the transistor consumption of silicon-based logic circuits, making it a promising device architecture for advancing parallel computing at the hardware level. The authors of the article are Weihui Sang, Du Xiang, Yi Cao, Feixia Tan, Zichao Han, Wenyu Songlu, Peng Zhou, and Tao Liu. [Extracted from the article]