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Strained-Si0.73Ge0.27 channels are successfully integrated with high-κ/metal gates in p-type metal-oxide- semiconductor field effect transistors (pMOSFETs) using the replacement post-gate process. A silicon cap and oxide inter layers are inserted between Si0.73Ge0.27 and high-κ dielectric to improve the interface. The fabricated Si0.73Ge0.27 pMOSFETs with gate length of 30 nm exhibit good performance with high drive current (~428 μA/μm at V DD = 1 V) and suppressed short-channel effects (DIBL~77 mV/V and SS~90 mV/decade). It is found that the enhancement of effective hole mobility is up to 200% in long-gate-length Si0.73Ge0.27-channel pMOSFETs compared with the corresponding silicon transistors. The improvement of device performance is reduced due to strain relaxation as the gate length decreases, while 26% increase of the drive current is still obtained for 30-nm-gate-length Si0.73Ge0.27 devices.

We present a design and realization of a high efficiency C-Band (5.2 GHz–5.8 GHz) internally-matched gallium nitride (GaN) power amplifier (PA). To reduce power dissipation and to achieve high efficiency, both input and output matching networks, along with 2nd-harmonic modulation circuits, are designed accurately according to the source and load optimum impedances extracted by source-pull and load-pull measurements. The PA realizes an excellent rf performance under a pulsed condition, demonstrating a maximum output power of 52.2dBm (164 W) with at least 13.5dB gain in the frequency range from 5.2 GHz to 5.8 GHz (10% relative bandwidth). At the same time, a power-added efficiency (PAE) of 69.4% is observed at 5.6 GHz and over 65.0% throughout the whole bandwidth. The PAE is the state-of-art performance for C-band GaN high-electron-mobility transistor PA with such high output power, to the best of our knowledge.

A CdS:CdO/Si multi-interface nanoheterostructure array (CdS:CdO/Si-NPA) is prepared by a chemical bath deposition method, and three emission bands are observed in the as-grown CdS:CdO film. By measuring its temperature-dependent photoluminescence (PL) spectrum, the variation trends of the peak energies and intensities with temperature for the three bands are obtained. Based on the theoretical analyses and fitting results, the non-radiative recombination processes corresponding to the PL quenching for the three emission bands are attributed to the thermally activated transition between heavy-hole and light-hole levels (at low temperature) and the thermal escape due to the scattering from longitudinal optical phonons (at high temperature), the transition from acceptor levels to surface states, and the transition related to surface defect states, respectively. The clarification of the non-radiative recombination processes in CdS:CdO/Si-NPA might provide useful information for promoting the performance of optoelectronic devices based on CdS/Si nanoheterostructures.

We fabricate p-channel metal-oxide-semiconductor-field-effect-transistors (PMOSFETs) with a HfSiAlON/MoAlN gate stack using a novel and practical gate-last process. In the process, SiO2/poly-Si is adopted as the dummy gate stack and replaced by an HfSiAlON/MoAlN gate stack after source/drain formation. Because of the high-k/metal-gate stack formation after the 1000°C source/drain ion-implant doping activation, the fabricated PMOSFET has good electrical characteristics. The device's saturation driving current is 2.71 × 10−4 A/μm (VGS = VDS = −1.5 V) and the off-state current is 2.78 × 10−9 A/μm. The subthreshold slope of 105 mV/dec (VDS = −1.5 V), drain induced barrier lowering of 80 mV/V and Vth of −0.3 V are obtained. The research indicates that the present PMOSFET could be a solution for high performance PMOSFET applications.