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SINGLE-CHIP IMPLEMENTATIONS have become the preferred choice for applications ranging from cell phones to coffee makers, dramatically streamlining OEM production and reducing board space. Although there is little question that [...]

IN THE EARLY DAYS of semiconductors, digital-system design was almost completely a hardware-intensive-tools task. User-customizable-logic chips (with the exception of software-configurable microprocessors) just didn't exist. Instead, you dealt with collections [...]

If your µC-based design has only one pin free for diagnostic use, you can implement a serial condition monitor to provide at least some diagnostic information over that pin. Your [...]

Too often, software developers depend on heuristic debugging efforts during final integration to catch and correct software errors. Test tools for software allow developers to perform more systematic and thorough [...]

PIONEERING DESIGNERS WITH THE PCI BUS EXPERIENCED HARDSHIPS BECAUSE THEY HAD TO CREATE THEIR DEBUGGING TOOLS. TODAY, A WIDE RANGE OF PCI-SPECIFIC TOOLS MAKES YOUR DEBUGGING JOB MUCH EASIER. The [...]

Traditional software debugging tools still haven't been able to measure the dimension of time. For real-time systems, however, time is the essence of good software. Now, tools that handle time [...]

Some suppliers have gone overboard in promoting development tools based on µPs' on-chip debug features. If you're working with a chip that offers such features, don't let vendors' fervor put [...]

You now have many tools to choose from to debug your 8-bit µP-based project, but each one has its strengths and weaknesses. Avoid major headaches by taking time before you [...]

The Joint Test Action Group (JTAG) has developed the boundary-scan technique for debugging circuit designs and helping in production testing; the technique will soon be issued as IEEE Standard 1149.1. The probeless test technique was developed to meet the testing needs of surface-mount printed circuit boards, which continue to increase in density and complexity. The test requires a 4-wire serial test bus made up of four signals: Test Data In (TDI), Test Data Out (TDO), Test Mode Select (TMS) and Test Clock (TCK). The three scan registers in all scannable ICs are the instruction register, the bypass register and the boundary-scan register chain; the Test Access Port (TAP) controls data passing through the registers and moving from TDI to TDO. IC designers have the option of adding more scannable registers with scan paths for testing internal logic, reading a device-specific ID code or accessing optional built-in test circuits.

Payoff for IC, analyzer cooperation Tighter collaboration between IC and logic analyzer makers is resulting in better and faster support for leading-edge processors, design changes on both sides, and the [...]

16-bit debugging tools perform at low cost A favorite way for budget-conscious managers to control project costs is to disapprove the purchase of expensive ([is greater than]$10,000) test equipment, such [...]

When you must keep the cost of a design to a minimum, try using μAPs having background-debug mode, which reduces parts count, lowers board cost, and improves reliability. Until recently, [...]

By Ron Choi, Eve Tools alone don't solve the problem; You must couple Good tools with an effective debugging strategy. The design of modern SOCs (systems on chips) requires increasingly [...]

by Ron Wilson Mentor Graphics has continued to expand the reach of its product with its core Catapult C synthesis engine. In December, the company added support for control-logic synthesis [...]

By Andrea Kroll, PhD - JEDA Technologies Seemingly minor violations of the TLM 2.0 standard can turn a system-level model into an agent of evil in your design flow. The [...]

by Howard Johnson, PhD Last week, at a class in Rochester, NY, one of my students asked, 'What is the most difficult kind of problem to debug?' My answer came [...]

by Robert Cravotta Etnus changed its name to TotalView Technologies last month at the Embedded Systems Conference in San Jose, CA, as it announced a multicore-debugging framework. The framework comprises [...]

by Bertrand Deleris, Freescale Semiconductor Debugging embedded systems can represent more than half of an embedded-software-project workload. Understanding hardware-debugging functions and the issues they tackle is key to selecting the [...]

IF YOU DESIGN OR DEVELOP tests for complex digital ICs, you should consider Mentor Graphics' TestKompress. The vendor says that the tool cuts device-test times by at least 60% without [...]

* The vendor's Nucleus Plus real-time kernel teams with Lauterbach's Trace32 in-circuit debugger for Motorola's M.Core family * Lets you view real-time-kernel objects, such as mailboxes and task tables, in [...]

* For use with the Active-HDL design-and-verification environment * Provides online analysis of code efficiency and testing quality * Checks for execution of all VHDL and Verilog statements during simulation [...]

* For embedded designs based on the Motorola DSP56XXX family * Allows you to set breakpoints based on code execution, data access, timer activity, instruction and cycle counts, or any [...]

Hyperlinks give access to latest EDA tools. CMP Media's EDTN Network teams with EDAconnect.com to streamline online distribution of client-based EDA design tools from within the EEdesign.com electronics community Web [...]

STIL-database interface * Complies with the IEEE-1450-1999 STIL (Standard Test Interface Language) * Validates STIL output compliance in the original design-simulation environment * Automatically translates STIL-based vectors back and forth [...]

THE GOAL OF MONITORING transmission in a data link is obvious: You want to know the contents of the data, when it was sent, and by whom. If one of [...]

Product Name or Model Number Company Description XMetal 2.0 SoftQuad Software XML editing tool Stateflow 3.0/ The MathWorks The products handle Stateflow Coder 3.0 temporal logic conditions, such as 'before' [...]

Product Name of Model number Company Description MEMCAD 4.6 Microcosm MEMS (Microelectromechanical system) -analysis and-design software Envisia Cadence Chip-physical-implementation place-and-route tool suite Physical Synopsys The next step in the progress [...]

EDA industry rises to the challenge of complex-system design The Electronic Design Automation (EDA) industry has been on a path to recovery after some necessary changes in software licensing models [...]

IF YOUR PROJECT INCLUDES the design, test, and verification of PMC-compliant systems, you might investigate the TA700P analyzer/exerciser from Catalyst Enterprises. The vendor claims that the TA700P is the only [...]

Intel Slot 1/BX chip-set motherboards * Employ a 133-MHz front-side bus and an embedded ATA 100 controller * ATX form-factor boards have one AGP, five PCI, and two ISA expansion [...]

THE INTERNET IS A POWERFUL TOOL FOR PROVIDING DESIGN ENGINEERS WITH NEW SERVICES AND INTRODUCING NEW WAYS TO PROVIDE TRADITIONAL SERVICES. EDA INDUSTRY REPRESENTATIVES seem clear about what you can [...]

Emulation-mapping service * Lets you configure SOC (system-on-chip) designs via the Internet * Provides a secure Web environment to protect proprietary SOC designs * Maps and verifies the emulation implementation [...]

IT IS NEVER EASY TO PERSUADE µC-application developers to adapt to a new architecture just on the basis of the µC's superior performance attributes. A device may look terrific on [...]

COMMUNICATION IS THE PROCESS of transmitting ideas from a sender to a receiver while preserving the syntax and semantics of the message. When speaking in public, you always run the [...]

DES/triple-DES cores * Data-encryption standard (DES) and triple-DES cores for use in Xilinx Virtex, Virtex-E, and Spartan-II FPGAs * Suitable for smart-card, cable-modem, and Bluetooth wireless applications * NIST-certified * [...]

DEBUGGING HIGH-END EMBEDDED APPLICATIONS IS NO LONGER STATIC. SEMICONDUCTOR VENDORS, TOOL DEVELOPERS, AND INSTRUMENT MAKERS HAVE COMBINED TO SUPPORT THE NEXUS STANDARD, WHICH RELIES ON ON-CHIP HARDWARE FEATURES AND DEFINES [...]

WITH FUNCTIONAL VERIFICATION TAKING THE LION'S SHARE OF A LARGE IC'S DESIGN EFFORT, THE PRESSURE IS ON SIMULATION, TEST-DEVELOPMENT, AND DEBUGGING-TOOL VENDORS. TO EASE THE BURDEN, SOME DESIGNERS TURN TO [...]

Machine vision software * Windows-based software-development environment * C/C ++ libraries include more than 200 new image-processing functions * Supports custom DLLs so you can write your own vision algorithms [...]

EMBEDDED-SYSTEM ENGINEERS ENCOUNTER DIFFICULTIES WHEN TRYING TO DEBUG NEW PROCESSORS USING TRADITIONAL TOOLS. TECHNIQUES SUCH AS SIMULATION--PREVIOUSLY THE PRESERVE OF HARDWARE DESIGNERS--ARE ENTERING THE SOFTWARE-DEVELOPMENT ARENA, AND SILICON VENDORS ARE [...]

HIGH-LEVEL-LANGUAGE COMPILERS have become one of the most important pieces of a design involving a CPU. This situation is true even at the low end of the spectrum with 8-bit [...]

JM Williams, Marconi Communications, Liverpool, UK Testing the performance of a system being fed random errors can be tricky; it is not easy to add an accurate, low-level bit-error rate [...]

EACH NEW EMBEDDED PRODUCT BRINGS INCREASED SOFTWARE COMPLEXITY, YET MARKET PRESSURES DICTATE A SHORTER DEBUGGING TIME. MAKE SURE YOU HAVE THE RIGHT WEAPONS AND AN EFFECTIVE PLAN OF ATTACK BEFORE [...]

DEBUGGING AND OPTIMIZING TODAY'S 32-BIT EMBEDDED APPLICATIONS IS BECOMING INCREASINGLY DIFFICULT. NOW, DESIGNERS OF EMBEDDED SYSTEMS ARE RELYING MORE ON SOFTWARE-PROFILING TECHNIQUES TO OPTIMIZE AND DEBUG THE CODE. Thanks to [...]

TIRAMISU, A NEW SOFTWARE UTILITY from On-track Data, makes it easy--though expensive--to recover from the Explorezip worm virus, which was released in June. The utility worked for me, when, a [...]

COMPACTPCI CPU BOARD OFFERS J3/J5 I/O ROUTING. With 100% of its I/O routed off the backplane, the Snowden 6U CompactPCI board serves as a development platform for a variety of [...]

Relatively inexpensive (as little as $75) microprocessor simulators enable a PC to test and rewrite assembly code for a variety of microprocessors, including management of program execution, setting of breakpoints, modification of registers and memory, and the simulation of external circuitry. Microprocessor simulators are more effective for software debugging than in-circuit emulators (ICEs). They can debug software upon assembly but execute code very slowly and may need an ICE to run a program in real time. Microprocessor simulators manufactured by Mecklenburg Engineering, Logical Systems, Cybernetic Micro Systems, and Avocet Systems are described.

The use of an in-circuit emulator and a bus-state analyzer as debugging tools is described to help solve some of the software debugging problems that are more difficult to both isolate and fix. Debugging can take weeks longer if only software-based debugging tools are employed, but the use of these hardware devices can not only cut the time involved, but can find bugs that would otherwise not be found. Data on conditions that lead to intermittent crashes can be sent to a printer or disk file. The devices also permit continuing of a session safely after making a patch and making corrections to source code at a later time using the fixes recorded in a printed log. A count of the number of cycles between two program points using an analyzer command provides an easy method of ensuring that a loop works properly.

A look at the different approaches being used to address the problems faced when designing highly integrated embedded systems. Embedded systems today bear little resemblance to their early predecessors. Representing [...]

Development tools that once were adequate for simple single-processor designs based on 8- or 16-bit chips are not adequate for the design of modern fault-tolerant telecommunications or data communications systems. [...]

The increasing complexity of embedded software requires a different approach to integration The software programs contained in many embedded computer systems are beoming larger and much more complex. Typically, this [...]