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A high-linearity input-buffer with high output common-mode stability for 10-bit 3.2 GS/s ADC is proposed in this Letter. The buffer is mainly composed of a source follower for strong driving ability. To enhance its linearity, a feed forward signal path from input to output is proposed. A replica buffer-based common-mode feedback is designed to achieve high output common-mode stabilisation of input-buffer. The prototype is implemented in 40 nm CMOS process. The output common-mode variation is reduced from 200 to 1 mV. Input-buffer consumes 96 mW in 3.2 GHz sampling rate and achieves 69.3 dB spur-free dynamic range at 1581 MHz input frequency. [ABSTRACT FROM AUTHOR]

A novel group‐delay‐insensitive linear equaliser (GDILE) is proposed to reduce the eye‐skew in four‐level pulse amplitude modulation (PAM‐4) receivers. With a cross‐coupled positive‐feedback degeneration network, the proposed GDILE employs additional pole and zero into its transfer function to reduce the group‐delay variation with frequency. Simulation results shows a 40 Gbit/s PAM‐4 receiver that employs a GDILE that can reduce the eye‐skew by 73% compared with the conventional linear equaliser with a modest increase of power consumption. [ABSTRACT FROM AUTHOR]

To address the limited linearity range of current‐mode logic circuits used for four‐level pulse amplitude modulation (PAM‐4) symbol generation, a voltage‐mode, inverter‐like circuit featuring a stacked transistor–resistor structure is proposed. Simulation results have shown that the linearity of the proposed PAM‐4 circuit has been improved by 43.1%, with a modest increase of circuit area. Additionally, 20% resistance mismatch in the proposed PAM‐4 symbol generator leads to linearity degradation of <9%. [ABSTRACT FROM AUTHOR]

To reduce pattern‐dependent jitter in four‐level pulse‐amplitude modulation (PAM‐4) signalling, a transition‐aware feed‐forward equaliser (TFFE) is proposed. By allowing the transition time to vary according to the transition types of the PAM‐4 symbols, switching jitter in TFFE‐based PAM‐4 transmitters can be greatly suppressed, down to the non‐return‐to‐zero (NRZ) level. Simulation results confirm that a PAM‐4 transmitter that employs a TFFE can reduce the jitter level by 0.18 unit interval peak‐to‐peak, and this proposed equaliser can achieve nearly identical eye height as the conventional PAM‐4 feed‐forward equalisers design without introducing any signal‐to‐noise ratio penalty. [ABSTRACT FROM AUTHOR]

A real‐time temperature detection circuit with 0.1°C accuracy is presented. The temperature sensor is composed by a current controlled oscillator (ICO). Its oscillating frequency is proportional to the temperature but independent with the power supply. The frequency change will be digitised by a counter and thus realise the temperature detection. The detection accuracy is limited by the linearity of ICO. In order to improve temperature detection accuracy, a temperature segmentation algorithm is proposed. The temperature sensor is implemented with 0.18 μm CMOS technology and the core area is 0.023 mm2. The power consumption of the proposed sensor is 0.3 mW with 1.8 V supply. Experimental results show that this sensor can detect the temperature from −40 to 125°C with 0.1°C accuracy and the detection error is within ±0.8°C. [ABSTRACT FROM AUTHOR]