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In this brief, a high-resolution successive-approximation-register analog-to-digital-conversion architecture for biomedical data acquisition is proposed. A filtered least-significant-bit segment is employed as a dither to improve the resolution. Theoretical analysis and behavioral simulations show that the error of a most-significant-bit segment can be converted into shaped noise if the input signal is sufficiently small. The proposed self-dithering technique can be used, together with averaging, to improve the signal-to-noise ratio and the differential nonlinearity (DNL) performance. The performance improvement is similar to that of a conventional nonsubtractive scheme using a uniform deterministic dither but with simplified hardware and reduced computation complexity. [ABSTRACT FROM PUBLISHER]

Built upon our earlier works on high-temperature acoustic transmitters, a novel method to calibrate the resistor temperature coefficient compensation is proposed using a digital $\Delta\Sigma$ modulator. The resulting frequency reference generates a frequency of 1.4 MHz with an inaccuracy value of ±1.7% over the temperature range of 25 °C–300 °C. The acoustic transmitter generates both three-channel chirp and six-channel on–off keying modulation. Fabricated in a 1-μm silicon-on-insulator complementary metal–oxide–semiconductor, the chip occupies an area of 27.5 mm2. Under 5-V supply, it can support up to 120 b/s while consuming 12 and 19 mW at 25 °C and 300 °C, respectively. [ABSTRACT FROM AUTHOR]

This brief proposes a low-power architecture for a discrete-time (DT) delta–sigma modulator to take full advantages of increased quantization levels. In the proposed architecture, noise-shaped segmentation is applied to both the quantizer and the feedback digital-to-analog converter to maintain a high resolution and a high linearity and, at the same time, keep the hardware complexity low. This leads to a significantly reduced output swing of the integrator to minimize the slewing-related distortion in a DT implementation. The resulting uniform linear settling behavior can tolerate a relatively large settling error without degrading the performance, which greatly relaxes the bandwidth requirement of the op-amp design. The reduced output swing also allows the use of low-gain amplifiers, which is particularly attractive for an advanced technology in which the intrinsic gain of the transistor is degraded. The proposed architecture is analyzed and verified through simulation. [ABSTRACT FROM PUBLISHER]

A single-channel asynchronous successive approximation register analog-to-digital converter with a dual-trial instantaneous switching scheme is presented in this brief. The proposed architecture uses two capacitive digital-to-analog converter (DAC) arrays to generate two possible outputs while the comparator is in the regeneration process. Two comparators are assigned to each DAC to alternately switch between the compare phase and the reset phase. Such an approach allows the overlapping of the DAC settling, the comparator reset, and the comparator regeneration, which significantly improves the conversion speed. Furthermore, the random nature of the internal channel selection converts the mismatches between both channels into wideband noise, which improves the spurious-free dynamic range. [ABSTRACT FROM PUBLISHER]

A digital noise-coupling technique for delta–sigma modulators with a high-resolution quantizer is presented. The proposed technique divides the outputs of the quantizer into an MSB segment and an LSB segment. The MSBs are directly fed to the modulator input, whereas the LSBs are used as the quantization noise for noise coupling. After the digital postprocessing, the MSBs and the LSBs are then recombined. As a result, it preserves the benefit of increased quantization levels without suffering from the exponential growth of the dynamic element matching logic. The extra noise shaping introduced by the LSB feedback further reduces the quantization noise leakage caused by the mismatch between the analog and digital noise transfer functions, which allows a more relaxed operational amplifier design. This technique is simple to implement and well suited for low-power and wideband applications. [ABSTRACT FROM AUTHOR]

A reconfigurable acoustic telemetry transmitter that employs crystal-less temperature-independent frequency reference has been realized in a 1-\mu\m silicon-on-insulator complementary metal–oxide–semiconductor process. The transmitter can be configured to transmit either a three-channel chirp signal or a six-channel on–off keying (OOK) signal to provide flexibility based on channel characteristics. Different frequencies derived from the crystal-less temperature-independent frequency reference are directly modulated by input data before being combined and sent through a multiple-feedback low-pass filter. The resulting three-channel chirp signal achieves a total data rate of 60 b/s, whereas the six-channel OOK signal achieves a total data rate of 120 b/s. The frequency reference is realized through a frequency-locked loop that employs a resistor–capacitor phase shifter with a resistor temperature coefficient cancellation technique. It achieves a frequency inaccuracy of \pm1.94% over the temperature range of 175\ ^\circ \C \sim 275\ ^\circ\C. Consuming 9 mW and occupying 25 \mm^2, this brief is the first reported integrated solution targeted for high-temperature acoustic telemetry in oil-drilling applications with the highest reported data rate. [ABSTRACT FROM PUBLISHER]