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A cost-effective engineered bulk silicon (EBUS) substrate technology is presented, featuring p-n junction implemented on bulk Si substrates using mainstream ion implantation and thermal annealing processes. Standard p-GaN/AlGaN/GaN heterostructures are successfully grown on the EBUS substrate and used to fabricate 200-V enhancement-mode p-GaN gate HEMTs. By creating deep trenches in the EBUS substrate to isolate the local P+ silicon regions underneath the high-side (HS) and low-side (LS) power switches, adverse effects (e.g., back-gating and dynamic ON-resistance degradation) in the use of conventional bulk Si substrate are all eliminated. The mechanism of crosstalk suppression in the GaN-on-EBUS platform is revealed in comparison with conventional GaN-on-Si platform and verified by a series of designed tests. [ABSTRACT FROM AUTHOR]

In this article, an ultrathin-barrier (UTB) AlGaN/GaN diode featuring metal–insulator–semiconductor (MIS)-gated hybrid anode (MG-HAD) and in situ Si3N4 cap passivation is demonstrated. The intrinsic turn-on voltage (VON) as low as 0.31 V determined by the as-grown AlGaN-barrier thickness (4.9 nm) is obtained and the VON exhibits excellent uniformity. More importantly, benefit from the MIS-gated hybrid anode structure, the UTB MG-HAD features good thermal stability in reverse blocking capability. The device delivers a substantially low leakage less than 1~μm/mm at −300 V at high temperature (HT) up to 200 °C, which is more than 100 × lower than that in the reference device w/o gate dielectric. Besides, the device exhibits respectably improved dynamic characteristics due to the incorporation of in situ Si3N4-cap passivation layer and remote plasma pretreatment (RPP) prior to Al2O3 gate dielectric deposition. The UTB MG-HAD featuring precisely VON modulation and low reverse leakage is of great interest for power electronic applications. [ABSTRACT FROM AUTHOR]

In this paper, systematic characterization and the corresponding suppression strategies of dynamic OFF-state leakage current (${I}_{ \mathrm{\scriptscriptstyle OFF}}$) in Schottky-type p-GaN gate high-electron-mobility transistors (HEMTs) are presented based on fast pulsed ${I}$ – ${V}$ measurement and consecutive switching measurement. It is found that the high ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ under dynamic pulse mode without hole injection is a result of the reduced voltage blocking capabilities (both lateral and vertical) with weaker trapping effect in the buffer, and the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ induced by ON-state hole injection is caused by further increased lateral conductivity through the buffer from source to drain. The corresponding behaviors under continuous waveforms with different switching conditions are analyzed to identify effective approaches for the suppression of dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ in practical switching operations. A higher temperature is shown to be beneficial to the reduction of the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ induced by ON-state hole injection. To completely eliminate the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ caused by ON-state hole injection and minimize the OFF-state power consumption in practical power switching applications, a sufficiently large negative OFF-state gate bias (e.g., ${V}_{\text {GS}, \mathrm{\scriptscriptstyle OFF}}\le -{3}$ V) is recommended in the gate driver turn-off voltage design for the Schottky-type p-GaN gate HEMTs. [ABSTRACT FROM AUTHOR]

A systematic analytical investigation of the charge distribution and gate control of the normally-off GaN double-channel MOS-HEMT (DC-MOS-HEMT) is presented in this paper. Compared to conventional GaN MOS-HEMT, the DC-MOS-HEMT features a thin AlN insertion layer (AlN-ISL) below the original two dimensional electron gas (2DEG) channel, thus forming a second channel at the interface between AlN-ISL and the underlying GaN. This paper reveals the impact of the AlN-ISL on the 2DEG distribution and the gate control of the channels. The sensitivity of ${V}_{\text {th}}$ against the recess depth is also analytically studied and is found to be nearly independent of the recess depth as long as the recess is terminated in the upper channel layer. The analytical results are well supported by numerical device simulations, and the physical mechanisms behind these findings are explained along with the analytical investigations. [ABSTRACT FROM AUTHOR]

The temperature dependence of current collapse (CC) in AlGaN/GaN high-electron mobility transistors on silicon substrate is studied in this paper. Devices without and with Si3N4 passivation are used to investigate the behavior of surface- and buffer-induced CC, respectively. It is found that the degree of surface-induced CC in unpassivated devices has a weak temperature dependence, which is induced by the cancelling out between enhanced carrier injection based on surface hopping and enhanced emission when the temperature is increased. On the other hand, the degree of buffer-induced CC in the Si3N4 passivated devices is reduced at higher temperature since the energy of hot electrons is reduced due to the phonon scattering and the trapping of hot electrons in the buffer is mitigated. Temperature-dependent transient measurement is also carried out to investigate the recovery process for these two type of CC. Two types of trap levels are identified in the unpassivated and Si3N4 passivated devices, respectively. The trap level $E1$ with an activation energy of 0.08 eV is supposed to be related to the surface trapping, while $E2$ with an activation energy of 0.22 eV is located in the buffer layer. [ABSTRACT FROM AUTHOR]

Al2O3–AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) featuring indium tin oxide transparent gate electrode are fabricated for the purpose of evaluating the gate reliability. The transparent gate electrode allows electroluminescence (EL) observation in the region directly under the gate, which cannot be performed in conventional MIS-HEMTs with opaque gate electrode. Normally OFF transparent-gate MIS-HEMTs were realized by implanting fluorine ions into the AlGaN barrier prior to the deposition of Al2O3. The dependence of EL on bias condition was investigated with the color of EL resolved by filters. Gate dielectric degradation in MIS-HEMTs was induced by OFF state drain-bias stress, as detected by the increased gate leakage current. Location of the gate degradation could be clearly identified by EL imaging through the transparent gate. From the EL image, the passivation layer under the overhang of T-shaped gate is found to be vulnerable to OFF-state stress, which is confirmed by simulation. [ABSTRACT FROM AUTHOR]

We investigate in detail the influence of AlN passivation on dynamic ON-resistance ( \(R_{\mathrm{{\scriptstyle ON}}}\) ) and electric field ( \(E\) -field) distribution in high-voltage AlGaN/GaN high electron mobility transistors (HEMTs) on a Si substrate based on pulsed \(I\) – \(V\) measurements, electroluminescence (EL) microscopy, and 2-D physics-based numerical device simulations. It is found that the dynamic \(R_{\mathrm{{\scriptstyle ON}}}\) increase has been significantly suppressed to below 10% at various temperatures ranging from −50 to 200 °C owing to the effective and robust compensation of deep acceptor-like trap states at the AlN/GaN (passivation/cap) interface by the additional positive polarization charges induced in the epitaxial AlN thin passivation layer grown in a plasma-enhanced atomic layer deposition system. To the best of our knowledge, this is the first time that highly suppressed current collapse in an AlGaN/GaN HEMT on a Si substrate within a wide temperature range is ever reported. By monitoring the dynamic \(R_{\mathrm{{\scriptstyle ON}}}\) for 100 consecutive 133-kHz switching cycles, its variation is observed to be less than 2.5%, indicating excellent stability of the passivation effectiveness. The electric field in an AlN-passivated device is found to be well confined at the drain-side gate edge, as shown in EL measurement and numerical simulation results. This phenomenon directly suggests that the virtual gate effect arising from surface trap charging has been effectively alleviated by the AlN passivation technique. [ABSTRACT FROM AUTHOR]

In this paper, we investigate the enhancement-mode (E-mode) LaLuO3 (LLO)-AlGaN/GaN metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs) fabricated using fluorine (F) plasma ion implantation with a gate-dielectric-first planar process. The E-mode MIS-HEMTs exhibit a threshold voltage (VTH) of 0.6 V, a peak transconductance of \sim193~mS/mm, a small hysteresis of 0.04 V in linear region characterized by a pulse-mode current-voltage measurement, and significantly suppressed current collapse under high-drain-bias switching conditions. X-ray photoelectron spectroscopy and secondary ion mass spectrometry analyses manifest that the negatively charged F ions penetrating into the (Al)GaN barrier layer serve as the primary VTH modulation mechanism, whereas the F ions in the fluorinated LLO film form chemical bonds with La/Lu atoms and become charge-neutral. The suppressed current collapse is verified as an advantageous byproduct of the F plasma ion implantation that also fluorinated the SiNx sidewalls in the vicinity of the gate electrode, and therefore, suppress electron injection to the gate-drain access region. [ABSTRACT FROM AUTHOR]

We present the detailed dc and radio-frequency characteristics of an Al0.3Ga0.7N/GaN/In0.1Ga0.9N/GaN double-heterojunction HEMT (DH-HEMT) structure. This structure incorporates a thin (3 nm) In0.1Ga0.9N notch layer inserted at a location that is 6-nm away from the AlGaN/GaN heterointerface. The In0.1Ga0.9N layer provides a unique piezoelectric polarization field which results in a higher potential barrier at the backside of the two-dimensional electron gas channel, effectively improving the carrier confinement and then reducing the buffer leakage. Both depletion-mode (D-mode) and enhancement-mode (E-mode) devices were fabricated on this new structure. Compared with the baseline AlGaN/GaN HEMTs, the DH-HEMT shows lower drain leakage current. The gate leakage current is also found to be reduced, owing to an improved surface morphology in InGaN-incorporated epitaxial structures. DC and small- and large-signal microwave characteristics, together with the linearity performances, have been investigated. The channel transit delay time analysis also revealed that there was a minor channel in the InGaN layer in which the electrons exhibited a mobility slightly lower than the GaN channel. The E-mode DH-HEMTs were also fabricated using our recently developed CF4-based plasma treatment technique. The large-signal operation of the E-mode GaN-based HEMTs was reported for the first time. At 2 GHz, a 1 × 100 μm E-mode device demonstrated a maximum output power of 3.12 W/mm and a power-added efficiency of 49% with single-polarity biases (a gate bias of +0.5 V and a drain bias of 35 V). An output third-order interception point of 34.7 dBm was obtained in the E-mode HEMTs. [ABSTRACT FROM AUTHOR]

Fabrication and characterization of AlGaN/GaN HEMT inverters and ring oscillators utilizing integrated enhancement/depletion-mode (E/D-mode) AlGaN/GaN HEMTs are presented. The core technique is a CF4 plasma treatment that can effectively convert a D-mode AlGaN/GaN heterostructure to an E-mode heterostructure. A significant advantage of the plasma-treated E-mode HEMTs is that the gate current is reduced in both reverse- and forward-bias regions due to the effectively enhanced barrier height induced by the negatively charged fluorine ions in the AlGaN barrier. As a result, the input voltage swing is expanded by about 1 V for the E-mode HEMT, enabling convenient input/output logic level matching for multistage logic circuits such as ring oscillators. The fabricated 17-stage direct-coupled field-effect transistor logic ring oscillator using the 1-μm-gate technology can operate properly at a larger supply voltage of 3.5 V, and a minimum propagation delay of 130 ps/stage is achieved. [ABSTRACT FROM AUTHOR]

This paper presents a method with an accurate control of threshold voltages (Vth) of AlGaN/GaN high-electron mobility transistors (HEMTs) using a fluoride-based plasma treatment. Using this method, the Vth of AlGaN/GaN HEMTs can be continuously shifted from 4 V in a conventional depletion-mode (D-mode) AlGaN/GaN HEMT to 0.9 V in an enhancement-mode AlGaN/GaN HEMT. It was found that the plasma-induced damages result in a mobility degradation of two-dimensional electron gas. The damages can be repaired and the mobility can be recovered by a post-gate annealing step at 400 °C. At the same time, the shift in Vth shows a good thermal stability and is not affected by the post-gate annealing. The enhancement-mode HEMTs show a performance (transconductance, cutoff frequencies) comparable to the D-mode HEMTs. Experimental results confirm that the threshold-voltage shift originates from the incorporation of F ions in the AlGaN barrier. In addition, the fluoride-based plasma treatment was also found to be effective in lowering the gate-leakage current, in both forward and reverse bias regions. A physical model of the threshold voltage is proposed to explain the effects of the fluoride-based plasma treatment on AlGaN/GaN HEMTs. [ABSTRACT FROM AUTHOR]