Search

Si[N.sub.x]/Si[O.sub.2] stack-gate structures, followed by [N.sub.2]O annealing, are examined to improve the 4H-SiC metal-insulator-semiconductor (MIS) interface quality. The fabricated MISFETs with Si[N.sub.x]/Si[O.sub.2] stack-gate structure annealed in [N.sub.2]O has shown high channel mobility on the Si and C face.

The simulation and fabrication of high-voltage 4H-SiC PiN diodes with an improved junction termination structure are described. The junction termination voltage (JTE) region is optimized by device simulation and the JTE dose dependence of the breakdown voltage is compared with experimental results.

Designing and fabrication of 4H-SiC (0001) lateral MOSFETs with double reduced surface field (RESURF) structure is investigated to reduce ON resistance. It is seen that the simulated double RESURF MOSFETs with optimum doses exhibit slightly higher breakdown voltage and lower drift resistance than simulated single RESURF MOSFETs.

4H-SiC MOSFETs with various channel lengths is fabricated to investigate short-channel effects (SCEs). In the lightly doped MOSFETs, the SECs occurred even at a relatively long channel of 3-5 mum, while it was hard to observe the SCEs in the highly doped MOSFETs with a 1 mum-long channel.

Design and fabrication of lateral SiC reduced surface field (RESURF) MOSFETs are investigated. Device simulation is used to estimate the optimum doping concentrations (doses) of the RESURF and LDD regions to reduce the electric field crowding at the drain edge or in the gate oxide.

Interface properties of 4H-SiC (11 \bar 2 0) and (1 \bar 1 00) metal–oxide–semiconductor (MOS) structures annealed in nitric oxide are characterized by conductance, high–low, and C– \psi \mathbf {\textit {s}} methods. Compared with 4H-SiC (0001) MOS structures, generation of very fast interface states by nitridation is much smaller in 4H-SiC ( 11\bar 20 ) and ( 1\bar 100 ). The effective mobility of planar MOSFETs fabricated on Al+-implanted p-body doped to 1\times 10^\mathrm \mathbf 17 cm ^\mathrm \mathbf -3 is 103 cm ^\mathrm \mathbf 2 /Vs on (1 \bar 1 00), 92 cm ^\mathrm \mathbf 2 /Vs on (11 \bar 2 0), and 20 cm ^\mathrm \mathbf 2 /Vs on (0001). The mobility-limiting factors are discussed on the basis of experimental results. The high channel mobilities for ( 11\bar 20 ) and ( 1\bar 100 ) MOSFETs can be correlated with the lower density of fast interface states generated by nitridation. [ABSTRACT FROM AUTHOR]

In this paper, we have investigated 4H-SiC p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with deposited SiO2 followed by N2O annealing. In addition to deposited oxides, dry-O2-grown oxides and N2O-grown oxides were also adopted as the gate oxides of SiC p-channel MOSFETs. The MOSFETs have been fabricated on the 4H-SiC (0001), (0001), (0338), and (1120) faces. The (0001) MOSFETs with deposited oxides exhibited a relatively high channel mobility of 10 cm2 /V ⋅ s, although a mobility of 7 cm2/V ⋅ s was obtained in the (0001) MOSFETs with N2O-grown oxides. The channel mobility was also increased by utilizing the deposited SiO2 in the MOSFETs fabricated on nonbasal faces, although the MOSFETs on (0001) were not operational. Compared with the thermally grown oxides, the deposited oxides annealed in N2O are effective in improving the performance of 4H-SiC p-channel MOSFETs. [ABSTRACT FROM AUTHOR]

SiN∞/SiO2 stack-gate structures, followed by N2O annealing, have been investigated to improve the 4H-SiC metal—insulator—semiconductor (MIS) interface quality. Capacitance—voltage measurements on fabricated stack-gate MIS capacitors have indicated that the interface trap density is reduced by post-deposition annealing in N2O at 1300 °C. When the MIS capacitor with a SiN∞ /SiO2 thickness of 10 nm/50 nm was annealed in N2O for 2 h, the interface trap density at EC - 0.2 eV is below 1 × 1011 cm-2eV-1. Oxidation of SiN∞ during N2O annealing has resulted in the improvement of SiC MIS interface characteristics, as well as dielectric properties. The fabricated MISFETs with SiN∞/SiO2 stack-gate structure annealed in N2O demonstrate a reasonably high channel mobility of 32 cm² /V · s on the (0001)Si face and 40 cm²/V · s on the (0001...)C face. [ABSTRACT FROM AUTHOR]