Search

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Conventional two-level as well as multilevel voltage-source-inverter topologies with a hexagonal voltage-space vector structure generate low-order harmonics in the machine terminal voltages when operated beyond the linear modulation range in variable speed drive application. Progressing from hexagonal to a higher sided polygonal voltage-space-vector structure (VSVS) suppresses significant low-order harmonics throughout the modulation range. In addition, the linear modulation range will also be enhanced very near to the base speed. In this paper, for the first time, the generation of a multilevel 24-sided VSVS using a single dc source for induction-motor drives is proposed. A cascaded topology with a dc-source-fed flying-capacitor inverter and two low-voltage capacitor-fed H-bridge cells forms the power circuit. The features and advantages of the proposed scheme are validated through experimental results and discussions. [ABSTRACT FROM AUTHOR]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

Z-source networks are recently being employed to enhance the boosting capability of matrix converters. This paper concentrates on cascaded Z-source ultrasparse matrix converter (ZSUSMC), where the Z-source network is placed between the three-switch input rectifier stage and the six-switch output inverter stage. Two space vector modulation schemes, with and without a zero state in the rectifier stage modulation, are presented and their advantages and disadvantages are discussed. In addition, restrictions imposed on the converter operation in buck mode, which arise from unidirectional nature of the ultrasparse matrix converter, are discussed and a solution is proposed for offsetting those limitations. Furthermore, an optimal switching pattern, which results in minimum possible number of changes in the switching states as well as even distribution of the shoot-through state over the entire control period, is proposed. Also, common-mode voltages of the converter in all possible switching configurations are calculated. Hardware-in-the-loop studies of a ZSUSMC-based permanent magnet synchronous motor drive are carried out to evaluate the performance of the drive under the proposed modulation techniques. The obtained results are compared with a recent study and the superiority of the proposed method in terms of converter input/output current quality is demonstrated. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology of 3-$\phi$ , multilevel inverter (MLI) configuration for five or higher level operation with reduced switch count. The proposed solution consists of two basic units (BUs) of multilevel converter and a T-structured 3-level inverter (3-LI). Both BUs are equally shared by the three phases maintaining symmetry among the phases. Moreover, for a higher level operation of the proposed MLI, the modifications required are at two BUs only and not at three legs of the inverter. It further helps in reducing the requirement of extra components for higher level operation compared to the conventional solutions. Furthermore, the topology also has the benefits of reduced switching and conduction loss. An algorithm is also devised to generate the switching pulses for the BUs and the 3-LI, using a carrier-based space vector modulation technique. Presented topology is compared with other existing topologies to prove its advantage. All the details regarding the operating modes and pulse width modulation techniques employed for the proposed system are given and supported by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Adding the auxiliary switches to the conventional H-bridge inverter is an effective way to eliminate the leakage current for transformerless PV systems, such as H5, H6, etc. Inspired by the newly developed embedded-switch H6 topology, a novel embedded-switch inverter (ESI) is proposed in this paper for three-phase transformerless PV systems. First, the operation principle and characteristics of the proposed ESI are analyzed. Second, the common-mode model of the three-phase ESI is established, based on which the main factors that affect the leakage current are discussed. The finding reveals that the switching states with conventional modulation strategy result in high-frequency common-mode voltage, which is the source of leakage current. In order to solve the problem, a new modulation strategy is presented for ESI to eliminate the high-frequency leakage current. Finally, the time-domain simulation and the experimental tests are carried out. The results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper proposes a family of novel flying capacitor transformerless inverters for single-phase photovoltaic (PV) systems. Each of the new topologies proposed is based on a flying capacitor principle and requires only four power switches and/or diodes, one capacitor, and a small filter at the output stage. A simple unipolar sinusoidal pulse width modulation technique is used to modulate the inverter to minimize the switching loss, output current ripple, and the filter requirements. In general, the main advantages of the new inverter topologies are: 1) the negative polarity of the PV is directly connected to the grid, and therefore, no leakage current; 2) reactive power compensation capability; and 3) the output ac voltage peak is equal to the input dc voltage (unlike neutral-point-clamped and derivative topologies, which requires twice the magnitude of the peak ac voltage). A complete description of the operating principle with modulation techniques, design guidelines, and comprehensive comparisons is presented to reveal the properties and limitations of each topology in detail. Finally, experimental results of 1-kVA prototypes are presented to prove the concept and theoretical analysis of the proposed inverter family for practical applications. [ABSTRACT FROM PUBLISHER]

Grid-connected power conversion systems for renewable energy sources must fulfill several requirements, e.g., the high efficiency, the reduced cost and complexity, and, quite often, the boost capabilities that is usually achieved using a front-end dc–dc boost converter before the inversion stage, leading to a two-stage architecture. Meanwhile, single-stage power conversion systems, which perform the boosting operation within the inversion one, offer some potential advantages, in terms of reducing the complexity and the volume of the whole system. Among several proposed options, the split-source inverter (SSI) has been recently proposed by Abdelhakim et al. as an alternative option with some interesting features to the commonly used Z-source inverter. Taking into account that the SSI is controlled by a single parameter, i.e., its dc and ac sides are controlled by the modulation index, it is of paramount importance to investigate its control scheme in grid-connected mode, which has never been studied yet. Hence, this paper models the SSI dc side and proposes a modified modulation scheme combined with the commonly used synchronous reference frame control technique to achieve a decoupled control scheme of the SSI in grid-connected mode, i.e., the dc and the ac sides of the SSI can be controlled independently, which is convenient for many applications. The introduced control scheme is analyzed and simulated using a MATLAB/Simulink model, where a reduced scale 1-kVA grid-connected SSI is designed and simulated for the sake of experimental validation. Finally, the designed system is implemented experimentally to validate and verify the reported analysis and simulations. [ABSTRACT FROM PUBLISHER]

A new concept of dual-dc-port asymmetrical multilevel inverter (DP-AMI), which is able to interface a low-voltage dc port, a high-voltage dc port, and an ac port simultaneously using only one topology, is presented in this paper. A systematic method to derive the DP-AMI is proposed. With the proposed DP-AMI, a low-voltage dc source, e.g., photovoltaic (PV) modules or battery, can directly supply power to the ac load within single-stage power conversion. Therefore, in comparison with a traditional two-stage dc/ac power conversion system, the power conversion stages are reduced and the voltage/current stress of the front-end dc/dc converter can be significantly alleviated, which can improve the overall conversion efficiency dramatically. Furthermore, by using the low-voltage dc source as a new voltage level, asymmetrical multiple voltage levels are generated by the proposed DP-AMI, which is beneficial for the reducing switching losses and the size/volume of the output filter. The topology derivation method of the DP-AMIs is presented. The operation principles, modulation schemes, and characteristics of one of the proposed DP-AMIs are analyzed in detail. A 1-kW prototype is built and tested to verify the effectiveness and advantages of the proposed method. [ABSTRACT FROM PUBLISHER]

Parallel three-level T-type inverters (3LT2Is) can effectively increase the power rating. However, when multiple 3LT2Is are connected to a single dc bus, the zero-sequence circulating current (ZSCC) will occur. The ZSCC will distort the output currents and increase the system loss. To overcome this drawback, this paper proposes a novel deadbeat control scheme for the ZSCC suppression. A generalized model for analyzing ZSCC in parallel 3LT2 Is is developed for designing the deadbeat control method. The proposed deadbeat control scheme is realized by real time adjusting the dwell time of small vectors in each space vector modulation. Compared to the conventional PI control method, the influence of different sector is eliminated, thus, improving the output current waveform and reducing the ZSCC. The effectiveness of the proposed method is verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a modified cascaded neutral-point-clamped grid-connected inverter (MCNPC-GCI) to achieve a wide operational range and high European efficiency in the photovoltaic generation system. Two bidirectional thyristors are added into the standard single-phase cascaded neutral-point-clamped (NPC) inverter to, respectively, connect the positive and negative poles of the two NPC inverters to achieve the transformation between the cascaded NPC inverter and the equivalent single NPC inverter. The losses and grid current total harmonics distortions of the two topology modes are derived to determine their optimal operational ranges and an approach of online smoothly switching the two topology modes is proposed. Detailed experimental results of the proposed MCNPC-GCI are shown to verify its accuracy and feasibility. [ABSTRACT FROM AUTHOR]

The five-phase coupled-inductor inverter is a newly proposed option for three-level five-phase inverter drives. This paper comprehensively analyzes the inverter including the coupled-inductor current, current stress on the dc-link capacitors, and a comparison of these performance aspects using three pulse width modulation (PWM) strategies. Mathematical derivations of the inverter currents and the associated current stress reveal that the current stress is not only influenced by the choice of modulation strategy, as in the neutral-point-clamped topology, but also by the value of coupled inductance; furthermore, the choice of the modulation strategy impacts the core loss of the coupled inductors. Three carrier-based PWM methods are considered: sinusoidal PWM (SPWM), and two methods with the common-mode voltage reduction (referred to as CMVR1 and CMVR2) for the five-phase coupled-inductor inverter. CMVR2 is shown to be the best solution if common-mode voltage reduction is required. The analysis demonstrates that SPWM performs better with respect to current stress and inverter losses, therefore is the preferable modulating strategy for the five-phase coupled-inductor inverter if common-mode voltage reduction is not required. The analysis is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

The reduced capability of multilevel converters with more than one intermediate node to balance the dc-link capacitors voltage, as well as the lack of standard modulation methods to improve their balancing performance, makes these converter topologies unattractive for real power applications. This is especially true when the load demands active power. One of these topologies is the five-level multipoint clamped (5L-MPC) converter. The back-to-back (B2B) configuration of two 5L-MPC converters and the use of a space vector modulation (SVM) that exploits the voltage balancing capability of the redundant switching vectors extend the operation conditions range in which a proper voltage balance can be achieved. However, if practical modulation restrictions are considered (limitation of voltage steps, dead times, switching losses, etc.), the voltage balance cannot be achieved for all operation conditions. In this paper, an SVM which takes into account practical restrictions is proposed. In order to guarantee the voltage balance at any operation condition, the grid-side rectifier exchanges reactive power with the grid-side LCL filter. Thus, the voltage balance of the dc-link is guaranteed while a unity grid-side power factor is achieved. The proposed modulation scheme and the voltage balancing strategy are experimentally validated in a 6.6 kV 1.5 MW 5L-MPC B2B converter. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

Multilevel inverters are gaining more attention in ac drive application due to their many attractive features. In the case of conventional neutral-point-clamped (NPC) or flying capacitor multilevel inverter configurations, active switches are connected in series to produce multilevel output voltage waveform. Therefore, if any one switch fails, the entire configuration has to be shut down; this will reduce the reliability of the system. A dual three-level inverter configuration for induction motor drive is proposed in this paper to improve reliability of the system. This topology is developed by feeding four-pole induction motor stator winding with four conventional two-level inverter modules. A level-shifted carrier-based third harmonic injection pulsewidth-modulation technique is used to produce the gating signals for the proposed configuration. By providing proper phase shift between carrier waves, multilevel voltage waveform is produced across the total motor phase winding, and first center band harmonics are also canceled. Thereby, the torque ripple will be considerably reduced compared with conventional NPC five-level inverter-driven induction motor drive. Finite-element analysis (FEA) is used to estimate the torque ripple when induction motor is supplied by the proposed configuration and conventional five-level NPC inverter configuration to show the effectiveness of the proposed converter. The proposed configuration is simulated using MATLAB/Simulink and experimentally verified using a laboratory prototype with a 5-hp four-pole induction motor drive. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

Three-level topologies are widely used in back-to-back converters of wind turbine generation (WTG) systems. In comparison with a conventional two-level topology, three-level topologies have more advantages, particularly for the high power. Neutral-point clamped (NPC) and T-type are typical three-level topologies. An open-switch fault of a three-level rectifier that is connected to a permanent-magnet synchronous generator (PMSG) leads to the current distortion and torque vibration in WTG systems. Furthermore, WTG systems can break down in the worst case. Therefore, a tolerance control for open-switch faults is required to improve the reliability of WTG systems. WTG systems by applying the tolerance control can be stopped safely and prevent additional problems. Depending on the situation, it can keep the operation of WTG systems under open-switch fault. The effects of outer open-switch faults of three-level rectifiers are analyzed by considering PMSG specifications in this paper. Moreover, a tolerance control for outer open-switch faults of the NPC and T-type three-level rectifiers are proposed with existing tolerance controls for inner open-switch faults. The proposed tolerance control is to inject the exact $d$-axis current value to eliminate current distortion. The simulation and experiment are conducted to prove the feasibility of the proposed tolerance control and to identify its performance. [ABSTRACT FROM PUBLISHER]

This paper presents a novel combined-synchronous-rectifier high-frequency-link (CSR-HFL) inverter. Three types of conventional HFL inverters are analyzed and their performance is summarized. According to one of the conventional HFL inverters, i.e., cycloconverter-type HFL (CHFL) inverter, a combined rectifier topology is deduced. To prevent a shorted circuit, two additional switches are used in the new topology. The operation mode of the CSR-HFL inverter is analyzed and the mathematical relationships are given. The difference and correlation, and advantages and disadvantages, are analyzed between the CSR-HFL inverter and the conventional HFL inverter. The relevant grid-connected inverter, ac/ac converter, and full-wave CSR-HFL inverter are also given. The experimental results verify that the proposed CSR-HFL inverter has excellent performance and high efficiency. [ABSTRACT FROM PUBLISHER]

High-boost dc-ac inverters are used in solar photovoltaic (PV), fuel cell, wind energy, and uninterruptible power supply systems. High step-up and step-down capabilities and shoot-through immunity are some of the desired properties of an inverter for a reliable, versatile, and low-distortion ac inversion. The recently developed Z-source inverter (ZSI) possesses these qualities. However, the realization of ZSI comes at a cost of higher passive component count as it needs two sets of passive filters. A switched boost inverter (SBI) has similar properties as ZSI, and it has one L\-C pair less compared to ZSI, but its gain is less than ZSI. This paper proposes the current-fed switched inverter (CFSI) which combines the high-gain property of ZSI and low passive component count of SBI. The proposed inverter uses only one L\-C filter and three switches apart from the inverter structure. The inverter topology is based on current-fed dc/dc topology. Steady-state analysis of the inverter is presented to establish the relation between the dc input and the ac output. A pulse width modulation (PWM) control strategy is devised for the proposed inverter. An experimental prototype is built to validate the proposed inverter circuit in both buck and boost modes of operation. A 353-V dc-link and a 127 V (rms) ac are obtained from a 35.3-V dc input to demonstrate the boost mode of operation. A 200-V dc-link and a 10.5-V (rms) ac are obtained from a 37.8-V dc input to verify the buck mode of operation of CFSI. [ABSTRACT FROM PUBLISHER]

This paper proposes a multiple-input versatile matrix converter (VMC) for integrating hybrid ac/dc energy resources and storages to the power grid. The VMC is developed from the traditional indirect matrix converter but operates in the reverse-boost mode rather than in the forward-buck mode. The reverse-boost mode is more relevant here since most renewable sources and energy storages have lower voltages than the grid. The eventual VMC developed uses an alternative nine-switch converter, rather than usual six-switch voltage-source converter, for providing six input terminals in total. One three-phase ac source and three dc sources, or other source combinations, can therefore be connected to the VMC. Powers from these sources are channeled to the three-phase utility grid through the VMC's current-source inverter. Their proper dispatches are guaranteed by the proposed control and modulation schemes, which also help maintain near-sinusoidal input and output current waveforms. Mathematical proofs, simulation, and experimental results have shown that the VMC can indeed operate as intended. [ABSTRACT FROM PUBLISHER]

A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected H-bridges. The H-bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five- or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the H -bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region. [ABSTRACT FROM PUBLISHER]

Combining concepts of traditional multilevel converter and matrix converter (MC), the multimodular MCs (MMMCs) have reached the medium-voltage high-power level. These topologies possess features such as elimination of dc components and are able to output high-quality multilevel waveforms. Due to the MMMC's particular topological structure, modulation strategies for the conventional converters cannot be directly adopted. This necessitates the design of specially tailored modulation schemes for them to generate sinusoidal input/output waveforms. In this paper, indirect space-vector-based modulation techniques are proposed for the MMMCs. The study begins by establishing an indirect circuit model for the three-module MMMC topology, before using space vector calculations to derive duty ratios for the model's rectification and inversion stages. As the inversion stage can be viewed as multiple sets of three-phase outputs, its switching states and duty ratios are then converted and combined with those from the rectification stage. Finally, the gating signals are produced according to two switching patterns. As demonstrated by simulation and experimental results, the presented modulation techniques can generate sinusoidal waveforms with variable frequency and magnitude, as well as adjustable angle and power factor. The superiority of the second switching pattern is also proved by the obtained results. [ABSTRACT FROM PUBLISHER]

In this paper, a multilevel current-source inverter (MCSI) topology is analyzed. The issue of constructing a novel modular single-rating inductor MCSI is explored, taking advantage of the features of field-programmable gate arrays (FPGA) for control and gate signal generation. The proposed topology is built with identical modules where all inductors carry the same amount of current, simplifying the construction and operation of industrial applications with higher efficiency. A new state-machine approach, which is easy to implement in an FPGA, and a proper implementation of the phase-shifted carrier sinusoidal pulse width modulation (PSC-SPWM) allow both current balance in all modules and effective switching-frequency minimization. The performance of the MSCI proposed is simulated with Matlab and is verified by constructing a prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a novel matrix converter with one ac input and two ac outputs. The presented topology is based on the traditional indirect matrix converter, but with its rear-end six-switch inverter replaced by a compact nine-switch inverter. With only three extra switches added, the proposed converter can produce two sets of three-phase ac outputs, whose amplitudes, frequencies, and phases can appropriately be regulated. Features such as sinusoidal input and outputs, unity input power factor and minimum commutation count are all retained by the proposed topology, despite having an additional output. Its modulation is realized by the computationally less intensive carrier-based method, whose unique carrier requirements can easily be managed within a programmable logic device. Mathematical proof for validating sinusoidal input and outputs achieved by this modulation technique is also discussed, before being verified in simulation and experimentally, together with other findings. [ABSTRACT FROM AUTHOR]

There is a strong trend in the photovoltaic inverter technology to use transformerless topologies in order to acquire higher efficiencies combining with very low ground leakage current. In this paper, a new topology, based on the H-bridge with a new ac bypass circuit consisting of a diode rectifier and a switch with clamping to the dc midpoint, is proposed. The topology is simulated and experimentally validated, and a comparison with other existing topologies is performed. High conversion efficiency and low leakage current are demonstrated. [ABSTRACT FROM AUTHOR]

In this paper, a new five-level inverter topology for open-end winding induction-motor (IM) drive is proposed. The open-end winding IM is fed from one end with a two-level inverter in series with a capacitor-fed H-bridge cell, while the other end is connected to a conventional two-level inverter. The combined inverter system produces voltage space-vector locations identical to that of a conventional five-level inverter. A total of 2744 space-vector combinations are distributed over 61 space-vector locations in the proposed scheme. With such a high number of switching state redundancies, it is possible to balance the H-bridge capacitor voltages under all operating conditions including overmodulation region. In addition to that, the proposed topology eliminates 18 clamping diodes having different voltage ratings compared with the neutral point clamped inverter. On the other hand, it requires only one capacitor bank per phase, whereas the flying-capacitor scheme for a five-level topology requires more than one capacitor bank per phase. The proposed inverter topology can be operated as a three-level inverter for full modulation range, in case of any switch failure in the capacitor-fed H-bridge cell. This will increase the reliability of the system. The proposed scheme is experimentally verified on a four-pole 5-hp IM drive. [ABSTRACT FROM PUBLISHER]

This paper focuses on a new high-frequency (HF) link dc-to-three-phase-ac power converter. The least number of switching devices among other HF link dc-to-three-phase-ac converters, improved power density due to the absence of devices of bidirectional voltage-blocking capability, simple commutation requirements, and isolation between input and output are the integral features of this topology. The commutation process of the converter requires zero portions in the link voltage. This causes a nonlinear distortion in the output three-phase voltages. The mathematical analysis is carried out to investigate the problem, and suitable compensation in modulating signal is proposed for different types of carrier. Along with the modified modulator structure, a synchronously rotating reference-frame-based control scheme is adopted for the three-phase ac side in order to achieve high dynamic performance. The effectiveness of the proposed scheme has been investigated and verified through computer simulations and experimental results with 1-kVA prototype. [ABSTRACT FROM PUBLISHER]