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This paper presents a new approach to controlling and optimizing a single-stage boost-integrated full-bridge dc–dc converter for a stand-alone photovoltaic-battery-powered dc motor system by combining pulse-frequency modulation (PFM), pulsewidth modulation (PWM), and phase angle shift (PAS). Unlike most of the existing multiport dc–dc converters, which aim at regulating the output voltage (first- or second-quadrant operation), the dc motor load requires both voltage and current reversals (four-quadrant operation). The converter is able to perform three tasks simultaneously: maximum power point tracking (MPPT), battery charging/discharging, and driving the dc motor at variable speeds including bidirectional and stall motions. To achieve these control objectives, the boost inductor and the motor inductance operate in different modes such that PFM and PWM can be used to achieve MPPT and a wide motor voltage range, respectively. By properly adjusting the PAS of the duty cycles, the capacitor and battery rms current value can be reduced, while the operation of the converter remains unchanged, hence improving the conversion efficiency. Experimental results of a 26-W laboratory prototype converter confirmed the proposed design and operation and the efficiency improvement by 2–6%. [ABSTRACT FROM AUTHOR]

In this paper, a novel integrated interleaved dual-mode time-sharing inverter (IIDMI) is proposed for grid-tied transformerless photovoltaic (PV) applications. While the dual-mode time-sharing conversion technique ensures minimum losses, the IIDMI also retains the advantages of interleaved topologies, such as low total harmonic distortion of the ac current with reduced filtering requirements, increased power density, and reduced current and thermal stresses of power devices. The leakage current problem, which is a main concern with the transformerless PV inverters, is solved by increasing the frequency of the main side band of the common-mode voltage above the resonance frequency of the common-mode impedance, while avoiding high switching losses. The current control, especially at transitions between the buck and the boost modes of operation, is highly improved by utilizing a fast-response deadbeat control scheme. The working principles of the IIDMI are explained in detail, and a 2.2-kW experimental prototype is implemented to confirm the theoretical achievements. [ABSTRACT FROM AUTHOR]

In this paper, a three-level quasi-switched boost T-type inverter (3L qSBT2I) is proposed. A new pulse-width modulated (PWM) control method is presented to reduce the inductor current ripple of the qSBT2 I. In the introduced PWM technique, the shoot-through duty cycle is maintained constant to keep the modulation index as high as possible. Then, the only control parameters of the qSBT2I are the duty cycles of the two additional switches. By controlling the duty cycles of the two additional switches, the voltage gain of the proposed qSBT2 I can be improved to a value larger than that of the conventional 3L impedance source inverters. The steady-state analysis, operating principles, and comparisons with the impedance source-based 3L inverters are presented. A 1-kW prototype is constructed to verify the operating principle of the 3L qSBT2I. An indirect dc-link voltage regulator and a capacitor voltage-balance controller are applied to the proposed qSBT2I. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Single-stage power-factor-corrected (S2PFC) power supplies usually suffer from high voltage stress, due to lack of control on the intermediate bus capacitor voltage. In the past, analysis of such voltage stress was mostly based on steady-state condition without providing sufficient explanation during the transient circuit operation. This paper revisits the problem at circuit level and reports that the root cause is due to the inherent negative current feedback property of the output inductor or the transformer operating in continuous conduction mode (CCM). Based on the finding, this paper further proposes a new approach to reducing the voltage stress by adding an auxiliary circuit branch to existing S2PFC converters. The additional circuit branch limits the effect of negative current feedback by suppressing the change of output current slope due to change of load. This assists the pulsewidth modulation controller to track the change of load better such that the bus capacitor voltage range is reduced through duty cycle control. The auxiliary circuit branch also reduces reverse-recovery-related losses of the converter under CCM operation. A laboratory prototype using the popular boost PFC converter combined flyback dc/dc converter was built and tested to confirm the analysis and effectiveness of the approach. [ABSTRACT FROM AUTHOR]

This paper suggests a cascade output voltage regulation strategy for dc/dc boost converters that embeds a robust inner-loop current controller against parameter variations. The contributions of this paper are divided into two parts. The first contribution is to present a simple and robust inner-loop current controller despite parameter uncertainties, guaranteeing the stability of the whole closed-loop system including the first-order internal dynamics. The second contribution is to show that an outer-loop proportional–integral regulator can stabilize the output voltage error without relying on any parameter information. Simulations and experiments using a 3-kW dc/dc boost converter showed that the proposed method offers satisfactory closed-loop performance in the presence of parameter uncertainties. [ABSTRACT FROM PUBLISHER]

Conventional zero-voltage and zero-current-switching (ZVZCS) full-bridge converters are widely used because they can realize zero-voltage switching (ZVS) for the leading leg and zero-current switching (ZCS) for the lagging leg. However, the large turn-off loss of the leading leg is still unacceptable in high-voltage high-power applications where insulated-gate bipolar transistors (IGBTs) with current tailing are employed. Hence, it is preferable to achieve ZCS for all IGBTs of full-bridge converters. This paper analyzes the ZCS conditions for pulsewidth modulated (PWM) full-bridge converters and proposes a general strategy for achieving ZCS for main switches, including the control strategy and design method of the topology. Based on this theory, a novel ZCS PWM full-bridge converter with simple auxiliary circuit is derived and tested. It can achieve ZCS not only for the main switches of full-bridge converter, but for the auxiliary switch as well, and obtain high efficiency. The operation principle of the proposed ZCS PWM full-bridge converter and the design procedure are presented. The experimental results of a 600 V/2.5 kW prototype are also included to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Cascaded multicell converter (CMC) is proved to be an effective solution for medium voltage drives. Three-phase diode bridge rectifiers are normally used in this converter, which do not have regeneration capability. Pulsewidth-modulated (PWM) rectifier-based power cells enable the drives with regeneration capability. However, due to their two-level voltage operation at the input side, an inductor is required for each cell to filter out the switching frequency components from the input current. In this paper, a new configuration with single-phase PWM rectifier-based power cell is proposed to achieve multilevel voltage operation at both the input and output sides of the converter. Therefore, the devices at the rectifier side are also operated at reduced switching frequency without using any filter inductor for each cell. In the proposed converter, simple modular transformers are used instead of a single large and complex transformer that is used in the conventional CMC. Further, input phase currents of the converter are controlled in the synchronously rotating d–q frame, which requires only two current sensors at the input side instead of individual current sensors for each cell. Experimental validation of the proposed converter configuration is carried out on a 4.5-kVA prototype, and the results are presented. [ABSTRACT FROM PUBLISHER]

This paper extends the trans-Z-source concept to ac–ac power conversion and proposes a novel single-phase trans-Z-source ac–ac converter. The proposed converter retains the advantages of its existing Z-source/quasi-Z-source counterparts in which the output voltage can be boosted and in-phase with the input voltage or bucked/boosted and out-of-phase with the input voltage. Meanwhile, a coupled inductor is introduced into the proposed converter, and the turns ratio of the coupled inductor become another control variable beside the duty cycle to obtain extreme voltage gain. Importantly, the input voltage and output voltage share the same ground, and the input current could be continuous, which is a benefit for reducing input current harmonics. Most important of all, the safe-commutation strategy for the proposed converter is deep developed, and analytic expression between the switches state and loop circuit voltage/current condition is derived out. Hence, the current/voltage ripple can be avoided without a loss snubber circuit, which benefits a reduced cost and enhanced reliability. The performance analysis is discussed in consideration of parasitic resistance, and system parameter design is optimized based on theoretic calculation. A laboratory prototype is fabricated, and experiments are performed to verify the validation of the proposed converter. [ABSTRACT FROM PUBLISHER]

The parallel three-phase grid-connected converters sharing dc and ac bus can increase the system power level effectively. However, the circulating current will occur inevitably. The existing studies primarily focus on dc, fundamental, and low-frequency circulating current. The high-frequency circulating current (HFCC) caused by asynchronous carriers is studied emphatically in this paper, which is based on the analysis of the change of circulating current in one control cycle. A novel method to suppress HFCC caused by asynchronous carriers of modules is proposed. In this method, the carrier period of slave module is adjustable and the carrier period of the master module is constant. When a large phase shift between modules occurs, an adjusting cycle is inserted to carrier of slave module to realize resynchronizing with master module. It is noted that there is no other commutation between the two modules (expect the dq current reference), such as the carrier information. Finally, the feasibility and effectiveness of the proposed method are verified by experiments. [ABSTRACT FROM PUBLISHER]

A fixed-frequency pulse width modulation (PWM) controlled bidirectional current-fed series-resonant converter is proposed in this paper. The proposed bidirectional resonant converter is derived based on integration of a bidirectional boost/buck converter and a dual-active-bridge series-resonant converter. The most attractive feature of the proposed bidirectional resonant converter is that its voltage gain is only determined by the duty cycle of primary-side switches and has nothing to do with the transferred power. Therefore, the direction and amplitude of the transferred power can be easily regulated continuously and smoothly. In addition, with the help of an auxiliary inductor, zero voltage switching can be achieved for all the active switches on both primary and secondary sides within the entire operation range. Furthermore, the converter is suitable for wide voltage applications because its voltage gain can be regulated in a wide range. The operational principles and characteristics of the proposed bidirectional resonant converter are analyzed in detail. The feasibility and effectiveness of the proposed converter are fully verified by the experimental results from a 1.6 kW prototype. [ABSTRACT FROM AUTHOR]

A two-switch semiquadratic fifth-order buck converter belonging to a minimum-phase family is proposed in this paper. The proposed converter exhibits better dynamic performance, steady-state voltage gain in between conventional buck and quadratic buck converter. In view of this characteristic, it gives more bucking than the traditional buck converter. A time-domain analysis is formulated to predict the converter's steady-state performance. Also, the equations for designing the energy storage elements are established. Salient performance features, voltage bucking and source current ripples, of the proposed converter are compared to other competing/reported buck topologies. Transfer functions are obtained through state-space models, and then these are used in the controller design studies. The converter stabilization characteristics are studied through simulations. The analytical predictions and key features of the proposed converter are verified through experimental results. [ABSTRACT FROM AUTHOR]

Semiactive quadrupler rectifiers (SAQRs) are proposed in this paper to serve as the secondary rectification circuits, which make the secondary-side voltages to be controllable and help reduce current stress and conduction losses. An interleaved isolated boost converter is developed based on the proposed SAQRs. By utilizing the pulse-width modulation (PWM) plus phase-shift (PPS) control strategy, the primary- and secondary-side voltages are well matched to reduce the current values and circulating conduction losses. With the proposed SAQRs, the voltage gain is extended and the voltage stresses on power devices and passive components used in rectification circuits are reduced to the half of the high output voltage. Hence, the efficiency is improved by using a transformer with a smaller turns ratio and reduced parasitic parameters, and by employing low-voltage rating devices with better switching and conduction performance. With optimal design, lower voltage, and current stresses on the primary-side switches, minimized input current ripple can be realized. Moreover, the zero-voltage turn on switching of the active switches and the zero-current turn off switching of the diodes can be achieved over a wide load and voltage range by the proposed SAQR-based converter and the control strategy. Meanwhile, the higher voltage gain, the lower voltage, and the current stresses on power devices can be obtained with the proposed SAQR-based converter compared with passive quadrupler rectifier-based converter. The feasibility and effectiveness of the proposed SAQRs and the derived converter are verified by a 380-V output prototype. [ABSTRACT FROM PUBLISHER]

It is known that the ripple-based control of a switching dc–dc converter benefits from a faster transient response than a conventional pulse width modulation (PWM) control switching dc–dc converter. However, ripple-based control switching dc–dc converters may suffer from fast-scale oscillation. In order to achieve fast transient response and ensure the stable operation of a switching dc–dc converter over a wide load range, based on a conventional pulse train (PT) control technique, a peak capacitor current PT (PCC-PT) control technique is proposed in this paper. With a buck converter as an example, the operating modes, steady-state performance, and transient respond performance of a PCC-PT controlled buck converter are presented and assessed. To eliminate fast-scale oscillation, circuit and control parameter design considerations are given. An accurate discrete iteration model of a PCC-PT controlled buck converter is established, based on which the effects of circuit parameters on the stability of the converter operating in a discontinuous current mode (DCM), mixed DCM-continuous conduction mode (CCM), and CCM are studied. Simulation and experimental results are presented to verify the analysis results. [ABSTRACT FROM PUBLISHER]

Carrier-based pulsewidth-modulation (CBPWM) techniques are popular due to their simplicity, and have been widely researched for various three-phase inverter configurations. In this paper, two CBPWM techniques are proposed to reduce the common-mode (CM) voltage generated by the five-phase inverter. The five-phase inverters have more flexibility in reducing the CM voltage than their three-phase counterparts because they have more phase legs, hence finer control over the star-point voltage of the load. Two methods are proposed for the conventional two-level five-phase inverter to reduce the CM voltage; one utilizing adjacent modulating waveforms and the other utilizing nonadjacent modulating waveforms. The coupled inductor inverter (CII) uses coupled inductors to generate multilevel outputs. As the volt-second balance must be maintained across each coupled inductor, direct application of the proposed methods on the CII inverter will result in overcurrents in the coupled inductors. Hence, the proposed methods are further improved to ensure the volt-second integral over each switching period is zero. Moreover, the two proposed methods are designed to reduce switching events and prevent unexpected states occurring during the switching transitions. The performance and the switching strategy of both methods are verified by both simulations and experiments on a prototype of five-phase CII. [ABSTRACT FROM AUTHOR]

The three-level boost power factor correction (PFC) converter has advantages of lower inductor current ripple and lower switch withstanding voltage compared with the boost PFC converter. Interleaved pulsewidth modulation had been used in the multiphase boost PFC converter. In the literature, interleaved current sensorless control (ICSC) for the multiphase boost PFC converters had been proposed. In this paper, the behavior of the three-level boost PFC converter is first analyzed. The results show that three-level converter has the same average equation as the interleaved boost PFC converter. Then, ICSC is modified for the three-level boost PFC converter with considering the voltage imbalance and the zero-crossing current distortion. The proposed modified ICSC (MICSC) is implemented in a field-programmable gate array board. Simulation results and experimental results are also provided to validate the proposed MICSC. [ABSTRACT FROM PUBLISHER]

Bulky electrolytic capacitors, which are often needed in dc systems to filter out voltage ripples, considerably reduce power density and system reliability. In this paper, a ripple eliminator, which is a bidirectional buck–boost converter terminated with an auxiliary capacitor, is adopted to replace bulky capacitors in dc systems. The voltage ripples on the terminals (i.e., the dc bus) can be transferred to the auxiliary capacitor, and the ripples on the auxiliary capacitor can vary in a wide range. Moreover, the average voltage of the auxiliary capacitor can be controlled either lower or higher than the dc-bus voltage, which offers a wide operational range for the ripple eliminator and also the possibility of further reducing the auxiliary capacitance. Hence, the total capacitance required can be much smaller than the originally needed. After proposing a control strategy to transfer the voltage ripples to the auxiliary capacitor, three control strategies are proposed to regulate the auxiliary-capacitor voltage to maintain proper operation. Intensive experimental results are presented to demonstrate the performance. [ABSTRACT FROM PUBLISHER]

The propagation delay of a comparator and dead time causes the duty-discontinuity region near the boundary of the step-down and step-up regions in a non-inverting buck–boost (NIBB) converter. The duty-discontinuity region leads to an unstable output voltage and an unpredictable output voltage ripple, which might cause the entire power system to shut down. In this paper, a mode-transition technique called duty-lock control is proposed for a digitally controlled NIBB converter. It locks the duty cycle and eliminates the error between the output voltage and the reference signal by using a proposed fixed reference scheme that ensures the stability of the digital controller and output voltage. The experimental results that were applied to a field-programmable gate array-based platform revealed that the output voltage of the NIBB converter is stable throughout the entire transition region, without any efficiency tradeoffs. The input voltage of the converter that was provided by a Li-ion battery was 2.7–4.2 V, and the output voltage was 1.0–3.6 V, which is suitable for radio-frequency power amplifiers. The switching frequency was 500 kHz, and the maximum load current was 450 mA. [ABSTRACT FROM PUBLISHER]

This paper proposes the pulsewidth modulation (PWM) strategy of Z-source inverters (ZSIs) with minimum inductor current ripple. In existing PWM strategy with single-phase shoot-through, the shoot-through time interval is divided into six equal parts, therefore the three phase legs bear the equal shoot-through time interval. In this manner, the allotment and arrangement of the shoot-through state is easy to realize, but the inductor current ripple is not optimized. This causes to use relatively large inductors. In the proposed PWM strategy, the shoot-through time intervals of three phase legs are calculated and rearranged according to the active state and zero state time intervals to achieve the minimum current ripple across the Z-source inductor, while maintaining the same total shoot-through time interval. The principle of the proposed PWM strategy is analyzed in detail, and the comparison of current ripple under the traditional and proposed PWM strategy is given. Simulation and experimental results on the series ZSI are shown to verify the analysis. [ABSTRACT FROM PUBLISHER]

This paper describes a theoretical and experimental study on a control strategy for the parallel operation of single-phase voltage source inverters (VSI), to be applied to uninterruptible power supply. The control system for each inverter consists of two main loops, which both use instantaneous values. The first (parallelism control) employs the feedback of the inductor current from the output filter to modify the input voltage of the same filter and, therefore, to control the power flow of each inverter to the load. Additionally, the second loop (voltage control) is responsible for controlling the output voltage of the LC filter, which coincides with the output voltage of the VSI. Due to the fact that there is no exchange of information among the VSIs regarding their operation points, it is easier to obtain redundant systems. Furthermore, the connection (or disconnection) of inverters in a parallel arrangement is carried out directly, without connection impedance, and can occur at any operation point of the system. The proposed control strategy ensures the proper sharing of the load current and avoids current circulation among the inverters during transient and steady-state operation. Moreover, its design and implementation are very simple. The control technique was verified through experimental results with a maximum load of 10 kVA supplied by three parallel-connected inverters. [ABSTRACT FROM PUBLISHER]

In this paper, a cascaded current–voltage control strategy is proposed for inverters to simultaneously improve the power quality of the inverter local load voltage and the current exchanged with the grid. It also enables seamless transfer of the operation mode from stand-alone to grid-connected or vice versa. The control scheme includes an inner voltage loop and an outer current loop, with both controllers designed using the H^\infty repetitive control strategy. This leads to a very low total harmonic distortion in both the inverter local load voltage and the current exchanged with the grid at the same time. The proposed control strategy can be used to single-phase inverters and three-phase four-wire inverters. It enables grid-connected inverters to inject balanced clean currents to the grid even when the local loads (if any) are unbalanced and/or nonlinear. Experiments under different scenarios, with comparisons made to the current repetitive controller replaced with a current proportional–resonant controller, are presented to demonstrate the excellent performance of the proposed strategy. [ABSTRACT FROM PUBLISHER]

This paper presents a control strategy for input-series–output-parallel (ISOP) modular inverters. Each module is a high-frequency (HF) ac link (HFACL) inverter composed of an HF inverter, an HF transformer, and a cycloconverter. A PWM sequence generation based on DSP control is given, with which the circulating currents among all the constituent modules can be avoided automatically. To achieve input voltage sharing (IVS) and output current sharing (OCS) among the constituent inverter modules, a stable OCS scheme, which consists of one common output voltage regulation (OVR) loop and individual inner currents loops, is proposed. The OVR loop provides a common reference for all individual inner current loops, in which the current feedback for an individual module is the sum of all the other output currents instead of its own. The compensator designs of the OVR loop and individual inner current loops are also presented. With this control strategy, excellent IVS and OCS can be obtained. The effectiveness of the proposed control strategy is verified using the simulation and experimental results of a 1100-VA ISOP two-HFACL inverter system. [ABSTRACT FROM PUBLISHER]

A simple current sharing control technique for the switching power supply is presented herein, whose basic concept is that the control effort created from the voltage loop is finely tuned by the control effort created from the current sharing loop based on the proposed phase link so as not only to obtain the desired output voltage but also to make the load current distributed among phases as evenly as possible. Such a control method is not only without any current sharing bus as compared with the traditional current sharing methods, but also suitable for multiple phases under the condition that any one phase among multiple phases fails. Moreover, based on phase link, there is no divider used, as compared with the traditional average current method, and hence, the number of logic elements in the field-programmable gate array (FPGA) can be reduced. In this paper, the detailed basic operating principles, together with new mathematical deductions based on the superposition concept, are firstly described, and secondly some experimental results, based on the FPGA to realize the fully digitalized control of the overall system using one-comparator counter-based sampling without any analog-to-digital converter (ADC), are provided to verify the effectiveness of proposed control strategy. [ABSTRACT FROM PUBLISHER]

Some errors in the three-arm automatic voltage regulator in the paper “Three-Arm AC Automatic Voltage Regulator” by Wu (IEEE Trans. Ind. Electron, vol. 58, no. 2, pp. 567–575, Feb. 2011) are pointed out, and a technique for correcting these errors is given. [ABSTRACT FROM AUTHOR]

Reducing energy consumption is very important in solving the problem of energy crisis and environmental problem. Usually, an elevator with a diode rectifier wastes regenerated power from its electric motor as heat on breaking resistors. This paper proposes an energy feedback digital system used in an elevator of 18.5 kW which is capable of recycling the regenerated power: obtaining near-unity power factor, sinusoid output current, and low total harmonic distortion in generator-operation state. It has reliable protection circuits and cute man–machine interface, and the feedback point of the dc voltage can be set arbitrarily in a certain extent, meeting the large-range variation of power system voltage. Field operation results showed good performance and energy-saving effect. [ABSTRACT FROM AUTHOR]