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Modular multilevel converter (MMC) has been a promising candidate in high voltage direct current (HVdc) transmission systems. Due to the features of simple structure, low cost, and low power losses, half-bridge (HB) is usually adopted as the submodule circuit in the traditional MMC. However, an HB submodule circuit-based MMC does not have the capability of blocking dc short-circuit fault, which obstructs the development of low-cost HVdc systems with overhead lines. In order to solve this problem, an MMC with active clamped T-type submodule (ACTSM) to own dc fault blocking capability is proposed in this paper. Compared with other submodule circuits, the proposed ACTSM has many features, such as symmetrical blocking capability, low power losses, low voltage stress, and low amount of independent drive signals. The topology, operation principle, dc fault blocking capability, and distribution of power losses of the ACTSM are presented in this paper. The effectiveness of the ACTSM-based MMC is validated by both simulations and experiments. [ABSTRACT FROM AUTHOR]

Gallium-nitride-field-effect transistors (GaN-FETs) are promising switching devices with fast switching capability. However, they commonly have low gate threshold voltage, suffering from susceptibility to the false triggering. Particularly, the oscillatory false triggering, i.e., a self-sustaining repetitive false triggering, can occur after a fast switching, which is a severe obstacle for industrial applications. The purpose of this paper is to elucidate the design instruction for preventing this phenomenon. The oscillatory false triggering is known to be caused by the parasitic oscillator circuit formed of a GaN-FET, its parasitic capacitance and the parasitic inductance of the wiring. This paper analyzed the nonoscillatory condition of this oscillator. The result revealed an appropriate ratio between the gate-drain capacitance and the common-source inductance is a key to prevent the oscillatory false triggering. Experiment successfully verified this analysis result, supporting the effectiveness of the appropriate design of this ratio for preventing the oscillatory false triggering. [ABSTRACT FROM AUTHOR]

This paper presents a new modular ac/dc step-up soft-switched converter with unity turns ratio high-frequency transformers for medium-voltage (MV) dc grid in wind energy systems. In the proposed converter, the three-phase boost rectifier is combined with step-up resonant circuits and high-gain output rectifier modules (called voltage quadrupler modules) to form a modular step-up power conversion unit. As a result, the proposed converter is able to achieve very high voltage gain without using any medium-to-high frequency transformers with very large turns ratio, which greatly simplifies the insulation requirement and design of the high-frequency transformer. In addition, soft-switching operations are achieved in all the semiconductor devices to maintain high efficiency. The techniques to ensure voltage balancing across the dc-link capacitors and to achieve output short-circuit protection will be discussed in this paper. To realize high-frequency MV operation, silicon carbide (SiC) devices are utilized in the converter implementation on a 1.5 MW, 690 VAC/40 kV converter system to validate the performance of the proposed circuit. Experimental results on a 3.5 kW, 145 VAC/6.2 kV, 95.4% efficiency SiC-based laboratory-scale proof-of-concept prototype are then provided to highlight the merits of this work. [ABSTRACT FROM AUTHOR]

The neutral-point voltage-balancing control is a critical issue of a neutral-point-clamped converter. The conventional control strategy is to inject the specific zero-sequence voltage to regulate the redundant vector, but it is unacceptable to the three-phase four-wire system. This paper provides a neutral-point voltage-balancing control by the dipolar modulation, and the control freedom of the zero-sequence voltage is flexible. Therefore, the proposed method is suitable for both three-phase three-wire and three-phase four-wire systems. Besides, the proposed method improves the control dynamic in a reactive power system. The proposed neutral-point voltage-balancing control is verified by the mathematical analysis and experimental results. The control dynamic, power loss estimation, and the output current performance are analyzed in this paper. [ABSTRACT FROM PUBLISHER]

DC microgrid is gaining attraction and a recent trend in distribution power generation system due to penetration of renewables (especially photovoltaic or fuel cell). In this paper, a new triple-switch-triple-mode high step-up converter (TSTM-HS converter) is presented for dc microgrid applications. In the proposed converter, voltage lift technique is employed and range of duty cycle is extended by incorporating an additional switch in converter circuitry. By doing this, high voltage conversion ratio is achieved without using a transformer, coupled inductor, and multiple stages of switched capacitors. Moreover, the TSTM-HS converter operated in three modes with two types of the duty cycles to achieve low to high voltage conversion without using high duty cycle for each switch. The effects of difference in the inductance values on the regulation and operating behavior of the TSTM-HS converter are discussed. The continuous conduction mode and discontinuous conduction mode characteristics of the TSTM-HS converter are discussed in detail with steady-state analysis and boundary condition. The comparison is provided to highlight the benefits of the TSTM-HS converter. The selection of semiconductor devices and the design of reactive components are discussed for the TSTM-HS converter. The experimental results of the proposed converter are provided which validate the theoretical approach, performance, and feasibility of converter. [ABSTRACT FROM AUTHOR]

Recently multilevel inverters (MLIs) have received wide attention from industry and academia, as they are changing into a viable technology for diverse applications. To produce high-quality output using less switch count, development of novel reduced switch MLI (RS MLI) topologies has been a focus of current research theme. This paper presents design and control of a switched-diode dual source single switch MLI (SDDS MLI). The generalized SDDS MLI is first designed using an asymmetric basic unit. Proposed SDDS MLI requires less switch count and driver circuit count compared with the few recently developed RS MLI topologies. To improve the voltage quality by eliminating targeted low-order harmonics, a modified version of fish swarm optimization algorithm is examined for computing optimum switching angles required to control the SDDS MLI. Moreover, suitability and superiority of the derived algorithm are established by comparing with traditional selective harmonic elimination techniques. The developed topology is investigated through several MATLAB simulations as well as experimental tests in the laboratory applying the modified control approach. [ABSTRACT FROM AUTHOR]

A gate driving for power devices is a key technology to further improve switching characteristics. With the help of digital gate driver IC, the switching behavior of power devices can be enhanced even under high-speed switching. In this paper, an evaluation platform for determining the optimal switching pattern of an active gate drive control is proposed for an inverter circuit. A high speed optimization system is built up to search for an advantageous switching pattern that reduces total switching loss of two power devices in an inverter circuit and constrains surge voltage simultaneously. The proposed online optimization demonstrates its feasibility for the full-bridge inverter circuit, which is rated at 500 V with digital active gate drive control. Experimental results show that the proposed optimization system is able to obtain optimal switching pattern from $64^{60}$ possible combinations of switching patterns within 15 min, which is 6 times faster than the previous study. Optimizations can also conducted under different load current conditions. Eventually, the obtained optimal pattern yields up to 42% reduction in the total switching loss when it constrains surge voltage to minimum compared with the conventional driving pattern. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

Parallel ac-link universal power converters are a relatively new class of power converters that can be configured as dc–dc, dc–ac, ac–dc, and ac–ac. These converters are extensions of a buck–boost converter in which the current of the inductor is alternating and the input and output can have any number of phases with any forms, voltage amplitude, or frequency. By placing a small capacitor in parallel with the link inductor, all the switches can benefit from soft switching. The main limitation of the parallel ac-link universal power converter is its large number of switches. A three-phase ac–ac configuration requires 24 unidirectional switches. This paper proposes two topologies based on the parallel ac-link universal power converters that significantly reduce the number of switches. One of the proposed topologies reduces the number of switches in a three-phase ac–ac configuration to 16. The other topology reduces the number of switches to 10. The latter can offer galvanic isolation with only a single-phase high-frequency transformer. This paper presents the principles of the operation of the proposed topologies and evaluates them through simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a single-stage single-switch light-emitting diode (LED) driver that integrates a buck–boost circuit with a Class-E resonant converter by sharing single-switch device. The buck–boost circuit, working as a power-factor correction (PFC) stage, operates in the discontinuous conduction mode (DCM) to shape the input current. The Class-E converter steps down the voltage to drive the LED. For specific component parameters, the Class-E converter can achieve soft-switching on the power switch and two rectifier diodes, and reduce switch losses at high frequencies. Electrolytic capacitors are used in the proposed converter to achieve a lower cost, but the system reliability decreases. To overcome this disadvantage, film capacitors can be used, but the current ripple increases. Neglecting the cost, multilayered film capacitors are the best option, if higher reliability and lower current ripple are required. The proposed driver features high efficiency (90.8%), and a high power factor (PF) (0.995). In this paper, analytical results and design considerations at 100 kHz are presented, and a 100-W prototype with 110 \textV\text{AC} input was built to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

A single-phase bridgeless Cuk ac/dc power factor correction (PFC) rectifier with positive output voltage is proposed in this paper. For low output voltage product applications, the rectifier is designed to convert high input voltage to low output voltage. Due to no bridge diodes required and thus decreased input conduction losses, the proposed rectifier efficiency can be improved. The proposed rectifier operates in discontinuous conduction mode, and the current-loop circuit is hence not needed. In addition, only a single switch is used in the rectifier to simplify the control circuit design. A simple translation method to have the positive output voltage in the Cuk converter is presented in the rectifier to reduce the component counts and the cost. The operational principles, steady-state analysis, and design procedure of the proposed rectifier are addressed in detail in this paper. Simulation and experimental results obtained from a 150-W rated prototype circuit with input of 90–130 Vrms, 60 Hz, and output of 48 Vdc have verified the validity of the proposed rectifier. [ABSTRACT FROM PUBLISHER]

This paper presents a fault identification and tolerant method for switched reluctance motor (SRM) drives. The reliability of a power transistor in a power converter is the source of most problems in several industrial applications. It is critical to correctly diagnosis the faults occurring in a drive system to avoid harmful accidents and to ensure continuity of operation. In this paper, two types of faults, namely, short- and open-circuit faults, are analyzed on the basis of the current patterns of the power transistors of SRM drives. A fault is detected when the measured amplitude of the current differs from that of the normal-state current. A fault-tolerant scheme is applied according to the type of fault. Simulations and experiments are performed on a 1.0-kW SRM drive. The results are presented to verify the validity of the proposed method. [ABSTRACT FROM PUBLISHER]

Soft-switching ac-link universal power converters, also called partial resonant converters and ac-link buck–boost converters, have received noticeable attention during the last few years. In these converters, each of the inputs and outputs can be dc, single-phase ac, or multiphase ac; therefore, they can be used for dc–dc, dc–ac, ac–dc, or ac–ac power conversion systems. The soft-switching ac-link universal power converters are compact, reliable, and expected to offer longer lifetime compared with the other types of converters. However, they require more switches, which make the control process more involved. The sparse ac-link buck–boost converters were proposed to partially solve this problem. The sparse configuration reduces the number of switches from 24 to 20 in a three-phase ac–ac configuration. This paper proposes a modified configuration, which further reduces the number of switches without changing the principles of operation. This converter, which is named ultrasparse ac-link buck–boost converter, reduces the number of switches from 24 to 16, in a three-phase ac-to-ac case, and from 20 to 10, in a dc-to-three-phase-ac configuration. The proposed converter is applicable to systems with unidirectional flow of power, such as PV and wind power generation systems. This converter is expected to offer higher reliability compared with the original converter and higher reliability and efficiency compared with the sparse configuration. Another important feature of this configuration is that it can be fabricated by insulated-gate bipolar transistor modules, which are more compact and more cost effective compared with discrete devices. This paper presents the principles of the operation of this configuration and compares the efficiency, the failure rate, and the current rating of the switches in the ultrasparse, sparse, and original configurations. Moreover, it evaluates the performance of the proposed converter through simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a space vector modulation (SVM) strategy for asymmetrical cascaded multilevel converters operating under fault conditions on the power cells. During each switching interval, one voltage vector is chosen to be implemented by the high voltage cells. It is then subtracted from the reference, resulting in a new reference for the low voltage cells. However, under fault conditions, if the high voltage vectors are not properly chosen, the converter may saturate. This paper presents a comparison between the choice of the high voltage vector as the nearest one to the reference, and as the one whose domain encompasses it. It is shown that the second choice is better, as it avoids saturation of the converter as much as possible. The proposed SVM is performed in the output line-to-line voltages coordinate system, in which the converter voltage vectors have only integer entries. The algorithm is presented considering as an example a converter with two cells per phase: one of 1 pu that switches with PWM, and one of 2 pu, switching at the fundamental frequency, respectively called low-voltage-high-frequency and high-voltage-low-frequency cells. Finally, experimental results are given to demonstrate and validate the good performance of the proposed SVM. [ABSTRACT FROM AUTHOR]

In this paper, a new T-type inverter topology based on multistate switching cell is proposed. The topology presents five-level voltage before the output $LC$ filter, providing high-order harmonics that are easily filtered. In this topology, the output filter ripple frequency is twice the switching frequency, therefore reducing the magnetic weight and volume. Other characteristics of the inverter are current sharing through the devices, facilitating its losses' dissipation, due to increased contact area and few involved components in the current flow path. In order to verify its feasibility, a design example, as well as experimental results, for a 5-kW prototype is presented in this paper. [ABSTRACT FROM AUTHOR]

This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper. [ABSTRACT FROM AUTHOR]

A constant switching frequency hysteresis controller based on current error space vector (CESV) for two-level voltage source inverter fed induction motor (IM) drive is proposed in this paper. Here the stator voltages along the α- and β-axes are estimated using current error information and steady-state model of IM. Estimated stator voltages, switching dwell times, and instantaneous voltage error vectors are used in the online hysteresis boundary computations. The steady-state CESV boundaries and the phase voltage normalized harmonic spectrum of the proposed hysteresis controller at different speeds resembles that of a constant switching frequency voltage-controlled bus clamping pulse-width modulation-based drive. The proposed controller exhibits adjacent voltage vector switching, fast dynamic response under transient conditions, and has a simple controller implementation. The superior performance of the proposed controller is simulated using MATLAB/Simulink platform and experimentally verified on a three-phase 2.2 kW IM drive. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-gain soft-switching dc–dc topology based on a switched inductor boost converter (SIBC). A conventional SIBC as a high gain boost topology has the issues of high conduction loss in switching diodes and high switching loss in the main switches. Also, it has severe electromagnetic interference (EMI) issue due to high-frequency ringing formed by parasitic inductance and diode junction capacitors. The new topology is derived with the objective of achieving zero voltage switching (ZVS) turn on of the main switch. Instead of adding extra active clamp zero voltage transition (ZVT) path at the switching node, the proposed topology augments the auxiliary ZVT path to the switching diode path. This is achieved by replacing the switching diodes with synchronous switches. The new topology can achieve soft switching for all the switches and alleviate the EMI issue. All the diodes achieve zero current switching (ZCS) turn off without reverse recovery. Auxiliary switches have ZCS turn on and ZVS turn off, and the main switches have ZVS turn on. The soft-switching SIBC also reduces the conduction loss in the switching diodes. A numerical simulation in PLECS and a prototype hardware are built corresponding to a micro-inverter application with 100 kHz switching frequency. Peak power conversion efficiency of 94.76% is achieved in the hardware prototype with Si devices. [ABSTRACT FROM PUBLISHER]

Space vector modulation (SVM) is a widely used method for multilevel inverters. Most of the SVM methods are nearest three vector (N3V) based schemes. Therefore, several researchers have proposed advanced implementation algorithms with reduced complexity for N3V methods. However, topologies like neutral point (NP) clamped inverter (NPCI) require some distinctive methods (called as non-N3V methods) to balance NP voltage for high modulation index and low power factor operations. Currently, the existing non-N3V methods exercise highly complex algorithms for duty ratio calculation and subtriangle identification. This paper presents a new approach, suitable for both N3V and non-N3V methods, with reduced implementation complexity. The proposed algorithm is based on an equivalent two-level space vector diagram and does not require any trigonometry, coordinate transformation, or volt-second balance solution. Unlike other carrier-based methods, it can change the switching sequence as well as the duration of redundant vectors. Moreover, the proposed approach does not require extra steps for implementing hybrid modulation and it can also be extended to multilevel topologies. One N3V, two non-N3V, and hybrid methods are developed using the proposed modulation algorithm, and are compared in detail. Simulation and experimentation on a three-level NPCI verify the validity of the proposed algorithm. [ABSTRACT FROM PUBLISHER]

This paper presents the concept of three-phase module-integrated converters (MICs) incorporated in grid-tied large-scale photovoltaic (PV) systems. The current-source converter with dc voltage boost capability, namely the single-stage power conversion system, is proposed for the three-phase PV MIC system. A model predictive scheme with low switching frequency is designed to control the proposed topology in such a way that provides a certain amount of active and reactive power in steady-state operation and also provides a proper ratio of reactive power under transient conditions to meet the low-voltage ride through regulations. To predict the future behavior of current control values and switching states, a discrete-time model of the MIC is developed in the synchronous reference frame. It is demonstrated that the injected active and reactive power can be controlled by minimizing the cost function introduced in the predictive switching algorithm. The proposed structure is simulated in MATLAB/SIMULINK software. An experimental verification is provided to justify the performance of the proposed control method through a 300-VA laboratory prototype. The results verify the desired performance of the proposed control scheme for exchanging both active and reactive powers between the PV MIC and the grid within different operating conditions. [ABSTRACT FROM AUTHOR]

In this paper, an ultralow inductance power cell is designed for a three-level active neutral point clamped (3L-ANPC) based on 650-V gallium nitride (GaN) high electron mobility transistor (HEMT) devices. The 3L-ANPC topology with GaN HEMT devices and the selected modulation scheme suitable for wide-bandgap devices are presented. The commutation loops, which mainly contribute to voltage overshoots and increase of switching losses, are discussed. The ultralow inductance power cell design based on a four-layer printed circuit board with the aim to maximize the switching performance of GaN HEMTs is explained. The design of gate drivers for the GaN HEMT devices is presented. Parasitic inductance and resistance of the proposed design are extracted with finite-element analysis and is discussed. Common-mode behaviors based on the simulation program with integrated circuit emphasis (SPICE) model of the converter are analyzed. Experimental results on the designed 3L-ANPC with output power of up to 1 kW are presented, which verifies the performance of the proposed design in terms of ultralow inductance. [ABSTRACT FROM AUTHOR]

The effect of inverter dead time on the inverter output voltage is well studied in the literature. This paper studies the effect of the dead time on the inverter input current. An expression for the switching-cycle-averaged inverter input current including the dead time effect is derived, which shows the dead time effect to primarily result in a reduction in the average value of the inverter dc input current. The effect of dead time on the input current is incorporated into the dc-link dynamic model of a diode-bridge-rectifier (DBR) fed voltage source inverter (VSI). A switching-cycle-average model of a DBR-VSI-fed induction motor is proposed, which considers the effect of dead time on both the ac output voltage and dc input current of the VSI. The proposed average model is used to study the light-load instability phenomenon in a 100-kW open-loop motor drive. The proposed model is shown to predict the region of oscillatory behavior (i.e., region exhibiting light-load instability) with better accuracy than existing average models. The proposed model also accurately predicts the dc-link voltage swing at such oscillatory operating points. While being comparable in accuracy in predicting the system dynamics, the proposed model is much more computationally efficient than the state-of-the-art switching model. The validity of the proposed average model is also confirmed by experimental measurements on a 100-kW induction motor drive. [ABSTRACT FROM AUTHOR]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

A trend for low-power conversion system is to integrate every component to a single chip. Magnetic component has been the key to determine the power density of the integrated switching power converter. In this paper, a hybrid resonant buck-type converter with an ultracompact custom-designed coupled inductor is presented for low-power integrated on-chip applications. This converter achieves zero-voltage switching for the high-side switch and near zero-voltage zero-current switching for low-side and auxiliary switches. The soft-switching condition allows the circuit operating at high switching frequencies. An ultracompact planar coupled inductor with a dimension of 5.25 mm × 1.95 mm × 3.86 mm is designed and customized for future integrated on-chip applications. The high-power density of this magnetics component is achieved by high switching frequency and optimized printed circuit board (PCB) windings design. A hardware prototype with 24 to 60-V input and 3.3 to 5-V, 3-A output operating at 2–3 MHz is presented to verify the circuit operation. The prototype achieves a peak efficiency of 90.7% using silicon devices at 2-MHz switching frequency. [ABSTRACT FROM PUBLISHER]

The series-resonant dc–dc converter (SRC) is widely applied in a large range of voltage and power. In most applications, fault tolerance is a highly desired feature and it is obtained through redundancy. This paper proposes a fault-tolerance solution for the SRC, which could drastically reduce the need of redundancy. Using the proposed scheme, the full-bridge-based SRC or multilevel-based SRC can be reconfigured in a half-bridge topology, in order to keep the converter operational even with the failure (open circuit or short circuit) of one switch. Since the proposed scheme can be applied to the full-bridge-SRC and multilevel SRC, a family of fault-tolerant converter is proposed in this work. The advantages of the proposed approach are minimum of additional hardware and no deterioration of the converter efficiency. The proposed fault-tolerance solution was experimentally tested in a 10 kW SRC prototype with input voltage of 700–600 V. A short-circuit fault in a semiconductor is tested and the results confirm the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

A new zero-voltage switching full-bridge dc–dc converter for battery charging is proposed in this paper. The proposed isolated dc–dc converter is used for the dc–dc conversion stage of the electric vehicle charger. The primary switches in dc–dc converter turn-on at zero voltage over the battery-charging range with the help of passive auxiliary circuit. The diode clamping circuit on the primary side minimizes the severity of voltage spikes across the secondary rectifier diodes, which are commonly present in conventional full-bridge dc–dc converters. The main switches are controlled with an asymmetrical pulse-width modulation (APWM) technique resulting in higher efficiency. APWM reduces the current stress of the main switches and the circulating losses compared with the conventional phase-shift modulation method by controlling the auxiliary inductor current over the entire operating range of the proposed converter. The steady-state analysis of auxiliary circuit and its design considerations are discussed in detail. A 100-kHz 1.2-kW full-bridge dc–dc converter prototype is developed. The experimental results are presented to validate the analysis and efficiency of the proposed converter. [ABSTRACT FROM PUBLISHER]

Paralleling power converters is a common practice in industries to enhance total power rating, reliability, and availability of the system. In case of fault occurring in systems with parallel converters, the faulty power converter can be isolated and the system can still be operated at reduced power level. In this paper, a grid-connected power converter consisting of two parallel H-bridge converters with low ground leakage current is considered. Two contingency configurations, that are also of low ground leakage current, are proposed to enhance the availability of the system. This is done by reconfiguring the power circuit to a single H-bridge in the case of failure in one of the bridges. The power converter is experimentally tested with the proposed configurations for experimental validation. The results show that the second configuration has better performance in terms of power loss and current total harmonic distortion when operating at lower power level. [ABSTRACT FROM AUTHOR]

Transformer-less grid-connected photovoltaic (PV) systems face the challenge of keeping low leakage current due to their nonisolation configurations. To better attenuate the leakage current in the single-phase systems, a few neutral-point-clamped (NPC) topologies have been proposed. This paper further proposes an active NPC method by only employing one additional switch to connect the midpoint dc link and the freewheeling circuit of traditional single-phase PV inverters. After exploring the operational principles of freewheeling circuits, the construction method and the implementation of active NPC circuits in transformer-less single-phase inverters are elaborated in detail. Since only the leakage current flows through the additional NPC switch, the presented single-phase NPC inverters could still maintain the high operational efficiency with the further attenuated leakage current. The experimental results verified the theoretical findings. [ABSTRACT FROM PUBLISHER]

This paper presents an original modular plug-in-type assembly approach for a single-phase inverter. The main focus here is, indicatively, on the power range 1–20 kW, but the methodology can be transferred to higher power levels too. At the core of the inverter lies a power-dense double-sided-cooled half-bridge power switch architecture with integrated cooler, which is interconnected to filter elements, gate driver, and control circuitry by means of compact flat connectors. The integration exercise targets, on the one hand, the optimization of the power switch performance and reliability, as well as the reduction of circuit parasitic elements; on the other, the production of a system compatible with maintenance and repairing, featuring minimized impact of single component failure on the system maintenance and repair cost, and, thus, on its availability. Preliminary experimental tests demonstrate the nominal functionality of the inverter. [ABSTRACT FROM PUBLISHER]

The performance of a novel three-phase four-leg fault-tolerant T-type inverter topology is introduced in this paper. This inverter topology provides a fault-tolerant solution to any open-circuit and certain short-circuit switching faults in the power devices. During any of the fault-tolerant operation modes for these device faults, there is no derating required in the inverter output voltage or output power. In addition, overload capability is increased in this new T-type inverter compared to that in the conventional three-level T-type inverter. Such increase in inverter overload capability is due to the utilization of the redundant leg for overload current sharing with other main phase legs under healthy condition. Moreover, if the redundant phase leg is composed of silicon carbide metal-oxide-semiconductor field-effect transistors, quasi-zero-voltage switching, and zero-current switching of the silicon insulated-gate bipolar transistors (IGBTs) in the conventional main phase legs can be achieved at certain switching states, which can significantly relieve the thermal stress on the outer IGBTs and improve the whole inverter efficiency. Simulation and experimental results are given to verify the efficacy and merits of this high-performance fault-tolerant T-type inverter topology. [ABSTRACT FROM PUBLISHER]

On-line condition monitoring is of paramount importance for multilevel power converters used in safety-critical applications. A novel on-line nonintrusive diagnostic method for detecting open-circuit switch faults in silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs)-based T-type multilevel converters is introduced in this paper. The principle of this method is based on monitoring the abnormal variations of the dc-bus neutral-point current in combination with the existing information on instantaneous switching states and phase currents. Advantages of this method include faster detection speed and simpler implementation compared to other existing diagnostic methods in the literature. Moreover, this diagnostic method is immune to the disturbances of inverter's dc-bus voltage unbalance and load unbalance. In this method, only one additional current sensor is required for measuring the dc-bus neutral-point current; therefore, the implementation cost is low. Simulation and experimental results based on a lab-scale 20 kVA adjustable speed drive with a three-level SiC T-type inverter validate the effectiveness and robustness of this novel diagnostic method. [ABSTRACT FROM PUBLISHER]

In this paper, a novel space-vector pulse-width modulation (PWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter is proposed, where only the 55 selected voltage vectors among the entire 125 that produce low values of the CMV are utilized. This PWM scheme can significantly reduce the CMV without the increase of switching losses and total harmonic distortion of the output voltages. With the 55 selected voltage vectors, the inverter can still operate up to the maximum modulation index. In addition, the capacitor voltages are controlled by redundant switches of the 5L-ANPC inverters. It has been shown that the peak value of the CMV is decreased to one-twelfth of the dc-link voltage from the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

Variable-speed multiphase (more than three phases) drive systems are seen as serious contenders to the existing three-phase drives due to their distinct advantages. Supply to the multiphase drives is invariably given from a voltage source inverter. However, this paper proposes an alternative solution for supplying multiphase drive system using a direct ac–ac converter called a matrix converter. This paper proposes the pulsewidth modulation (PWM) algorithm for the matrix converter topology with three-phase grid input and five-phase variable-voltage and variable-frequency output. The PWM control technique developed and presented in this paper is based on space vector approach. This paper presents the complete space vector model of the three-to-five-phase matrix converter topology. The space vector model yield 2^15 total switching combinations which reduce to 243 states considering the imposed constraints, out of which 240 are active and 3 are zero vectors. However, for space vector PWM (SVPWM) implementation, only 90 active and 3 zero vectors can be used. The SVPWM algorithm is presented in this paper. The viability of the proposed solution is proved using analytical, simulation, and experimental approaches. [ABSTRACT FROM AUTHOR]

Multilevel converters (MLCs) have emerged as standard power electronic converters for medium-voltage high-power industrial applications. Owing to dominating device switching losses in high-power applications, it is preferable to use low device switching frequency (LDSF) modulation techniques. Then, it is possible to achieve higher device utilization, higher converter efficiency, and reduced cooling requirements. However, there exists a tradeoff between device switching frequency and harmonic distortion of converter output currents. Therefore, the main challenge for LDSF modulation techniques is to minimize the harmonic distortion of the output currents. The goal of this paper is to provide a review of various LDSF modulation techniques proposed in the literature and also discuss in detail about one of the emerging LDSF control techniques known as synchronous optimal pulsewidth modulation. Finally, challenges to LDSF modulation techniques for emerging multilevel topologies and future trends in applications of MLCs are discussed to motivate further research, to enhance the proposed LDSF techniques, and to explore for new alternatives. [ABSTRACT FROM PUBLISHER]

This paper presents the performance analysis and comparison of two types of bidirectional dc–dc converters—cascaded buck–boost capacitor in the middle and cascaded buck–boost inductor in the middle for use in plug-in electric and hybrid electric vehicles. The comparison of the two converters is based on device requirements, rating of switches and components, control strategy, and performance. Each of the converter topologies has some advantages over the other in certain aspects. Efficiency analysis has been carried out for specific scenarios in vehicle applications. The simulation and experimental results are provided for both converter types. [ABSTRACT FROM PUBLISHER]

Reliability-Centered Maintenance (RCM) is a proven technology to optimize the maintenance processes and another logical step in improving the overall performance and reliability of the critical facility while reducing the total cost of ownership. This paper will introduce RCM and use an automatic transfer switch and a standby generator to back up utility power as the example system to demonstrate the RCM process. [ABSTRACT FROM AUTHOR]

This paper presents an asymmetrical cascaded multilevel inverter based on a five-level transistor-clamped H-bridge power cell. A two-cell configuration with a dc link voltage ratio of 4 : 1 is presented. The modulation method is based on the fundamental frequency switching. An analysis of the inverter output voltage and harmonics is presented. Injection of the third harmonic voltage as to maximize the output voltage and the issue of the inverse power flow or regeneration in the low-voltage cell are presented. The prototype of the proposed inverter was built, and its functionality was verified through experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a real-time simulation platform for smart grid applications. The developed platform is capable of simulating complex smart grid models with large numbers of high-speed switching devices at real time. Furthermore, an integrated approach is adopted to combine real-time simulations of communication systems and electric power systems together, which provides an effective approach to examine communication and distributed control related issues in smart grids. With the flexibility in representing a wide range of communication network configurations, the developed platform can also be used to evaluate reconfiguration strategies of communication networks in smart grids. A case study is demonstrated based on this platform. Simulation results validate the capability of the platform and also show the importance of the proposed comprehensive approach for the study of smart grids. [ABSTRACT FROM AUTHOR]

In this paper, a novel control strategy is presented, which is capable of controlling a 12-V–1.5-V main buck converter and an auxiliary circuit to achieve significantly improved unloading response performance. While the charge balance controller minimizes the settling time of the main buck converter, the auxiliary circuit is controlled in boundary conduction mode (BCM) for a predictable pattern of auxiliary switching to reduce the output overshoot. Therefore, the reliability and dynamic performance of the entire system is significantly enhanced. Compared with existing technologies, the proposed BCM auxiliary switching strategy achieves improved output voltage overshoot and reduced auxiliary power losses at the same time. Furthermore, numerical analysis of the improved output voltage overshoot and reduced auxiliary power losses has been conducted for a design guideline. Finally, simulation and experimental results are provided to verify the proposed scheme on a 12-V–1.5-V 10-A buck converter prototype. [ABSTRACT FROM AUTHOR]

The aim of this paper is to present shortly syntax and semantics of a language to program operational procedures. This formal language is a unified suite of symbols, meanings, and codes used on the basis of conventional rules. Symbols have to be related to meanings and to be shared: operational, mathematical, and graphical symbols shown are preferred but are not mandatory. Parise program allows to express concepts and procedures, to make analysis of formal connections and bonds between components of the electrical power system. It allows to provide information and give instructions for the execution of certain operations following correct procedures. The programming language elements may be used in an interactive programming environment. [ABSTRACT FROM AUTHOR]

This paper presents the control strategy for varying the turn-on and turn-off angles of three-phase switched reluctance generators (SRGs) to maximize the efficiency as well as to reduce the dc-link ripple current resulting from the commutation of the phases at high speeds. The behavior of the commutation angles is analyzed first through the offline measurement of dc-link current and voltage, generator speed, and phase currents. The analysis of the collected data has shown that the commutation angles providing the minimum ripple on the dc-link current achieve the maximum generating efficiencies. A novel control technique, developed based on the finding, achieves the desired generating set point with maximum efficiency and minimum ripple on the charging current. The control algorithm actively searches the turn-off angles to reduce the amount of normalized ripple on the dc-link current, which also ensures the generation with the maximum efficiency. The turn-on angle is controlled through a proportional–integral controller to generate a desired power level. The algorithm is implemented successfully on a 1-kW three-phase SRG charging a NiMH battery pack. [ABSTRACT FROM PUBLISHER]

In this paper, several modular converter topologies based on a switched-capacitor-cell concept are introduced for high-power applications. Two types of switched-capacitor cells, including the full cell and the half-cell, are discussed. The full cell can be used for dc–ac inversion, and the half-cell is utilized in both dc–dc and dc–ac applications. A rotational charging scheme is adopted for the half-cell-based dc–dc voltage multiplier to eliminate the large output capacitor that exists in many traditional switched-capacitor topologies. A soft-switching scheme, which does not require extra components, is adopted to reduce the switching loss and electromagnetic interference. A variable switching frequency control scheme is proposed to realize soft switching for dc–ac inverters. The experimental results on a 2-kW prototype are presented to verify the proposed topologies. [ABSTRACT FROM PUBLISHER]

A new system for switching electrical power using microelectromechanical systems (MEMS) is presented. The heart of the system utilizes custom-designed MEMS switching device arrays that are able to conduct current more efficiently and can open orders of magnitude faster than traditional macroscopic mechanical relays. Up to now, MEMS switches have been recognized for their ability to switch very quickly due to their low mass but have only been used to carry and switch very low currents at extremely low voltage. However, recent developments have enabled suppression of the arc that normally occurs when the MEMS switch is opened while current is flowing. The combination of the arc suppression with the MEMS switch arrays designed for this purpose enables a breakthrough increase in current and voltage handling capability. The resultant technology has been scaled to handle many amperes of current and switch hundreds of volts. Such current and voltage handling capability deliver improved energy efficiency and the capacity to handle fault current levels that are encountered in typical ac or dc power systems. Fault current interruption takes place in less than 10 \mu\s, almost regardless of the prospective fault current magnitude. The properties of the MEMS switch arrays allow the switching mechanism to operate at temperatures in excess of 200 ^\circ\C. The switches also have a vibration tolerance in excess of 1000 G. The combination of fast MEMS switching speed, optimized current and voltage handling capacity of the switch arrays, the arc suppression circuitry, and optimized sensing and control enables a single sensing, control, and switching system to operate in a small fraction of a millisecond. This paper will present the basic physics of the MEMS switches together with recent advances that enable the technology. Some illustrative examples of the ways that the devices may be used to provide protection and control within electrical systems will also be presented. [ABSTRACT FROM AUTHOR]

This paper proposes a bidirectional switched-capacitor dc–dc converter for applications that require high voltage gain. Some of conventional switched-capacitor dc–dc converters have diverse voltage or current stresses for the switching devices in the circuit, not suitable for modular configuration or for high efficiency demand; some suffer from relatively high power loss or large device count for high voltage gain, even if the device voltage stress could be low. By contrast, the proposed dc–dc converter features low component (switching device and capacitor) power rating, small switching device count, and low output capacitance requirement. In addition to its low current stress, the combination of two short symmetric paths of charge pumps further lowers power loss. Therefore, a small and light converter with high voltage gain and high efficiency can be achieved. Simulation and experimental results of a 450-W prototype with a voltage conversion ratio of six validate the principle and features of this topology. [ABSTRACT FROM AUTHOR]

This paper presents the development, implementation, and performance testing of a permanent-magnet generator (PMG)-based wind energy conversion system (WECS) for grid-connected applications. The grid-connected operation is constructed using the new three-phase resolution-level-controlled wavelet-modulated inverter. The output of the wind generator is fed to a switch-mode ac–dc converter, where the dc voltage is controlled to ensure extracting power from the wind under variable wind speed conditions in order to meet the grid active and reactive power demands. The resolution-level control of the grid-side inverter is designed as a current controller for adjusting active and reactive powers delivered to the grid. The proposed WECS is implemented both in software and hardware for performance testing on a direct-drive 6-kW laboratory PMG operated with variable speed. Test results demonstrate that an accurate control of the dc voltage on the generator side ensures adjusting the generator speed to extract power at each wind speed in order to meet the demand active and reactive power delivery to the grid. Also, test results show significant abilities of the resolution-level controller to initiate fast and accurate adjustments in the active and reactive powers delivered to the grid in order to follow any changes in their demand values under variable wind speed. [ABSTRACT FROM AUTHOR]

Control and modulation schemes for ac electrical drives synthesize switched three-phase voltage waveforms that control the electrical machine. Particularly in medium-voltage applications, the aim is to minimize both the switching losses in the inverter and the harmonic distortions of the stator currents and the torque. For a given modulation scheme, lower switching losses usually imply higher distortion factors and vice versa. This tradeoff can be described by a hyperbolic function, as shown in this paper for pulsewidth modulation (PWM). A number of predictive control concepts are rapidly emerging. Their characteristic hyperbolic tradeoff functions are derived, compared with each other, and benchmarked with respect to PWM and offline optimized pulse patterns (OPPs). It is shown that predictive schemes with long prediction horizons shift the performance tradeoff curve toward the origin, thus lowering both the switching losses and the harmonic distortions. As a result, at steady-state operating conditions, these predictive schemes achieve a performance similar to OPPs, while providing a superior dynamic performance during transients. [ABSTRACT FROM AUTHOR]

This paper presents a high-efficiency zero-current-switching (ZCS) switched-capacitor (SC) dc–dc converter for high-current high-voltage-gain TEG application. Compared with the traditional hard switching SC circuits, the proposed circuit achieves ZCS for all the switches, thus minimizing the switching loss and electromagnetic interference noise. The huge electrolytic capacitor bank existing in the hard switching SC circuit, which is used to reduce the voltage ripple and achieve high efficiency, is eliminated. The low-capacitance ceramic capacitor is utilized instead. Different from other ZCS SC circuits that insert a magnetic core, the proposed circuit utilizes stray inductance that is present in the circuit to achieve ZCS, thus leading to small-size, low-cost, and high-reliability features. The proposed circuit also owns continuous input current and low-output-voltage ripple features. Therefore, the power loss related to the input capacitor can be minimized. By using the proposed topology, high-efficiency and high-power-density SC dc–dc converters could be made for high-current and high-voltage-gain application. Simulation and experimental results are given to demonstrate the validity and features of the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper presents a quasi-resonant technique for multilevel modular switched-capacitor dc–dc converter (MMSCC) to achieve zero-current switching (ZCS) without increasing cost and sacrificing reliability. This ZCS-MMSCC employs stray inductance distributed in the circuit as the resonant inductor to resonate with the capacitor and provide low dv/dt and di/dt switching transition for the device. The ZCS-MMSCC does not utilize any additional components to achieve ZCS and meanwhile solves the current and voltage spike problem during the switching transition, thus leading to reliable and high-efficiency advantages over traditional MMSCC. Furthermore, the ZCS-MMSCC reduces the capacitance needed in the circuit to attain high efficiency. In this case, the bulky capacitor bank with high capacitance in a traditional MMSCC to reduce voltage difference and achieve high efficiency is no longer necessary. A 150-W four-level ZCS-MMSCC prototype has been built. Simulation and experimental results are given to demonstrate the validity and features of the proposed soft-switching switched-capacitor circuit. [ABSTRACT FROM PUBLISHER]