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Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

The integration of switched-capacitor techniques into multilevel inverters (MLIs) with a dc source string contributes to the boosting of voltage gain, renders it particularly attractive in reducing the number of input dc sources in the series string. However, the recent two-stage MLI topologies suffer from high voltage stress across the backend H-bridge. Addressing this concern, an improved topology, namely the one-switched-capacitor integrated MLI (1SCI-MLI) is proposed in this paper. An extended topology of 1SC-MLI is also established by appropriate incorporation of another switched-capacitor circuit. The two proposed topologies are endowed with voltage boosting capability. They also feature low switch count and low number of dc sources. More importantly, they resolve the high voltage stress problem in the existing counterparts. Their corresponding operational analysis and comparisons with recent MLI topologies are discussed. Simulation and experimental results from a laboratory prototype are presented to validate the effectiveness of the proposed topologies. [ABSTRACT FROM AUTHOR]

Three-phase voltage-source inverters typically feature a significant amount of dc energy storage to maintain a stiff dc bus. In these cases, the dc-link capacitor is sized to store enough energy to maintain several tens of cycles of ac output at the rated power. In this paper, we propose to reduce the size of the dc-link capacitor dramatically to store enough energy to provide just one high-frequency switching cycle of the ac output power. The dc bus is no longer stiff, and hence, classical sinusoidal pulse-width modulation cannot be used. However, the stored energy modulation (SEM) proposed herein synthesizes high-quality sinusoidal output voltage waveforms, even with such tiny dc-link capacitors. In SEM, the switching intervals of the interconnecting switches are carefully determined nonlinear functions of various operating parameters such as reactive component sizing, switching frequency, load levels, etc. This paper presents the analytical and detailed design development of the SEM approach along with circuit simulation, experimental results, and comparative evaluation of a dc-to-three-phase system example. [ABSTRACT FROM PUBLISHER]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

A discontinuous pulsewidth modulation (DPWM) strategy for three-level neutral-point-clamped (NPC) traction inverter drive for electric vehicles (EVs) with minimum switching loss for the full power factor (PF) range is developed and presented in this paper. Considering the dynamic loading conditions in an EV propelled by an induction motor (IM), the discontinuous modulation strategy is generalized to obtain minimum switching loss for a wide variations in load PF and modulation depth. The dynamic operating conditions in EV may render frequent unbalances in dc-link capacitor voltages in NPC inverter. It is demonstrated that the addition of an appropriate offset signal with the reference discontinuous signals generates compensating neutral current in the right direction, which can be used to mitigate existing unbalance in two dc-link capacitor voltages. Minimum switching loss at variable PF is attained by positioning the nonswitching clamped regions of the reference auxiliary signals according to the load PF. The effectiveness of the proposed scheme for a wide range of torque/speed variations is studied through simulation by developing a MATLAB/SIMULINK model of an IM traction inverter drive with field-oriented control strategy for closed loop control. Finally, the modulation scheme is validated through experimentation in a small-scale prototype NPC inverter with motor loads. [ABSTRACT FROM AUTHOR]

In this paper, a multipulse ac–dc converter fed multilevel inverter (MLI)-based indirect vector controlled induction motor drive (IVCIMD) is proposed for medium-power application. A 54-pulse ac–dc converter is utilized at the supply side to suppress the input current total harmonic distortion, as per the IEEE-519 standard. Mainly three separate isolated transformers are utilized and each transformer is configured as an 18-pulse ac–dc converter. Due to the phase shift in primary windings, these three transformers are reconfigured as a 54-pulse ac–dc converter. A 15-level binary-based cascaded MLI is utilized at the motor side to enhance the required performance of IVCIMD. A 15-level inverter is switched at fundamental frequency, which ensures the very low switching losses in the proposed IVCIMD. A modified nearest level modulation strategy is proposed to achieve fundamental switching frequency. The performance of the proposed IVCIMD is simulated at various operating conditions by utilizing Simulink/MATLAB platform. Simulated results are validated with experimental results on a developed prototype in the laboratory to show its usefulness for medium-power applications. [ABSTRACT FROM AUTHOR]

This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system. [ABSTRACT FROM AUTHOR]

This paper is concerned with the use of a three-level inverter for a synchronous reluctance machine (SynRM). The SynRM suffers from a poor power factor due to poor machine saliency. This makes it harder to operate the three-level neutral-point-clamped inverter due to a strict requirement to have the two dc-link capacitor voltages balanced. This paper proposes a new nearest three vector modulation algorithm which can balance the two dc-link capacitors even at poor machine saliency ratio (poor power factor). In this paper, a method of sizing the two dc-link capacitors based on the machine power is also proposed. A comparison between two- and three-level inverters was conducted. The SynRM registered lower $d$-axis current ripple with a three-level inverter, indicating lower core losses in the machine. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel bidirectional inverter, named series ac-link inverter. This three-phase inverter belongs to a new class of partial resonant ac-link converters in which the link is formed by a series ac inductor/capacitor (LC) pair having low reactive ratings. The input and output of this converter can be either dc, ac, single-phase, or multiphase. Therefore, they can appear as dc–dc, dc–ac, ac–dc, and ac–ac configurations. In all of these configurations, the ac capacitor is the main energy-storage element, and the inductor is merely added to facilitate the zero-current turnoff of the switches and their soft turn-on. Due to the zero-current turnoff of the switches in the proposed converter, the use of SCRs with natural commutation is possible as well. Since the current and voltage of the link are both alternating, no bulky dc-electrolytic capacitors are required in this converter. This paper mainly focuses on bidirectional dc to three-phase ac conversion. This single-stage inverter can step up or step down the voltage in a wide range. If galvanic isolation is required a single-phase high-frequency transformer can be added to the link. In the proposed inverter, the power can flow in both directions, and therefore, it is an excellent candidate for battery-utility interface and electric vehicle applications. In this paper, the principles of the operation of the proposed inverter, along with its design and analysis, are studied. Moreover, the performance of the proposed configuration is evaluated in this paper. Both simulation and experimental results are included. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit configuration and a control scheme for a single-phase current-source inverter with a power decoupling circuit which is called as the active buffer. The proposed inverter achieves a low-dc-input voltage ripple and also provides a sinusoidal current that can achieve unity power factor, without large passive components in the dc bus such as smoothing inductors and electrolytic capacitors. These components are conventionally required in order to decouple the power pulsation caused by the single-phase power source. In this paper, the fundamental operations of the proposed inverter are demonstrated experimentally. From the experimental results, the input voltage ripple is 8.87%, and the output current total harmonic distortion is 4.24%. In addition, an output power factor of 99% and a maximum efficiency of 94.9% are obtained. Finally, it is confirmed that the maximum power densities of the conventional circuit and the proposed circuit are 2.75 kW/L at the switching frequency of 70 kHz and 4.86 kW/L at the switching frequency of 80 kHz, respectively. [ABSTRACT FROM AUTHOR]

This paper proposes a vector control strategy for independent control of two permanent-magnet synchronous motors (PMSMs) using a single four-leg inverter (4LI). An expanded two-arm modulation to obtain a balanced three-phase output voltage is described. This paper also proposes a method to compensate for the fluctuations in the neutral point voltage of two split capacitors in the dc link. The experimental results show that independent speed and position control of two PMSMs can be achieved using a single 4LI with the proposed vector control method. [ABSTRACT FROM AUTHOR]

This paper reports an elegant approach to address two major challenges of transformerless grid-connected microinverters, common-mode earth leakage current and double-frequency power pulsation across the photovoltaic (PV) terminal. The proposed solution uses an embedded decoupling capacitor in a doubly grounded boost–buck ( $\acute{\mathrm{C}}$ uk) derived topology. An intelligent switching scheme ensures that a large swing of the decoupling capacitor voltage is easily accommodated. Thus, film capacitors can be used instead of electrolytic capacitors, which helps increase equipment lifetime. Details of circuit operation are provided along with dynamic modeling and controller design for close-loop operation. Simulation and experimental results are presented for performance validation of the microinverter. [ABSTRACT FROM AUTHOR]

In this paper, a modified single-phase current source inverter (CSI) with improved multiloop control is proposed for a transformerless grid–photovoltaic interface application. A split capacitor arrangement with the middle point connected to the grid neutral and a common mode choke are used to modify the conventional CSI structure to attenuate the ground leakage current. The proposed control method permits the use of reduced value of dc side inductor by maintaining the quality of the grid current as if a high value of input inductor is used. Furthermore, virtual resistance damping is incorporated in the control loop to reduce the effect of LC resonance without compromising the efficiency, thus proving the feasibility of using CSI for the grid interface. Rigorous study, analysis, and validation of the modified CSI structure with the proposed control technique are carried out with exhaustive simulations and experiments. The experimental results on a 250 W laboratory prototype using the controller TMS320F28335 prove the effectiveness of the proposed CSI structure and its control. [ABSTRACT FROM PUBLISHER]

This paper presents a reverse mapping based space vector pulse-width modulation strategy for five- and seven-level diode-clamped multilevel inverters. In this method, the space vector is expressed as a sum of a contender vector and an error vector. Here, the actual sector, which contains the tip of the reference space vector, needs not to be found. The vector nearest to the reference space vector is the contender vector. By calculating the vector difference of the contender vector from the reference vector, the error vector is determined. Using translation method, the error vector is translated to the origin of space vector diagram. There will be (n–1) steps in space vector diagram for an n-level inverter. As the error vector amplitude will be less than one step of the space vector diagram, the two-level space vector method can be applied. To obtain a vector that is very close to the reference vector, the determined switching states can be added to the contender vector. This technique can be extended to any n-level multilevel inverter. The performance of five-level and seven-level diode-clamped multilevel inverters is presented using MATLAB/Simulink. The performance of inverters is evaluated by using induction motor load. The experimental results using field programmable gate array are presented for seven-level diode-clamped multilevel inverter. [ABSTRACT FROM PUBLISHER]

Space vector modulation (SVM) is a widely used method for multilevel inverters. Most of the SVM methods are nearest three vector (N3V) based schemes. Therefore, several researchers have proposed advanced implementation algorithms with reduced complexity for N3V methods. However, topologies like neutral point (NP) clamped inverter (NPCI) require some distinctive methods (called as non-N3V methods) to balance NP voltage for high modulation index and low power factor operations. Currently, the existing non-N3V methods exercise highly complex algorithms for duty ratio calculation and subtriangle identification. This paper presents a new approach, suitable for both N3V and non-N3V methods, with reduced implementation complexity. The proposed algorithm is based on an equivalent two-level space vector diagram and does not require any trigonometry, coordinate transformation, or volt-second balance solution. Unlike other carrier-based methods, it can change the switching sequence as well as the duration of redundant vectors. Moreover, the proposed approach does not require extra steps for implementing hybrid modulation and it can also be extended to multilevel topologies. One N3V, two non-N3V, and hybrid methods are developed using the proposed modulation algorithm, and are compared in detail. Simulation and experimentation on a three-level NPCI verify the validity of the proposed algorithm. [ABSTRACT FROM PUBLISHER]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

Cascaded bidirectional dc–ac converters are commonly used in uninterruptible power supply applications and battery chargers for electric vehicles. Power conversion units for such applications employ a large electrolytic capacitor at high-voltage dc bus, which not only reduces the lifetime but also adds to the weight of the converter. In this paper, a novel bidirectional dual active bridge cascaded three-phase converter (DABCC) with six-pulse dc link is proposed. Also, a new closed-loop control scheme to implement the six-pulse modulation (SPM) technique in DABCC is proposed. The advantages of the proposed control scheme in DABCC are that the electrolytic capacitor is eliminated and is replaced with a low-value film capacitor resulting in increased reliability, compactness, and reduced cost. SPM technique also increases the dc bus utilization and decreases the inverter average switching frequency to 33% when compared with the conventional sine pulse-width modulation (SPWM). Harmonic components introduced in the pole voltages of the SPM-modulated DABCC due to inverter dead time are analyzed, and a resonant controller is designed to mitigate them. Also, root mean square current stress for high-voltage dc-link capacitor is studied, and it is shown that the capacitor requirement for SPM modulation is lower than the conventional SPWM. To validate the proposed control scheme, an 800-W proof-of-concept laboratory hardware prototype is fabricated and experimental results are demonstrated. [ABSTRACT FROM PUBLISHER]

This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. [ABSTRACT FROM PUBLISHER]

Transformer-less grid-connected photovoltaic (PV) systems face the challenge of keeping low leakage current due to their nonisolation configurations. To better attenuate the leakage current in the single-phase systems, a few neutral-point-clamped (NPC) topologies have been proposed. This paper further proposes an active NPC method by only employing one additional switch to connect the midpoint dc link and the freewheeling circuit of traditional single-phase PV inverters. After exploring the operational principles of freewheeling circuits, the construction method and the implementation of active NPC circuits in transformer-less single-phase inverters are elaborated in detail. Since only the leakage current flows through the additional NPC switch, the presented single-phase NPC inverters could still maintain the high operational efficiency with the further attenuated leakage current. The experimental results verified the theoretical findings. [ABSTRACT FROM PUBLISHER]

In order to increase the output voltage levels and reduce the isolated dc sources, a symmetrical hybrid nine-level inverter for high-speed motor drive applications is presented in this paper. Each phase of this inverter is composed of a five-level dc/dc converter cell and an H-bridge cell. The dc/dc converter is operated at high frequency with low-voltage devices and the H-bridge is operated at fundamental frequency with high-voltage devices. The three phases are connected to a common dc-link and each drives an isolated winding of an open-winding motor. The operating principles and modulation method are introduced. A detailed analysis of the average currents through the flying capacitor and neutral point of the dc-link is presented and a capacitor voltage balancing method based on phase-shifted pulse-width modulation is proposed. Simulation and experimental results are presented to demonstrate the feasibility of this topology and control method. [ABSTRACT FROM PUBLISHER]

Boost-derived hybrid converter (BDHC) is a single-stage converter that produces both dc and ac output voltages. The operation of BDHC under continuous conduction mode is satisfactory. However, the nonzero discontinuous conduction mode (NZ-DCM) and standalone ac operation restrict the stable operation of the converter. To mitigate these limitations, modified BDHC (MBDHC) is proposed in this paper. The main idea behind these changes is to redeem NZ-DCM by forced continuous conduction mode (FCM). The adverse effect of NZ-DCM in a BDHC is analyzed in terms of ac output voltage total harmonic distortion, and dc output voltage ripple. This analysis is further extended for MBDHC to highlight the benefits of FCM. Moreover, for hybrid loads, the efficiency of MBDHC is compared with its counterpart BDHC and cascaded boost inverter. [ABSTRACT FROM PUBLISHER]

This paper presents an optimized topology for a \text3-\phi three-level inverter with complete elimination of common-mode voltage (CMV). The proposed multilevel inverter (MLI) configuration is realized by modifying a T-structure \text3-\phi inverter. The proposed configuration is an optimized solution with respect to the pulse-width modulation strategy used for CMV elimination. The given three-level inverter structure uses only 16 power semiconductor switches, which is much lower than the existing configurations. A reduced number of power semiconductor devices results in a diminished number of driver circuits, less installation space, and low cost. Further, due to the complete elimination of CMV, the proposed MLI is free from issues such as electromagnetic interference and leakage current with a reduction in filter requirement. The presented topology is also compared with other existing topologies to prove its advantage. It is an optimized solution with respect to the dc bus voltage requirement and the total voltage rating of the devices or the components used in the system. Simulation and experimental results are presented to confirm the capability of the proposed MLI. [ABSTRACT FROM AUTHOR]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

In recent years, a three-level T-type inverter has attracted considerable attention due to its advantages, such as simple structure and higher efficiency. However, the reliability of a three-level T-type inverter is particularly important as increased power switches are used. Therefore, a fault-tolerant three-level T-type inverter is proposed in this paper. Fault diagnosis and fault-tolerant control strategies for power switches both in half-bridge and neutral-point bridge are investigated. Under fault-tolerant operation, redundant fourth-leg is used to balance neutral-point voltage and the low-frequency voltage oscillation is eliminated completely. The fault ride-through capability and high-quality output waveforms can be obtained. The effectiveness of the proposed inverter topology and control methods is validated by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Three-phase inverters in uninterrupted power supply, electric vehicles, and hybrid electric vehicles use an intermediate dc-link electrolytic capacitor, which has reliability issues and is one prominent cause of inverter failure and limited life. The large volume of an electrolytic capacitor increases the size and cost of the system. Recent research on electrolytic capacitorless inverters using six-pulse modulation technique along with high-frequency power conversion has attempted to address this issue. However, closed-loop operation and control has some issues due to capacitorless dc-link. In this paper, closed-loop operation, design, and implementation of an electrolytic capacitorless inverter is presented. A proof-of-concept 1-kW hardware prototype has been built and tested in a laboratory under different loading conditions. In total, 98% rated efficiency of the inverter is obtained with total harmonic distortion within 2%. Transient results during start-up and load change are smooth, demonstrating safe operation of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes and analyzes a new power electronics circuit topology for wireless inductive power transfer application using current-fed half-bridge converter with CCL-LC resonant network. The major focus is analysis and implementation of a new current-fed resonant topology with current-sharing and voltage doubling features. Generally, inductive power transfer circuits with current fed converter use parallel CL resonant tank to transfer power effectively through air gap. However, in medium power application, this topology suffers from a major limitation of high voltage stress across the inverter semiconductor devices owing to high reactive power consumed by loosely coupled coil. In proposed topology, this is mitigated by adding a capacitor in series with the coil developing series-parallel CCL tank. The power flow is controlled through variable frequency modulation. Soft-switching of the devices is obtained irrespective of the load current. For grid-to-vehicle or solar-to-vehicle, the converter is analyzed and detailed design procedure is illustrated. Experimental results are presented to verify the analysis and demonstrate the performance. [ABSTRACT FROM AUTHOR]

On-line condition monitoring is of paramount importance for multilevel power converters used in safety-critical applications. A novel on-line nonintrusive diagnostic method for detecting open-circuit switch faults in silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs)-based T-type multilevel converters is introduced in this paper. The principle of this method is based on monitoring the abnormal variations of the dc-bus neutral-point current in combination with the existing information on instantaneous switching states and phase currents. Advantages of this method include faster detection speed and simpler implementation compared to other existing diagnostic methods in the literature. Moreover, this diagnostic method is immune to the disturbances of inverter's dc-bus voltage unbalance and load unbalance. In this method, only one additional current sensor is required for measuring the dc-bus neutral-point current; therefore, the implementation cost is low. Simulation and experimental results based on a lab-scale 20 kVA adjustable speed drive with a three-level SiC T-type inverter validate the effectiveness and robustness of this novel diagnostic method. [ABSTRACT FROM PUBLISHER]

In this paper, a novel space-vector pulse-width modulation (PWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter is proposed, where only the 55 selected voltage vectors among the entire 125 that produce low values of the CMV are utilized. This PWM scheme can significantly reduce the CMV without the increase of switching losses and total harmonic distortion of the output voltages. With the 55 selected voltage vectors, the inverter can still operate up to the maximum modulation index. In addition, the capacitor voltages are controlled by redundant switches of the 5L-ANPC inverters. It has been shown that the peak value of the CMV is decreased to one-twelfth of the dc-link voltage from the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper identifies the characteristics of a current source inverter operating in discontinuous conduction mode, and proposes a new multiobjective pulse-width modulation (PWM) method to mitigate voltage boosting and harmonic distortion effects. The method takes into account load impedance effects. Controls are also developed to enable transition between the multiobjective PWM method and conventional PWM as the current source inverter operates in discontinuous and continuous modes of operation. The concept is verified experimentally on a 3 kW test bed. [ABSTRACT FROM AUTHOR]

Two new configurations of static ground power unit based on 5L active neutral point clamped (ANPC) and novel modular 9L-ANPC converter are proposed. First, a new level shifted phase-shifted carrier pulse-width modulation (LS-PSC-PWM) switching method for the 5L-ANPC converter is defined. By utilizing the proposed method, total harmonic distortion of output voltage is reduced in comparison with traditional PSC-PWM switching method. Then, a novel modular 9L-ANPC multilevel converter and its suggested modulation method is proposed in this paper. In comparison with traditional 9L-ANPC converter, the main advantages of proposed modular 9L-ANPC converter are halving the applied voltages on flying capacitors (FC), reduced number of FCs, and self-balancing of FCs, which is provided by suggested switching method. This results in reduction of the size and cost of converter, and makes it more feasible and reliable. Furthermore, inductance reduction of output LC filter enhances static ground power unit dynamic performances. The simulation and experimental results verified the feasibility and performance of proposed converters. [ABSTRACT FROM PUBLISHER]

This paper proposes an isolated universal-link ac–ac power converter suitable for grid connection. The proposed power converter can have multiple ports to connect various loads or electric energy sources, and the configuration can be arranged according to the situation. The proposed power converter does not need to employ the large interface inductor at input side and the huge electrolytic capacitor at dc link. Moreover, it utilizes high-frequency transformers for the galvanic isolation instead of bulky line-frequency transformers. These characteristics of the proposed power converter result in the reduction of the system volume and weight remarkably. The proposed power converter is the modular structure, and an H-bridge works as a basic module of the converter. By stacking the modules, the power converter can be adapted to the high-voltage grid and the various types of loads and/or sources. This paper addresses the structure of the proposed power converter and the fundamental principle of power flow. The operation of the proposed converter is verified by both computer simulations and experimental results with a laboratory-level prototype system. [ABSTRACT FROM AUTHOR]

This paper presents the experimental results of the independent drive characteristics of two three-phase induction motors (IMs) fed by a four-leg inverter (FLI). The FLI is a single inverter that can drive two three-phase ac motors independently. The inverter consists of four legs and two capacitors connected in a series. The U and V phases of both motors are connected in each leg, respectively, whereas the W phase of both motors is connected in the neutral point of two-sprit capacitors. The pulsewidth modulation technique in three-phase voltage source inverter is not directly applicable for the FLI because only two phases must be modulated. Then, this paper also analyzes about the neutral point potential of two-sprit capacitors and inverter output voltage. Next, the modulation technique in the FLI is also shown. The experimental results demonstrate the characteristics of two IM independent drives and the validity of those analytic results. [ABSTRACT FROM AUTHOR]

In this paper, a novel multilevel dc–ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals’ design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220\ \textV\text{rms}/2\,{\text{kW}} is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%. [ABSTRACT FROM AUTHOR]

In this paper, two modulation strategies called Mod-1 and Mod-2 are compared for a three-level diode neutral-point-clamped (NPC) inverter synchronous reluctance machine (SynRM) drive. These modulation strategies do not operate at a fixed switching frequency. A new modulation strategy which operates at a fixed switching frequency is proposed called Mod-3. The SynRM suffers from a poor power factor which makes it harder to archive capacitor voltage balancing for a three-level NPC inverter. These modulation strategies are of the nearest three vector (NTV) family. Mod-1 and Mod-3 choose certain vector states to achieve capacitor voltage balancing, whereas Mod-2 strategy makes use of the inverter vector state’s dwell time. The parameters of interest are the torque ripple, the neutral point (NP) voltage ripple, the inverter efficiency, and the $d$-axis current ripple. Though lower torque ripple and better power quality are registered on Mod-2 strategy. Mod-1 strategy has 14% improvement in inverter efficiency at lower modulation index ($m_i = 0.4$). Mod-2 strategy has 11% more NP voltage ripple at a modulation index of 0.4. One of the disadvantages of Mod-1 strategy is the varying switching frequency. Mod-3 scheme produced higher inverter efficiency, better balancing of the capacitor voltages, and guaranteed fixed inverter switching frequency. The disadvantage with Mod-3 strategy is that it generated higher torque ripple, $d$-axis current ripple, and current total harmonic distortion when compared to Mod-1 and Mod-2 at the same load conditions. [ABSTRACT FROM AUTHOR]

This paper proposes three dynamic voltage restorer (DVR) topologies. Such configurations are able to compensate voltage sags/swells in three-phase four-wire (3P4W) systems under balanced and unbalanced conditions. The proposed systems use two independent dc links. Proposed configurations present advantages in terms of switch blocking voltages and consequently lower dc-link voltage rating. The complete control system, including the pulsewidth modulation (PWM) technique, is developed, and comparisons between the proposed configurations and a conventional one are performed. Simulation and experimental results are provided to validate the theoretical approach. [ABSTRACT FROM AUTHOR]

A non-isolated impulse commutated current-fed voltage doubler based non-isolated inverter for a solar photovoltaic, battery or fuel cell application is proposed in this paper. Impulse commutation enables device voltage clamping with zero current commutation of the semiconductor devices. It eliminates the traditional problem of turn-off voltage spike across the devices in current-fed converters. Unlike resonant converters, resonance pulse appears for a very short interval leading to zero current turn-off of devices. It therefore, limits peak and circulating currents through the components. Voltage doubler is selected to achieve 2 $\times$ gain. Variable frequency modulation ensures output voltage regulation with input and load variations. Steady-state operation and analysis of front-end converter is explained. A 500 W prototype has been designed and developed to demonstrate the performance and verify the proposed operation, analysis, and claims. [ABSTRACT FROM AUTHOR]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid switch that parallels a power MOSFET and an insulated-gate bipolar transistor (IGBT) as the main switch of a zero-voltage switching (ZVS) inverter. The combination features the MOSFET conducting in the low-current region and the IGBT conducting in the high-current region, and the soft switching avoids the reverse recovery problem during the device turn-on. A custom hybrid switch module has been developed for a variable-timing-controlled coupled-magnetic-type ZVS inverter with a nominal input voltage of 325 V and the continuous output power of 30 kW for a traction motor drive. Experimental results of the hybrid-switch-based inverter with the total loss projected by temperature indicate that the inverter achieves 99% efficiency at the nominal condition and demonstrate ultrahigh-efficiency operation over a wide load range. At 375-V input, the maximum measured efficiency through temperature projection and loss separation analysis is 99.3%. [ABSTRACT FROM PUBLISHER]

There are several ways to model three-phase gridconnected voltage-source inverters (VSIs) with an $LCL$ filter. Such models often use simplifications like constant dc-link voltage or averaging over a switching period. These simplifications remove transistor switching and dc-link capacitor dynamics from the model. In this paper, a comprehensive modeling of a three-phase VSI, including an $LCL$ filter, is described and compared to models using one or more of the aforementioned simplifications. Advantages and disadvantages of different models are discussed. All simulations are verified by comparing with experimental results. [ABSTRACT FROM PUBLISHER]

The five-level active neutral-point-clamped converter is a recently introduced topology that offers low harmonic distortion and a high output voltage. In addition to a neutral point potential in the dc link, this topology features, in each phase, a flying phase capacitor. Balancing these four internal converter voltages around their references while providing fast torque and/or current control for the machine is an intrinsically challenging control problem. Model predictive direct torque control (DTC) (MPDTC) is an ideal control methodology to address this problem. It is shown, in this paper, how MPDTC, originally developed for three-level inverters, can be adapted to this new five-level topology. Compared to DTC, the performance results of MPDTC are very promising—for the same switching frequency, the harmonic distortions of the stator currents and the torque can be more than halved. At the same time, the very fast torque response of DTC is maintained. [ABSTRACT FROM PUBLISHER]

In this paper, several modular converter topologies based on a switched-capacitor-cell concept are introduced for high-power applications. Two types of switched-capacitor cells, including the full cell and the half-cell, are discussed. The full cell can be used for dc–ac inversion, and the half-cell is utilized in both dc–dc and dc–ac applications. A rotational charging scheme is adopted for the half-cell-based dc–dc voltage multiplier to eliminate the large output capacitor that exists in many traditional switched-capacitor topologies. A soft-switching scheme, which does not require extra components, is adopted to reduce the switching loss and electromagnetic interference. A variable switching frequency control scheme is proposed to realize soft switching for dc–ac inverters. The experimental results on a 2-kW prototype are presented to verify the proposed topologies. [ABSTRACT FROM PUBLISHER]

Presents a comments on the paper, "Nearest and non-nearest three vector modulations of NPCI using two-level space vector diagram - a novel approach," (Babu, N. and Agarwal, P.), IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 1999-2009, 2013. [ABSTRACT FROM AUTHOR]