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Multilevel inverters (MLIs) are playing a pivotal role in the power sector with potential applications, such as interfacing renewable energy sources with the grid and several industrial drive applications. MLIs with a smaller number of switching devices are more promising due to their compact size, reduced cost, and higher efficiency compared with their traditional counterparts. This paper, therefore, presents a new three-phase seven-level inverter. This topology is a combination of two cascade-connected two-level voltage-source inverters (VSIs) and H-bridge cells with flying capacitors (FCs). This paper presents the operating principle and the balancing technique for the dc-link capacitors and FCs. The generation of various output voltage levels and the limitation of the sinusoidal pulsewidth modulation control for FC voltage balancing is also presented. The number of components in the proposed circuit configuration and their voltage ratings are considerably lower compared with the recently proposed topologies. The behavior of the proposed circuit configuration is first assessed with simulation studies and is then tested with a laboratory prototype. The simulation and experimental results validate the effectiveness of the proposed topology and the voltage balancing technique. [ABSTRACT FROM AUTHOR]

Three-level neutral-point-clamped (NPC) inverters are being widely adopted in low-voltage low-power applications. For an intended application, the modulation strategy and the operating conditions are the two key factors that highly influence the major performance indices of the NPC inverter, such as efficiency, harmonic distortion, and voltage oscillations at neutral point (NP). Considering dynamic loading applications where the operating point varies significantly, this paper proposes an improved adjustable pulsewidth modulation (PWM) strategy for a three-level NPC inverter that can alter its modulation pattern to meet desired performance objectives for the full operation range. It has been shown that by varying two control parameters namely discontinuity control parameter and bias control parameter, the proposed modulation strategy changes its pattern between the most efficient generalized discontinuous PWM to NP oscillations-free partial dipolar PWM strategy. Additionally, to obtain a tradeoff between the performance parameters—efficiency, NP oscillations, and waveform quality—The proposed strategy has the ability to settle at the intermediate modulation patterns by transforming into a hybrid modulation signal. Furthermore, considering NP voltage unbalance mitigation as major technical challenge in adjustable modulation strategy, a voltage unbalance compensator that exhibits satisfactory balancing performance for the entire variations of modulation patterns and operating conditions has also been presented. The performance of the proposed modulation strategy in conjunction with voltage unbalance compensator has been evaluated in simulation by widely varying the speed and load of induction motor, and verified in experimentation. [ABSTRACT FROM AUTHOR]

This paper proposes a switching strategy for the Z-source inverter (ZSI), which has unequal short-through intervals to reduce the current ripple in the inductor of its impedance source. A size reduction of the inductor of the ZSI is one of the important issues in improving the power density of the ZSI, and the inductor current ripple reduction is required to achieve it. The proposed method can reduce the inductor current ripple by 27.8% compared with the conventional method that has equal short-through intervals without increasing the number of inverter switching. The proposed operation and ripple reduction were confirmed in experiments with a 3-kW-class laboratory prototype. Its result agreed to the calculated results, and it was confirmed that there is no increase in circuit losses caused by the application of the proposed method. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

This paper presents a step in microlevel photovoltaic (PV) summation technology for combining unsymmetrical PV modules with differences in specification and age, relocation on nonfertile land, or multilocation mounting by designing an add-on modular hardware interface to a multi-input single-output (MISO) dc bus, using an MISO controller employing a suitable maximum power point (MPP) tracker under partial shading/long distance/mismatching PV module conditions along with a sensor-less PV vector control inverter (PV–VCI) driving a three-phase asynchronous squirrel cage induction motor dedicated to irrigation, with the facility of autoconfiguration/autotuning at the beginning. A PV source gets automatically added/removed in a ramp profile in proportion to the load in steps, thus keeping on only when required, enabling high efficiency, minimum heating, and prolonged life as that of a PV module. The contribution includes a reduced PV energy cost per watt by 24.10%, improved return on investment by 27.48%, improved water discharge yield by 11.06%, and improved MPP tracker impact by 14.59% with 90.88% MISO system efficiency compared to a normal scheme. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

An optimal current control strategy for asymmetrical hybrid multilevel inverters (MLIs) is proposed in this paper enabling their use on motor drives, static synchronous compensators, and photovoltaic and wind generators, where a fast and precise current regulation is required. A key feature of these highly efficient converters is that an ac machine (motor or transformer) operates according to an open-end winding configuration, connected on one side to a main MLI and, on the other side, to an auxiliary two-level inverter (TLI). The first efficiently controls the main power stream operating at a low switching frequency, while the TLI acts as an active power filter, exploiting a conventional high-frequency two-level pulsewidth modulation (PWM) technique. The proposed control scheme optimally exploits the key features of the two inverters by suitably sharing the control task. In fact, a predictive current control is assigned to the MLI, which can be accomplished by low switching frequency operations, while the high switching frequency of the PWM-operated TLI is exploited to accomplish a fast and precise closed-loop current control, processing only a part of the power stream flowing through the system, thus producing low power losses. Simulations and experimental results confirm the consistency of the proposed approach. [ABSTRACT FROM AUTHOR]

In order to prevent the power switching devices (e.g., an insulated-gate bipolar transistor, IGBT) from shoot-through in voltage-source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in pulse width modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as “dead-time harmonics” hereafter) have to be compensated in order to achieve a satisfactory current quality, as required by standards. In this paper, the emission mechanism of dead-time harmonics in single-phase PWM inverters is, thus, presented considering the modulation schemes in detail. More importantly, a repetitive controller has been adopted to eliminate the dead-time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional-resonant-based fundamental-frequency current controller so as to mitigate the dead-time harmonics and also to maintain the control of the fundamental-frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead-time harmonics and other low-order distortions, and also, it is a simple method without hardware modifications. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system. [ABSTRACT FROM AUTHOR]

This paper proposes a novel bidirectional inverter, named series ac-link inverter. This three-phase inverter belongs to a new class of partial resonant ac-link converters in which the link is formed by a series ac inductor/capacitor (LC) pair having low reactive ratings. The input and output of this converter can be either dc, ac, single-phase, or multiphase. Therefore, they can appear as dc–dc, dc–ac, ac–dc, and ac–ac configurations. In all of these configurations, the ac capacitor is the main energy-storage element, and the inductor is merely added to facilitate the zero-current turnoff of the switches and their soft turn-on. Due to the zero-current turnoff of the switches in the proposed converter, the use of SCRs with natural commutation is possible as well. Since the current and voltage of the link are both alternating, no bulky dc-electrolytic capacitors are required in this converter. This paper mainly focuses on bidirectional dc to three-phase ac conversion. This single-stage inverter can step up or step down the voltage in a wide range. If galvanic isolation is required a single-phase high-frequency transformer can be added to the link. In the proposed inverter, the power can flow in both directions, and therefore, it is an excellent candidate for battery-utility interface and electric vehicle applications. In this paper, the principles of the operation of the proposed inverter, along with its design and analysis, are studied. Moreover, the performance of the proposed configuration is evaluated in this paper. Both simulation and experimental results are included. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit configuration and a control scheme for a single-phase current-source inverter with a power decoupling circuit which is called as the active buffer. The proposed inverter achieves a low-dc-input voltage ripple and also provides a sinusoidal current that can achieve unity power factor, without large passive components in the dc bus such as smoothing inductors and electrolytic capacitors. These components are conventionally required in order to decouple the power pulsation caused by the single-phase power source. In this paper, the fundamental operations of the proposed inverter are demonstrated experimentally. From the experimental results, the input voltage ripple is 8.87%, and the output current total harmonic distortion is 4.24%. In addition, an output power factor of 99% and a maximum efficiency of 94.9% are obtained. Finally, it is confirmed that the maximum power densities of the conventional circuit and the proposed circuit are 2.75 kW/L at the switching frequency of 70 kHz and 4.86 kW/L at the switching frequency of 80 kHz, respectively. [ABSTRACT FROM AUTHOR]

This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper discusses the use of a cascaded multilevel converter for flexible power conditioning in smart-grid applications. The main feature of the proposed scheme is the use of independent dc links with reduced voltages, which makes such a topology an ideal candidate for medium- and high-power applications with increased reliability. The developed control strategy regulates independent dc-link voltages in each H-bridge cell, and allows the selective and flexible compensation of disturbing currents under a variety of voltage conditions without requiring any reference frame transformation. The selective control strategies are based on the decompositions proposed in the conservative power theory, which result in several current-related terms associated with specific load characteristics. These current components are independent of each other and may be used to define different compensation strategies, which can be selective in minimizing particular effects of disturbing loads. Experimental results are provided to validate the possibilities and performance of the proposed control strategies, considering ideal and deteriorated voltage conditions. [ABSTRACT FROM PUBLISHER]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

Cascaded bidirectional dc–ac converters are commonly used in uninterruptible power supply applications and battery chargers for electric vehicles. Power conversion units for such applications employ a large electrolytic capacitor at high-voltage dc bus, which not only reduces the lifetime but also adds to the weight of the converter. In this paper, a novel bidirectional dual active bridge cascaded three-phase converter (DABCC) with six-pulse dc link is proposed. Also, a new closed-loop control scheme to implement the six-pulse modulation (SPM) technique in DABCC is proposed. The advantages of the proposed control scheme in DABCC are that the electrolytic capacitor is eliminated and is replaced with a low-value film capacitor resulting in increased reliability, compactness, and reduced cost. SPM technique also increases the dc bus utilization and decreases the inverter average switching frequency to 33% when compared with the conventional sine pulse-width modulation (SPWM). Harmonic components introduced in the pole voltages of the SPM-modulated DABCC due to inverter dead time are analyzed, and a resonant controller is designed to mitigate them. Also, root mean square current stress for high-voltage dc-link capacitor is studied, and it is shown that the capacitor requirement for SPM modulation is lower than the conventional SPWM. To validate the proposed control scheme, an 800-W proof-of-concept laboratory hardware prototype is fabricated and experimental results are demonstrated. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel automatic mode transition control strategy for multiple inverters to operate in grid-connected and standalone modes. When grid is available, these inverters feed power the grid by operating in current control mode. Upon grid failure, all inverters automatically shift to droop control mode for achieving proportional power sharing and shift back to current control mode when the grid becomes available. The synthesis of dual structure control algorithms of various inverters is achieved using novel state machines. These state machines are designed to facilitate smooth mode transition of the inverters. In this way, the control signals for mode transition are generated by state machines specific to each inverter. Unlike existing control methods, the proposed method neither requires communication-based supervisory control of inverters nor it requires dedicated storage facility for achieving smooth mode transition. The proposed control strategy is tested on a simulation model as well as an experimental prototype multi-inverter system. [ABSTRACT FROM PUBLISHER]

This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any $n$-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. [ABSTRACT FROM PUBLISHER]

A novel hybrid five-level voltage-source converter for high-efficiency applications is investigated in this paper. Compared with traditional multilevel converters, this hybrid multilevel converter generates desired staircase voltage levels with a reduced number of power devices and isolated drivers at higher voltage levels. It has redundant switching state combinations in hybrid multilevel converter, which makes it easy to balance flying capacitor voltages and realize fault-tolerant operation. A voltage-balancing control strategy based on switching state redundancies is presented for the hybrid multilevel converter to generate desired levels and also keep voltage balance of flying capacitors at the same time. The performance of the hybrid multilevel converter under various operating conditions is investigated in MATLAB/Simulink. The effectiveness of the proposed hybrid multilevel converter is validated by experiment results. [ABSTRACT FROM AUTHOR]

This paper presents a new control strategy for a modified cascade multilevel inverter used in drivetrain operations. The proposed inverter is a three-phase bridge with its dc link fed by a dc source (battery), and each phase series-connected to an H-bridge fed with a floating dc source (ultracapacitor). To exploit the potentials of the inverter for enhanced drivetrain performance, a sophisticated yet efficient modulation method is proposed to optimize energy transfer between the dc sources and with the load (induction motor) during typical operations, and to minimize switching losses and harmonics distortion. Detailed analysis of the proposed control method is presented, which is supported by experimental verifications. [ABSTRACT FROM AUTHOR]

A method for the seamless transition of three-phase inverters switched between grid-tied and stand-alone modes of operation is presented in this paper. In this method, only the inverter current and voltage sensors are utilized, and no control over the grid-side static transfer switch is needed. The presented method contains two strategies for grid-tied-to-stand-alone and stand-alone-to-grid-tied transitions. In the stand-alone-to-grid-tied transition strategy, a novel algorithm is presented for estimating the grid angle nearly instantaneously, which allows the three-phase inverter to respond very quickly if the grid and point-of-common-coupling voltages are out of phase. This fast response allows the inverter to effectively eliminate the transient overcurrent that would normally occur if it was connected to the grid without first being synchronized. The fast response also allows the inverter to return to normal operation very quickly after such an event. The strategy for the seamless transition from grid-tied to stand-alone mode is also presented. These strategies have been verified through experiments, and the results are presented in this paper. [ABSTRACT FROM PUBLISHER]

In this paper, the recently introduced model predictive pulse pattern control (\MP^3\C) strategy is adapted to the ACS 2000 medium-voltage (MV) drive of ABB. The drive system consists of a five-level active neutral-point-clamped (ANPC-5L) rectifier, an inverter, and an induction machine (IM). The inverter is fed with offline-computed optimized pulse patterns (OPPs) that produce minimum harmonic distortion in the stator windings of the ac machine. An optimal stator flux trajectory is calculated from these OPPs, and a trajectory controller tracks it in real time. In the proposed approach, trajectory tracking is based on model predictive control: a constrained optimal control problem is formulated and solved in real time in a computationally efficient manner. An event-based prediction horizon is employed in order to ensure fast tracking of the stator flux trajectory. The advantages of the proposed method are optimal steady-state behavior in terms of harmonic distortion and fast torque response. The method was tested on an MV ANPC-5L inverter coupled to a general-purpose 1.21-MW IM. Experimental results were obtained from this industrial setup, and they are presented in this paper to demonstrate the high performance of \MP^3\C. [ABSTRACT FROM PUBLISHER]

This paper presents a theoretical study with experimental validation of a circulating-current suppression method for parallel operation of three-phase voltage-source inverters (VSI), which may be suitable for modular parallel uninterruptible power supply systems or hybrid ac/dc microgrid applications. The basic concept of the proposed circulating-current suppression method is to modify the original current references by using the current difference among the parallel inverters. In the proposed approach, both cross circulating current and zero-sequence circulating current are considered, and are added into the conventional droop plus virtual impedance control. In the control architecture, the reference voltages of the inverters are generated by the primary control loop, which consists of a droop control and a virtual impedance. The secondary control is used to compensate the voltage drop on the virtual impedance. Furthermore, a circulating-current control loop is added to improve the average current-sharing performance among parallel VSIs. Experimental results are presented to show the effectiveness of the proposed control method to suppress both cross and zero-sequence circulating currents. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulse-width modulation (PWM) scheme for reducing the common-mode voltage (CMV) in the three-phase five-level active neutral-point clamped (5L-ANPC) inverter is proposed, where only the 55 selected voltage vectors among the entire 125 that produce low values of the CMV are utilized. This PWM scheme can significantly reduce the CMV without the increase of switching losses and total harmonic distortion of the output voltages. With the 55 selected voltage vectors, the inverter can still operate up to the maximum modulation index. In addition, the capacitor voltages are controlled by redundant switches of the 5L-ANPC inverters. It has been shown that the peak value of the CMV is decreased to one-twelfth of the dc-link voltage from the simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper identifies the characteristics of a current source inverter operating in discontinuous conduction mode, and proposes a new multiobjective pulse-width modulation (PWM) method to mitigate voltage boosting and harmonic distortion effects. The method takes into account load impedance effects. Controls are also developed to enable transition between the multiobjective PWM method and conventional PWM as the current source inverter operates in discontinuous and continuous modes of operation. The concept is verified experimentally on a 3 kW test bed. [ABSTRACT FROM AUTHOR]

The conventional current-source inverter has two major problems: unidirectional power flow and voltage boost operation, which make it impossible to be used in many applications, such as hybrid electric vehicles and general-purpose variable-speed motor drives. Z-source inverters (ZSIs) can solve both problems. Quasi-ZSIs (qZSIs) were recently proposed as an important improvement to traditional ZSIs. Besides the advantages inherited from ZSIs, qZSIs also have several of their own merits. This paper presents a comprehensive study on the new features of current-fed qZSI, including the advantageous buck–boost function, improved reliability, reduced passive component ratings, and unique regeneration capability. The current-fed qZSIs are bidirectional with an additional diode, unlike the voltage-fed ZSI that needs a switch to achieve bidirectional power flow. A modified space vector pulse-width-modulation method is proposed, and the available operating regions for motoring and regeneration operation are analyzed in this paper. Since the current-fed qZSI has the same operation as the current-fed ZSI, many results of this paper are also applicable to the current-fed ZSI. A reverse-blocking insulated-gate bipolar-transistor-based current-fed qZSI prototype was developed in the laboratory. Simulation and experimental results are shown to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper proposes three dynamic voltage restorer (DVR) topologies. Such configurations are able to compensate voltage sags/swells in three-phase four-wire (3P4W) systems under balanced and unbalanced conditions. The proposed systems use two independent dc links. Proposed configurations present advantages in terms of switch blocking voltages and consequently lower dc-link voltage rating. The complete control system, including the pulsewidth modulation (PWM) technique, is developed, and comparisons between the proposed configurations and a conventional one are performed. Simulation and experimental results are provided to validate the theoretical approach. [ABSTRACT FROM AUTHOR]

A digital dead-beat current controller for voltage source converters is presented in this paper. The control structure is specified in a digital hardware description language, synthesized, and deployed on a field-programmable gate array chip. By updating, with negligible computation delay, the duty cycle twice in a switching period, the reference current error is nulled in half a modulation period, so that the controller's small-signal bandwidth is maximized. In addition, due to a simple transient detection circuit, the large-signal response delay is reduced to a small fraction of the modulation period, which is determined by the chosen current signal oversampling rate. The controller can effectively support different voltage-source inverter applications, such as active filters, uninterruptible power supplies, microgrid distributed energy resource controllers, and dc–dc converter applications, including interface converters for renewable energy sources, laboratory battery chargers, and electronic welding machines. [ABSTRACT FROM AUTHOR]

Constant-volts-per-hertz induction motor drives and vector-controlled induction motor drives utilize pulsewidth modulation (PWM) to control the voltage applied on the motor. The method of PWM influences the pulsations in the torque developed by the motor. A space-vector-based approach to PWM facilitates special switching sequences involving the division of active state time. This paper proposes a space-vector-based hybrid PWM technique, which is a combination of the conventional and special switching sequences. The proposed hybrid PWM technique results in a lower peak-to-peak torque ripple than conventional space vector PWM (CSVPWM) at high speeds of an induction motor drive. Furthermore, the magnitude of the dominant torque harmonic due to the proposed hybrid PWM is significantly lower than that due to CSVPWM at high speeds of the drive. Experimental results from a 3.75-kW sensorless vector-controlled induction motor drive under various load conditions are presented to support analytical and simulation results. [ABSTRACT FROM AUTHOR]

In the square-wave voltage signal injection sensorless drive of the interior permanent-magnet synchronous machine, the injection voltage can be distorted by the inverter nonlinearity effects especially when the injection voltage is low. If that happens, a high-frequency (HF) current signal which contains the rotor position information could be also distorted, which directly leads to an error in the position estimation. This paper analyzes the effects of the inverter nonlinearity on injection voltage, on induced current ripple, and on the position estimation performance in sequence and proposes a voltage injection method to minimize the impact of the inverter nonlinearity by the regulation of the HF current ripple. By simulations and experiments, the performance of the proposed method has been verified. The experimental results show 19.7% reduction of position estimation error under 15% of rated voltage signal injection without increasing the current ripple at a certain operating condition. Moreover, the performance of position estimation is kept uniform regardless of the loading condition. [ABSTRACT FROM AUTHOR]

This paper proposes a novel 3 $\phi$ stand-alone solar photovoltaic (PV) system configuration that uses high-gain high-efficiency $(\approx\! 96\%)$ dc–dc converters both in the forward power stage and the bidirectional battery interface. The high-voltage-gain converters enable the use of low-voltage PV and battery sources. This results in minimization of partial shading and parasitic capacitance effects on the PV source. Series connection of a large number of battery modules is obviated, preventing the overcharging and deep discharging issues that reduce the battery life. In addition, the proposed configuration facilitates “required power tracking (RPT)” of the PV source as per the load requirements, eliminating the use of expensive and “difficult to manage” dump loads. High-performance inverter operation is achieved through $abc$ to $dq$ reference frame transformation, which helps in generating precise information about the load's active power component for RPT, regulation of ac output voltage, and minimization of control complexity. Inverter output voltage is regulated by controlling the modulation index of sinusoidal pulsewidth modulation, resulting in a stable and reliable system operation. The active power demand is controlled by regulating the dc link voltage. All the analytical, simulation, and experimental results of this work are presented. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel modulation technique and a new balancing control strategy for a single-phase five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter. The proposed modulator can control the FC voltage to follow the requested reference value and simultaneously generate the required ac output voltage regardless of the values of the dc capacitor voltages of the converter. By implementing this method, smaller values of the dc-link capacitor and FC can be used even in applications that could experience ripple or transient in the capacitor voltage. In a single-phase five-level ANPC converter applications, where the capacitors can experience pulsation power and dc-link balancing issues, such as grid-connected photovoltaic system, the selection of the reference voltage value for the FC can play an important role to balance the average values of the dc-link capacitor voltage. The proposed new control strategy uses a new reference voltage for the FC to be applied by the new modulator to have an average balanced dc-link voltages as well as an ac output voltage with good power quality. Simulation studies and experimental results demonstrate the effectiveness of the proposed modulation technique and control strategy even with relatively small dc capacitors to produce high-quality output voltage and current waveforms while maintaining an average balanced dc-link voltages. [ABSTRACT FROM PUBLISHER]

Currently, road vehicles are more equipped with permanent magnet synchronous motors. Particularly interesting are brushless dc (BLDC) motors, which, due to their inherently sensorless operation, are considered as viable candidates in large-scale production industries such as the automotive one. Within this trend, this paper deals with the synthesis and implementation of a novel direct torque control (DTC) strategy dedicated to the control of BLDC motor drives. Compared with the most recent and highly performed DTC strategy, the proposed one offers improved reliability due to the achievement of balanced switching frequencies of the inverter upper and lower insulated-gate bipolar transistors, on one hand, and the reduction in the average value of the motor common mode voltage, on the other hand. Furthermore, the torque ripple is significantly damped during sector-to-sector commutations using a three-level hysteresis torque controller. An experientially based comparative study of the most recent and highly performed DTC strategy from one side and the introduced one from the other side clearly highlights the potentialities exhibited by the latest one. [ABSTRACT FROM AUTHOR]

Six-step operation has many advantages in permanent-magnet synchronous machine (PMSM) drives such as maximum power utilization and widened flux-weakening region. However, due to the maximum utilization of inverter output, saturation of current regulator makes it difficult to maintain instantaneous current control capability. Accordingly, in most of conventional research studies, the six-step operation has been implemented by voltage angle control without current regulation, whose dynamic performance is quite unsatisfactory. This paper proposes a control scheme for the six-step operation of PMSM with enhanced dynamic performance of current control. By collaborative operation of dynamic overmodulation, flux weakening, and a technique for enhanced dynamic performance, the six-step operation is realized without losing instantaneous current control capability. Simulations and experiments are carried out to verify the effectiveness of the proposed control scheme. The experimental results show 17% extension of the constant torque region and 27% enhancement of torque capability at three times of the base speed. [ABSTRACT FROM AUTHOR]

This paper proposes a smooth transition control strategy for voltage-source inverters between standalone (SA) and grid-connected (GC) modes of operation. In the GC mode, the amount of power exchanged with the utility grid is controlled by regulating the phase currents. In the SA mode, the load voltage is regulated by the inverter with its phase dictated by the inverter control. The transition between SA and GC operations that will ensure continuous power delivery to the load requires continuation in the phase of the system voltage. The proportional–integral, trapezoidal, sinusoidal, and staircase frequency variation techniques have been analyzed to find the best approach for minimizing the total harmonic distortion (THD). A smooth frequency variation technique has been developed, which provides lower THD on the voltage waveforms compared with the other techniques. The new algorithm has been implemented on a 5-kW single-phase utility interactive inverter having the SA operation capability. The simulation and experimental results show that the proposed technique provides seamless transition between the inverter modes of operation with minimal distortion at the inverter output voltage. [ABSTRACT FROM PUBLISHER]