Search

This paper presents a novel multilevel radio frequency (RF) pulsewidth modulation (PWM) method for all-digital transmitters (ADTx) that actively eliminates the selected harmonics of RF-PWM. Compared with existing multilevel RF-PWM techniques, this method uses several adaptive thresholds and controls the pulsewidth of the corresponding subpulses to make the selected harmonics cancel each other out and keep the fundamental frequency component proportional to input envelope. For the third-harmonic elimination, the corresponding five-level RF-PWM scheme presented in this paper shows that it can significantly relax the filtering requirements and improve the wideband performance of the ADTx. The proposed scheme is verified by extensive simulations and offline measurements. The simulations show good potential for high-frequency operation up to gigahertz ADTx. The measured results show that the third-harmonic suppression of the proposed scheme has increased with the decreasing of the time resolution for digital implementations. For a 3.80-dB peak-to-average power ratio (PAPR) QPSK signal and a 6.04-dB PAPR 16QAM signal at 200-MHz carrier, the proposed scheme can achieve above −51- and −48-dBc third-harmonic suppression, respectively, when the time resolution is 50 ps and relative time resolution is 1%, and improves above 30 dBc to the existing schemes. [ABSTRACT FROM AUTHOR]

This paper describes the modeling, analysis, and design of a complete (dc-to-dc) inductive wireless power transfer (WPT) system for industrial moving applications. The system operates at 6.78 MHz and delivers up to 150 W to a load moving along a linear path, providing a quasi-constant dc output voltage and maintaining a zero voltage switching operation, regardless of position and load, without any retuning or feedback. The inductive link consists of an array of stationary transmitting coils and a moving receiving coil whose length is optimized to achieve a constant coupling coefficient along the path. Each Tx coil is individually driven by a constant amplitude and phase sinusoidal current that is generated from a GaN-based coupled load-independent Class EF inverter. Two adjacent transmitters are activated at a given time depending on the receiver’s position; this effectively creates a virtual series connection between the two transmitting coils. The Rx coil is connected to a passive Class E rectifier that is designed to maintain a constant dc output voltage independent of its load and position. Extensive experimental results are presented to show the performance over different loading conditions and positions. A peak dc-to-dc efficiency of 80% is achieved at 100 W of dc output power and a dc output voltage variation of less than 5% is measured over a load range from 30 to $500~\Omega $ . The work in this paper is foreseen as a design solution for a high-efficient, maintenance-free, and reliable WPT system for powering sliders and mass movers in industrial automation plants. [ABSTRACT FROM PUBLISHER]

In this paper, two novel $4 \times 6$ filtering Butler matrices with uniform and nonuniform power distribution are proposed. The matrices, consisting of a network of coupled resonators and two phase shifters, provide power division and phase shift together with a bandpass transfer function. The analytical synthesis procedures for the $4 \times 6$ filtering Butler matrices are presented. To verify the concept experimentally, two $4 \times 6$ filtering Butler matrices, operating at 2.4 GHz, with uniform and nonuniform power distribution are designed, fabricated, and measured. Simulated and measured results are found to be in good agreement with each other. Multibeam antenna arrays are realized by using the Butler matrix, and the theoretical analysis has been confirmed by measurements of multibeam antenna arrays, which show reduced sidelobe level (SLL). [ABSTRACT FROM AUTHOR]

This paper presents a generalized analysis of the Class-E power amplifier (PA) with a shunt capacitance and a shunt filter, leading to a revelation of a unique design flexibility that can be exploited either to extend the maximum operating frequency of the PA or to allow the use of larger active devices with higher power handling capability. The proposed PA fulfills zero voltage switching (ZVS) and zero voltage derivative switching (ZVDS) conditions, resulting in a theoretical dc-to-RF efficiency of 100%. Explicit design equations for the load-network parameters are derived, and the analytical results are confirmed by harmonic-balance simulations. Two PA prototypes were constructed with one designed at low frequency and the other at high frequency. The first PA, which employs a MOSFET and a lumped-element load-network, delivered a peak drain efficiency $(\!D\!E)$ of 93.3% and a peak output power of 37 dBm at 1 MHz. The second PA, which employs a GaN HEMT and a transmission-line (TL) load-network to provide the drain of the transistor with the required load impedances at the fundamental frequency as well as even and odd harmonic frequencies, delivered a peak $D\!E$ of 90.2% and a peak output power of 39.8 dBm at 1.37 GHz. [ABSTRACT FROM AUTHOR]

This paper presents analytic and experimental results for high-efficiency GaN HEMT class-F and inverse class-F (class-F−1) synchronous rectifiers. The rectifier designs are based on time-reversed duals of corresponding class-F amplifiers. A detailed analysis of the power efficiency of a class-F rectifier is presented. The analysis shows that, unlike the amplifier dual, the rectifier configuration does not have significant overlap loss because of device constraints in terms of operation in quadrant III. Consequently, the power efficiency of the class-F rectifier is slightly higher than the amplifier circuit under equal source power conditions. Experimental measurements are shown, which compare the rectification efficiency of a class-F rectifier with class-F−1 rectifiers. It is shown that operation of the rectifiers under back-off conditions mimics the power efficiency of an amplifier with envelope tracking. Based on this paper, it is concluded that the class-F−1 mode has better rectification efficiency compared with that of class-F, both at peak power and under back-off conditions. [ABSTRACT FROM PUBLISHER]

We describe a state-of-the-art channel sounder to support channel-model development for mobile millimeter-wave (mm-wave) communications. The system can measure the complex amplitude, delay, and angle of arrival of the multipath components of indoor and outdoor channels. Specifically, a custom multiplexer (MUX) records the channel impulse response across a 16-element receive (RX) antenna array in 65.5~\mu \texts , while the channel is static. The delay resolution of the system is 1 ns and, because the elements are oriented in a 3-D space, both azimuth and elevation angles can be extracted. The robust link budget, comprising high-gain directional RX antennas, enables indoor link measurement beyond 150 m in line-of-sight and 20 m in non-line-of-sight conditions. The RX array is mounted on a location-aware robot, which is battery operated. Combined with the speed of the MUX, untethered acquisition of mobile-channel data is possible. To the best of our knowledge, this paper contributes the first sounder that is capable of mobile measurements at mm-wave frequencies. The hardware implementation of a functional 83.5-GHz system is described in this paper, and some illustrative results, including small-scale statistics and Doppler, are presented. [ABSTRACT FROM AUTHOR]

In this paper, a compact, low-loss, dual-path phase-switched inductor suitable for millimeter-wave (mmWave) transceiver subblocks is proposed. The signal path through the structure is determined by the relative polarity of two differential excitation signals applied to the four-port structure. Because inductance is varied by altering signal path through the inductor, signal-path MOSFET switches are avoided. The inductor, therefore, demonstrates high, mode-invariant quality factor, facilitating the design of high-performance dual-band mmWave transceiver subblocks. Based on the proposed inductor, a dual-band Ka-band oscillator is designed in a 65-nm CMOS technology which covers two frequency bands from 14.8 to 18.7 GHz and from 20.8 to 26.6 GHz. The proposed inductor facilitates a widely tunable, dual-band frequency range while maintaining the state-of-the-art phase noise, power consumption, and figure of merit (FoM). The oscillator achieves measured fractional tuning ranges of 23.3% and 24.5% and phase noise of −115.1 dBc/Hz at 2-MHz offset while consuming only 4.8-mW dc power. A peak tuning-range FoM of −195.1 and −194.9 dBc/Hz is demonstrated across the low- and high-frequency bands. [ABSTRACT FROM AUTHOR]

This paper presents a 10.56-GHz transceiver with ultracompact transformer-based transmit/receive (T/R) switching via matching network reuse. The reused transformer can operate as T/R switch and impedance matching networks for a power amplifier (PA) and a low-noise amplifier (LNA) simultaneously. The T/R switch, PA, and LNA are fully codesigned, and the interstage matching networks of the PA and LNA are comatched with the T/R switch to improve the performance of the front end (FE). A three-coil transformer is introduced in the PA to improve the linearity and bandwidth of the FE in the transmit (TX) mode. A mode selection unit (MSU) is also utilized in LNA to improve the TX/RX isolation and the linearity of the FE in the TX mode. Utilizing the fully codesign technique in the FE, the bandwidth of the FE is extended to over 4.2 GHz in both the TX and RX modes. A novel “gm-cell-based” broadband programmable gain amplifier (PGA) and a third-order transconductance-capacitor (gm-c) low-pass filter (LPF) are used in analog baseband to provide over 24-dB gain and 1.8-GHz bandwidth adjustment range with ultralow dc power consumption. To prove the concept, the new architecture is implemented in 28-nm CMOS technology. Measurement results prove that the insertion loss of the proposed T/R switch introduced in both the TX and RX modes is ~0.5 dB, and benefiting from this, the RX obtained a 4.2-dB noise figure, and TX obtained 9.9- and 14.1-dBm OP1dB and Psat. The measured single sideband bandwidth of the transceiver is wider than 2.1 GHz in both the TX and RX modes. [ABSTRACT FROM AUTHOR]

This paper demonstrates generalized code-selective filters for code-pass and code-reject signal processing at RF. A code-reject scheme using a quarter-wave ($\lambda /4$) impedance transformation is also demonstrated to overcome tradeoffs of insertion loss (IL) and linearity compared to series band-reject $N$ -path filters. A 45-nm CMOS SOI implementation consumes a power of 9.32 mW from 1 to 1.8-V supplies at the frequency of 0.35–1.1 GHz and the chip area is 1.73 mm2. The measured transmit rejection is up to 22.6 dB with 4-dB IL. The in-band third-order-intercept point (IIP3) is up to 22.6 dBm and noise figure (NF) of 4–6 dB depending on the applied codes. [ABSTRACT FROM AUTHOR]

This paper reports a transmit–receive (Tx–Rx) front-end (FE) in bulk CMOS targeting fifth-generation (5G) mobile user equipment (UE)-phased arrays. Block-level specifications are first reviewed based on link budget and UE array beam steering considerations, and compared against measured standalone power/low-noise amplifier and phase shifter test circuit performances. Then, the codesign of the Tx–Rx switch and antenna impedance matching is investigated for the important case of wideband dual-resonance networks, leading to a proposed topology that is experimentally verified using silicon passive test structures. A fully integrated FE prototype is fabricated in 1.1-V 1P6M 40-nm bulk CMOS and characterized in detail across digital gain and phase settings. Measurements show Tx-mode $P_{\mathrm {1\,dB}}$ /PAE1 dB ≥ 14.6 dBm/21.9% across 27–30 GHz, and peak $P_{\mathrm{ out}}$ /PAE = 6.5dBm/8.8% at 27 GHz for an $8\,\,\times100$ -MHz carrier-aggregated 64-QAM OFDM signal. In Rx-mode, a noise figure of 5.5–6 dB and an input-referred third-order intercept point of −8.5 to −6 dBm are achieved across 27–33 GHz. Normalized to area/power consumption, the achieved performance is the state of the art relative to the most recent CMOS/SiGe FEs. [ABSTRACT FROM AUTHOR]

A wideband hybrid mode-switching push–push oscillator with low phase noise is presented in this paper. To achieve the wide tuning range, the inductive and capacitive hybrid mode-switching technique is proposed for the first time. It introduces more freedom of design parameters (i.e., inductance and capacitance) in the resonant tank. Under certain tuning range requirement, the hybrid mode-switching oscillator achieves higher input impedance of the resonator compared to the conventional mode-switching oscillators. Meanwhile, a transformer-coupled inductor ring with symmetrical layout configuration is proposed to realize the switch-less hybrid mode switching, which further improves the circuit performance at sub-THz. Therefore, a good phase noise performance can be obtained within a wide tuning range, which leads to a relaxed tradeoff between the phase noise and tuning range. To verify the aforementioned mechanism operating at sub-THz band, a hybrid mode-switching oscillator based on the dual-mode push–push topology is proposed and fabricated in a conventional 28-nm CMOS technology. The measured results show a 21.7% tuning range with the center frequency of 169.6 GHz and a state-of-the-art FoMT of −180.6 dBc/Hz. The core circuit only occupies 0.039 mm2, while drawing 95 mW with a 0.9-V supply. [ABSTRACT FROM AUTHOR]

This paper describes Ka-band inductor-shared RF switches and their applications to a 35.2-ps 6-bit true-time-delay (TTD) switched-line (SL) phase shifter (PS). The inductor-shared RF switches share an inductor to match the input and output (I/O) ports of different states, which are realized with a switched inductor for SP ${n}\text{T}$ case and with a shared matching network for DP ${n}\text{T}$ case. The switches are applied to controlling most significant 3 bits of the proposed TTD SL PS. The delay lines and reference lines of the PS are implemented with microstrip lines and inverted microstrip lines in the same space, respectively. The dual-side microstrip lines allow it to have not only a small size but also compensation of the loss difference between the signal lines with different lengths. The least significant 3 bits are implemented with the modified structure of the SL PS, which reduces the size further by replacing a reference line by a series switch. The test chip is fabricated in a 65-nm CMOS process. It operates in the range of 20–30 GHz occupying a 0.18 mm2 core size. Its measured insertion loss and IP1dB are 11 dB and 6.5 dBm at 28 GHz, respectively. The measured gain error and rms delay error are less than 2 dB and 0.7 ps at operation frequencies. [ABSTRACT FROM AUTHOR]

This paper presents a single-bit RF transmitter based on single-bit switched-capacitor RF digital-to-analog converters (DACs) embedded in an finite-impulse response (FIR) filter (FIR-DACs). The transmitter system comprises a single-bit quadrature delta–sigma modulator ($\Delta \Sigma \text{M}$), a digital mixer, and a 109-tap RF FIR-DAC stage with a single external inductor, combining D–A conversion with discrete- and continuous-time filtering. The on-chip part of the FIR-DAC is built exclusively with CMOS inverters and metal–oxide–metal capacitors, which are implemented in the interconnect layers to propose a compact fully digital solution, suitable for advanced CMOS nodes. A method for canceling redundant switching in the FIR-DAC is proposed to reduce its complexity and power consumption. Combining discrete- and continuous-time filtering, the out-of-band quantization noise of the 1-bit RF signal is strongly attenuated below the level required by emission masks. The RF FIR-DAC prototype is implemented in a 28-nm FD-SOI CMOS technology with ten metal layers and occupies a total active area of only 0.047 mm2. The overall power consumption is 38 mW at 4.6-dBm peak output power, 900-MHz carrier frequency, and 1-V supply. FD-SOI body bias $V_{t}$ tuning is used to effectively correct mixing clock duty-cycle errors in order to perform precise high-frequency I/Q interleaving, which enables high image and local oscillator rejections. The resulting power consumption, surface, and performance of the measured prototype make the proposed circuits and concepts particularly appropriate for use in emerging Internet of Things (IoT) applications. [ABSTRACT FROM AUTHOR]

A new series of multifunctional reconfigurable bandpass filters (BPFs) and their analytical synthesis design are presented in this paper. They feature frequency-adaptive characteristics in both their passbands and notched bands, as well as switchable-notched-band capability. Their basic filter architecture is discussed and modeled in a progressive manner. The initial circuit consists of a second-order Chebyshev-type filter to which two stubs are added to increase filtering selectivity through transmission-zero (TZ) creation. Subsequently, to produce an embedded notched band, stubs acting as band-stop structures are also inserted at the input–output terminals. The multifunctional properties of this filter scheme are analyzed attending to the resonance frequencies of the introduced stubs. When these resonance frequencies are tuned while keeping a constant spacing between them, a center-frequency reconfiguration with constant bandwidth is achieved; when the resonance frequency of the notched band is shifted to the TZ positions, the notched band is switched-off. The described filter synthesis methodology is based on the constant and frequency-mapping technique, where the dual-mapping functions are controlled to obtain reconfigurable/switchable properties from a low-pass prototype. For experimental-validation purposes, two reconfigurable lumped-element filter prototypes using the proposed synthesis technique are designed, manufactured, and tested. One exhibits a simple reconfigurable passband, whereas the other one adds a controllable/switchable embedded notched band that results in a quasi-elliptic-type dual-passband response. When compared to some related prior-art designs, these filters have the advantages of explicit design process, quantified analysis, and multifunctional responses. [ABSTRACT FROM AUTHOR]

In this paper, a single-ended parallel-circuit (PC) class-E/F power amplifier (PA) is proposed. For a particular case of the PC class-E/F3 mode with 50% duty cycle, its analytical derivation of the idealized waveforms, optimum values of the load network components, and significant figure-of-merit of PA is elaborated and verified. The ideal optimum voltage and current waveforms do not overlap simultaneously, which presents a theoretical drain efficiency of 100%. In addition, compared with other switch-mode PAs, the proposed structure successfully improves the performance in the peak drain voltage ($V_{\mathrm {max}}$), maximum operating frequency ($f_{\mathrm {max}}$), and power output capability ($c_{p}$). Hence, it provides a good choice for high-efficiency mobile/wireless communication systems in the future. The analysis is validated by simulation and design of a test board. The measurement result shows the output power of 40.4 dBm, drain efficiency of 83.9%, power-added efficiency of 77.2%, and power gain of 10.4 dB at an operating frequency of 2.6 GHz. [ABSTRACT FROM AUTHOR]

This paper reports on the RF design of fully reconfigurable quasi-elliptic-type single- and multi-band microwave bandpass filters (BPFs) and duplexers. They are based on series-cascaded resonators and multi-resonant/multi-band cells that produce frequency-reconfigurable poles and transmission zeros (TZs). By appropriately tuning the resonant frequencies of their constituent resonators, multiple levels of transfer-function adaptivity can be obtained. These capabilities include center-frequency and bandwidth tuning, as well as intrinsic RF switching-off (i.e., without the use of RF switches). As opposed to conventional BPF tuning mechanisms, the aforementioned reconfiguration characteristics avoid the use of tunable couplings. The basic operating principles of the engineered resonator-cascade BPF concept are presented through a three-pole/two-TZ example. Afterward, methods for expanding the proposed filter design approach to higher order, multi-band, and multi-port (e.g., duplexers) realizations are explained through coupling-matrix-based analysis. For practical-demonstration purposes, four L-band tunable microstrip prototypes were developed and measured. They include: 1) a five-pole/four-TZ BPF; 2) a five-pole/two-TZ BPF; 3) a dual-band BPF with two three-pole/two-TZ passbands; and 4) an RF duplexer. [ABSTRACT FROM AUTHOR]

This paper presents an architecture for differential Colpitts voltage-controlled oscillators (VCOs) in complementary metal–oxide–semiconductor (CMOS) that utilizes three design techniques to extend the tuning range (TR) of the VCO, while maintaining a low phase noise (PN) and a low power consumption. First, a switched-capacitor bank based on a variable capacitive feedback technique is introduced to achieve a wide TR with a minimal PN degradation. Second, a $G_{m}$ -boosting technique using interstage inductors is employed to lower the power consumption and relax VCO startup issues. Third, a dynamic forward-body self-biased technique is used to further reduce the power consumption and PN of the proposed structure. As a proof of concept, a 26.3-GHz differential Colpitts VCO is designed and fabricated in a 65-nm CMOS process. Based on the measurement results, the VCO achieves a PN of −122.1 dBc/Hz at 10-MHz offset from the center frequency, and a TR of 20%. The circuit consumes 2.3 mW from a 1-V supply and excluding the pads occupies a 0.22 mm2 of silicon area. Compared to the recently published CMOS VCOs within the same frequency range, the proposed VCO simultaneously achieves a wide TR, low power dissipation, and low PN, resulting in a figure of merit (FOM) and FOM incorporating the TR (FOM $_{T}$) of −187 and −193 dBc/Hz at 10-MHz offset from the center frequency, respectively. [ABSTRACT FROM AUTHOR]

This paper demonstrates the first nonreciprocal network based on switched low-loss acoustic delay lines. The four-port circulator is built upon a recently reported frequency-independent, programmable, nonreciprocal framework based on switched delay lines. The design space for such a system, including the origins of the insertion loss (IL) and harmonic responses, is theoretically investigated, illustrating that the key to better performance and low-cost modulation signal synthesis lies in a large delay. To implement a large delay, we resort to in-house fabricated low-loss, wideband lithium niobate (LiNbO3)SH0 mode acoustic delay lines employing single-phase unidirectional transducers. The four-port circulator, consisting of two switch modules and one delay line module, has been modularly designed, assembled, and tested. The design process employs time-domain full circuit simulation, and the results match well with measurements. An 18.8-dB nonreciprocal contrast between IL (6.6 dB) and isolation (25.4 dB) has been achieved over a fractional bandwidth of 8.8% at a center frequency 155 MHz, using a record low switching frequency of 877.19 kHz. The circulator also shows 25.9-dB suppression for the intramodulated tone and 30 dBm for IIP3. Upon further development, such a system can potentially lead to future wideband, low-loss chip-scale nonreciprocal radio frequency systems with unprecedented programmability. [ABSTRACT FROM AUTHOR]

A time-division duplex (TDD) transmit/receive (T/R) millimeter-wave (mm-wave) front-end comprises a power amplifier (PA), a low-noise amplifier (LNA), an antenna switch, and appropriate passive matching and combining networks. In this paper, a synthesis methodology is proposed that minimizes the overall losses by combining the PA output and the LNA input matching networks together with the T/R switch into one network. The technique improves mm-wave transceiver performance in terms of PA efficiency and LNA noise figure. The proposed T/R combiner can achieve high linearity and can handle large PA output voltage swings. The architecture can be implemented in any process which provides high integration capability. A Ka-band implementation is demonstrated using 45 nm CMOS silicon-on-insulator that includes a high power, four-stack-based PA and an inductively source-degenerated cascode-based LNA. Within the front-end, the PA achieves saturated output power of 23.6 dBm with peak power added efficiency of 28%, while the LNA achieves NF of 3.2 dB. The overall chip area is 0.54 mm2, including pads. [ABSTRACT FROM AUTHOR]

This paper proposes and describes in detail a new approach to the design of very compact active microwave compressors capable of providing rectangular pulses of up to 100 ns. The approach consists in using a storage cavity, which comprises linear waveguide sections connected by tees such that the cavity geometry can be 2-D or 3-D or can be variable to allow direct space-saving integration of a compressor into a microwave source. Also presented are the scattering matrix data on uniform wave propagation along the storage cavity with little reflection and on conditions necessary for such uniformity. The S-band experiments demonstrate the capability of storage cavities with two and three parallel waveguide sections of about 1 m long to produce rectangular pulses of duration 5, 15, and 25 ns with a power gain and output power of about 16 dB, 80 MW; 15 dB, 60 MW; and 13 dB, 40 MW, respectively. Our estimates suggest that 12 waveguide sections can provide a rectangular pulse of 100 ns with a power gain 10 dB. [ABSTRACT FROM AUTHOR]

This paper presents a type of bandpass filter (BPF)-integrated single-pole double-throw (SPDT) switch using common shorted stepped-impedance resonator technique. The BPF-integrated ON-state with reverse-biased p-i-n diodes can be synthesized by classical coupled-resonator filter design theory, and the OFF-state with forward-biased p-i-n diodes is detuned which exhibits high OFF-state suppression (OSS). The transmission zeros due to the direct coupled feed, the cross-couplings and the cancelling effect of mixed electric and magnetic coupling are produced to improve the ON-state passband selectivity significantly. As examples, the third-order/fourth-order BPF-integrated SPDT switches at center frequency $f_{0} = 1$ GHz with ripple bandwidth of 110/100 MHz are designed, which show low insertion losses of 1.08/1.58 dB, sharp skirts, high roll-off rate of sidebands, high OSSs of 40.9/40.1 dB as well as high port-to-port isolation of 57.4/47.8 dB. Then, the switched 50- $\Omega $ matching circuits are in series with two output ports of above BPF-integrated SPDT switches, resulting in the absorptive OFF-state. The fabricated third-order/fourth-order BPF-integrated SPDT switches with absorptive OFF-state have the matched return losses of 30/28.2 dB, and their OSSs and port-to-port isolations are also improved. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid supply modulator (SM) including a buck-boost (BB) converter, which has wide battery operating range for cellular envelope tracking (ET) applications. The proposed SM supports both ET and average power tracking (APT) mode depending on the power amplifier (PA) output power level. The output voltage swing of SM is boosted up to 4.5 V by the integrated BB converter as a supply of a linear amplifier. The dynamic-controlled BB output increases ET operating range, whose efficiency is higher than that of APT, by scaling down the supply voltage of the linear amplifier according to the PA output power level. A selective supply voltage of a switching amplifier and a reverse current sensing circuit are employed to prevent the reverse current through the power inductor of the switching amplifier. The proposed automatic current ratio controller between the linear amplifier and the switching amplifier provides the robust performance against the battery voltage variation of 3.2–4.6 V. A programmable bias current of the class-AB output buffer and a programmable hysteretic comparator are employed to achieve the optimum efficiency and bandwidth depending on the operating signal bandwidth. Optimal control for low signal bandwidth applications such as voice over Long-Term Evolution (LTE) with the selective notch filter provides the maximum efficiency of 88.2% with −135 dBm/Hz output noise. The proposed SM supports the LTE 20-MHz envelope signal with 78% efficiency at 800-mW output. Adapting the designed SM to frequency-division duplex Band3 radio frequency PA, the implemented ET-PA achieves the power added efficiency of 41.6% at 27-dBm PA output power while achieving −40 dBc of E-UTRA ACLR and −137 dBm/Hz of receiver band noise. The chip is implemented in the 0.13- $\mu \text{m}$ CMOS process, and the die size is 5 mm2. [ABSTRACT FROM AUTHOR]

Class-E RF power amplifiers (PAs) are very power efficient under nominal operating conditions. Due to incorporating two tuned tanks, the dependence on the load impedance is, however, relatively large, resulting in, e.g., load-dependent output power, power efficiency, peak voltages, and peak (and average) currents which can lead to reliability issues. This paper presents load–pull analyses for class-E RF PAs from a mathematical perspective, with analyses and discussions of the effects of the most common nonidealities of class-E PAs: the limited loaded quality factor ($Q_{\mathrm {loaded}}$) of the series filter, switch ON-resistance, the limited quality factor of the dc-feed inductor, load mismatch-dependent switch conduction loss, and the limited negative voltage excursions (due to, e.g., the reverse conduction of the switch transistor for negative voltage excursions). The theoretical findings are backed up by extensive circuit simulations and load–pull measurements of a class-E PA implemented in 65-nm CMOS technology. The PA provides 18.1-dBm output power and 72% efficiency at 1.4 GHz under nominal operating condition employing an off-chip matching network. [ABSTRACT FROM AUTHOR]

In this paper, a switchless dual-band, dual-mode power amplifier (PA) has been developed for multioctave operation. For the switchless dual-band operation, we proposed a new coupled-line-based diplexer structure. The proposed diplexer operates as a balun at high-band frequencies and the coupled line at low-band frequencies. To better understand the proposed diplexer structure, a detailed analysis is performed based on a coupled-line theory. The interstage and output-stage matching networks of the PA are designed by using the proposed diplexer. To maximize the power-added efficiency (PAE) of the designed PA, turn off the unused band PAs and decide the optimum off-state bias condition of transistors. The designed dual-band, dual-mode PA is fabricated with commercial 0.25- $\mu \text{m}$ GaN HEMT process. The fabricated PA shows over 15-dB small-signal gain at 5–11 GHz in the low-band mode and 9–18 GHz in the high-band mode. The measured average output power and PAE are 35 dBm, 23% in the low-band mode and 37 dBm, 26% in the high-band mode. [ABSTRACT FROM AUTHOR]

CMOS RF switches support watt-level RF output power while enabling signal processing with high speed. Typically, RF FET switches offer a tradeoff between a power handling and modulation bandwidth. This paper investigates the cause of compression in a FET switch, and the analysis suggests the optimization of the gate driving impedance for a stacked-FET switch. A design methodology is presented to realize watt-level power handling with high fractional bandwidth (FBW). The measurements demonstrate a BPSK modulator that can handle up to 10 W with wide FBW. The high-power, low-insertion loss, and high-modulation bandwidth demonstrate record performance. [ABSTRACT FROM AUTHOR]

An intrinsically switchable and frequency reconfigurable bulk acoustic wave filter bank based on ferroelectric barium strontium titanate (BST) is presented. Ferroelectric BST possesses electric-field-induced piezoelectricity, enabling the design of voltage-controlled acoustic devices, including thin-film bulk acoustic resonators and solidly mounted resonators. In this paper, a triple-band switchable filter bank, consisting of three 2.5-stage filters based on BST FBARs, is designed, simulated, and fabricated for the first time. The bandpass filters have center frequencies at 1.85, 1.96, and 2.04 GHz and are selectively turned on based upon the external dc bias voltage applied to each filter. Turning off all the filters provide an isolation of more than 27 dB between the input and output ports. The presented intrinsically switchable ferroelectric filter bank potentially simplifies future radio frequency front ends by integrating both switching and filtering functionalities onto a single device and reduces the overall circuit area. [ABSTRACT FROM AUTHOR]

Impedance translation using passive N-path mixers has been used to achieve local oscillator (LO)-defined series bandstop and shunt bandpass filtering. In this paper, we generalize N-path filtering using a correlator-based approach and propose N-path passive mixers driven by orthogonal sequences. Such sequence-driven N-path filters can potentially reject or select signals based on their properties in the spectral, spatial, and code domains. Specifically, a Walsh-function (WF) sequence (WF-seq)-based N-path shunt filter is implemented, demonstrating the feasibility of shunt bandstop filtering using LO sequences other than nonoverlapping pulses. The WF-seq approach enables reconfigurable concurrent filtering at two different frequencies with shunt operation avoiding penalties due to the switch drive overlap. A 65-nm CMOS implementation achieves 20-dB rejection at one frequency and 14-dB rejection concurrently at two frequencies between 0.3 and 1.4 GHz. The reconfigurable bandstop filter is implemented using analog gyrators and consumes 35–62.5 mW and achieves 2.9-dB noise figure and −2.5–5-dBm IIP3. [ABSTRACT FROM AUTHOR]

A single-output, band selecting interposer is designed to combine three identical all-digital CMOS transmitter (Tx) chips. The open-drain CMOS Txs are flip-chip connected to the primary windings of three frequency selecting transformers realized on a single PCB interposer. The secondary windings of the three transformers are connected in series and they share a single output. Across 0.4 to 4 GHz, a peak power higher than 22.9 dBm is achieved collectively by the three sub-Txs with a drain efficiency (DE) better than 25%. The peak powers/DE of the three sub-Txs are 28.6 dBm/50%, 27.4 dBm/49%, and 24.7 dBm/34%, at 0.85, 2.1, and 3 GHz, respectively. This paper further demonstrates that the band selection can be achieved via reconfiguring the CMOS inverse Class-D switching power amplifiers. As demonstrated via continuous wave and 64-quadratic-amplitude modulation, WLAN, and LTE modulation tests, the reconfigurable Tx package exhibits high power and efficiency across all supported bands. [ABSTRACT FROM AUTHOR]

Nonreciprocal components, such as isolators and circulators, are critical to wireless communication and radar applications. Traditionally, nonreciprocal components have been implemented using ferrite materials, which exhibit nonreciprocity under the influence of an external magnetic field. However, ferrite materials cannot be integrated into IC fabrication processes and, consequently, are bulky and expensive. In the recent past, there has been strong interest in achieving nonreciprocity in a nonmagnetic IC-compatible fashion using spatio-temporal modulation. In this paper, we present a general approach to nonreciprocity based on switched transmission lines. Switched transmission lines enable broadband, lossless, and compact nonreciprocity and a wide range of nonreciprocal functionalities, including nonreciprocal phase shifters, ultra-broadband gyrators and isolators, frequency-conversion isolators, and high-linearity/high-frequency/ultra-broadband circulators. We present a detailed theoretical analysis of the various nonidealities that impact insertion loss and provide design guidelines. The theory is validated by experimental results from discrete-component-based gyrators and isolators and a 25-GHz circulator fabricated in a 45-nm SOI CMOS technology. [ABSTRACT FROM AUTHOR]

In this paper, a new plasma-based high-power microwave single-pole single-throw (SPST) switch is introduced and experimentally investigated. This switch is composed of a two-pole evanescent-mode cavity structure loaded with two gas discharge tubes over its posts. Since part of the energy required for the tubes ignition is supplied by the incoming electromagnetic waves, the switching mechanism is quasi absorptive. A prototype SPST switch at the frequency range of 2.8–3.9 GHz is fabricated and successfully examined over the power range of 2–20 W. With less than 1 dB of insertion loss, the ON/OFF isolation varies from 13 to 22 dB, depending on the input power. The measured switching time was on the order of tens of nanoseconds, and the input third-order intercept point that characterizes linearity was +53 dBm. Upon ignition, the microwave-sustained plasma in the switch operates in the $\alpha $ -discharge regime, ensuring that the switch performance is quite stable, with no degradation after long periods of operation. [ABSTRACT FROM AUTHOR]

In the last 10 or 15 years, exciting new developments have occurred in the field of filters and multiplexers. The two words that best explain this phenomenon are “topology” and “technology.” Thus, this paper will cover new connections, new materials, and new processes. This paper summarizes what is new, describes the new devices, and avoids simply surveying the entire field. It is not possible to cover everything, and regrettably, some new and possibly exciting areas are omitted (such as filters fabricated using liquid crystal polymers, active element inclusion, extreme power devices used in accelerators), and others,\ldots, because something has to be left for the next paper! The paper does cover bandstop filters, intrinsically switched film bulk acoustic resonator, and barium–strontium–titanate filters, brand new derivations of lossy filter synthesis and dual-band filter synthesis, multimode networks, new work on optimal multiplexer (multiport network) configurations, and substrate integrated waveguide filters. In each of these areas significant new work has been recently performed and is presented in a summary format suitable for those thinking that the area of filters and multiplexers has become mature (stagnant) with nothing interesting to learn. Nothing could be further from the truth! [ABSTRACT FROM PUBLISHER]

Series stacking of multiple devices is a promising technique that can help overcome some of the fundamental limitations of CMOS technology in order to improve the output power and efficiency of CMOS power amplifiers (PAs), particularly at millimeter-wave (mmWave) frequencies. This paper investigates the concept of device stacking in the context of the Class-E family of nonlinear switching PAs at mmWave frequencies. Fundamental limits on achievable performance of a stacked configuration are presented along with design guidelines for a practical implementation. In order to demonstrate the utility of stacking, three prototypes have been implemented: two fully integrated 45-GHz single-ended Class-E-like PAs with two- and four-stacked devices in IBM's 45-nm silicon-on-insulator (SOI) CMOS technology, and a 45-GHz differential Class-E-like PA with two devices stacked in IBM's 65-nm low-power CMOS process. Measurement results yield a peak power-added efficiency (PAE) of 34.6% for the two-stacked 45-nm SOI CMOS PA with a saturated output power of 17.6 dBm. The measurement results also indicate true Class-E-like switching PA behavior. A peak PAE of 19.4% is measured for the four-stacked PA with a saturated output power of 20.3 dBm. The two-stacked PA exhibits the highest PAE reported for CMOS mmWave PAs, and the four-stacked PA achieves the highest output power from a fully integrated CMOS mmWave PA including those that employ power combining. The 65-nm CMOS differential two-stacked PA exhibits a peak PAE of 28.3% with a saturated differential output power of 18.2 dBm, despite the poor ON-resistance of the 65-nm low-power nMOS devices. This paper also describes the modeling of active devices for mmWave CMOS PAs for good model-hardware correlation. [ABSTRACT FROM PUBLISHER]

This paper presents high-isolation single-pole-single-throw (SPST) and single-pole-double-throw (SPDT) substrate integrated waveguide (SIW) mechanical switches in $V$ - and $W$ -bands. Four via holes with the proposed ring-and-cross etching patterns on the top side are placed in the middle of SIW path to block or pass the waves. As the ring-and-cross etching patterns being short-circuited, the via holes block the waves just like stockades do, in other words, turning the switch to OFF mode. And the ring-and-cross etching pattern makes the via holes invisible, turning the switch to ON mode. The $V$ - and $W$ -band SIW SPST and SPDT switches are designed and fabricated. The switches show the measured performances of better than 45-dB isolation for SPST and better than 50-dB isolation for SPDT, for $V$ -band operation, and a better than 50-dB isolation for both SPST and SPDT for $W$ -band operation. [ABSTRACT FROM AUTHOR]

This paper presents a single spark-gap switch (SGS)-based high-power bipolar pulse generator (BPG) for many applications, such as high-power electromagnetic (HPEM) effect tests. Here, we propose an inverted U-shaped parallel transmission line structure to implement the single-SGS-based BPG. Unlike the previously reported BPGs based on synchronized operation of two SGSs, the proposed BPG does not require simultaneous or synchronized closure of the two switches. Detailed dimension parameters obtained by electromagnetic simulation. The proposed BPG was manufactured and tested for validation. The experimental results demonstrated that the BPG produced a bipolar pulse with a peak-to-peak amplitude of 44.9 kV and a pulsewidth of 2.27 ns, where the SGS was filled with nitrogen gas of 16 atm and the turn-ON voltage was 56 kV. For applications of HPEM effect tests, we discuss methodologies to control the amplitude and pulsewidth of generated bipolar pulses in the proposed BPG. [ABSTRACT FROM PUBLISHER]

In this paper, we analyze the backscatter response of inductive link-based wireless power transfer systems. This analysis leads to a model that predicts the power levels received back on the primary side of the inductive link. The proposed model considers the inductive link characteristics as the magnetic coupling factor, the quality factors of the inductors, and the impedance matching at the secondary side, but also accounts for the equivalent on-resistance of the switch used to apply the response on the secondary side. The modeling of the backscattering response can be helpful to choose design variables of the system such as the duty cycle of the response and the size of the switching transistors. Moreover, the estimation of the reflected power can be used to specify the receiver sensitivity on the primary side. The model is validated with experimental results on two different inductive links: one using only FR4-printed inductors with a PIN diode acting as backscatter switch and the other using a CMOS fully integrated wireless power receiver. The measured backscattered power in both cases agrees with the predicted values. [ABSTRACT FROM PUBLISHER]

This paper presents a new kind of highly flexible frequency-agile bandpass filters (FA-BPFs) based on the novel synchronously tuned dual-mode resonator (STDR). The bandwidth (BW), BW variation tendency, passband selectivity (stopband rejection level), and frequency tuning range of the filter can be predefined individually. Benefiting from the unique characteristics of the STDR, the FA-BPF with very simple and highly flexible design/control procedures is achieved. Due to the proposed geometry, two self-adaptive transmission zeros are introduced and move with the passband. The predefined mechanism is investigated in detail, and the simple design and predefined procedures are summarized. Then, three 0.75–1.7 GHz single-band examples with elliptic response are developed to achieve three predefined absolute BWs (ABW). The design techniques and filter superiority are confirmed by the experiments. Moreover, aiming at China 2G/3G/4G cellular wireless/mobile communication system (up to band 40:0.825–2.65 GHz), a novel intrinsically switchable single-/dual-band FA-BPF is presented based on the proposed STDR. An example with a constant ABW1 dB and a fractional bandwidth1 dB (FBW1 dB is designed to validate the theory and analysis. The FA-BPF is able to operate as a highly selective dual-band FA-BPF with 0.76–1.78 GHz/1.61–2.63 GHz tuning ranges, and also can be switched to single-band operation with the continuous tuning range of 0.76–2.63 GHz. [ABSTRACT FROM PUBLISHER]

This paper presents a compact T-type switch that involves three different operational states providing high flexibility in signal routing. Two of the states are between adjacent ports, while the other is a crossover state. T-type switches are mainly used as building blocks of redundancy matrices for satellite communications systems, although mobile applications also take advantage of switching devices. The proposed structure uses p-i-n diodes located in specific points to control each state with a specific bias dc voltage, creating open and short circuits. The symmetry of the structure allows even–odd mode analysis in order to obtain the design equations. To validate the concept, a compact microstrip T-type switch is fabricated and measured. The resulting device shows a good performance in terms of transmission and isolation for each state, in agreement with the simulations. The switch exhibits a band-pass response for the crossover state, while low-pass and high-pass responses result for the other two states. [ABSTRACT FROM PUBLISHER]

This paper presents the design consideration on a converged Rx surface acoustic wave (SAW) duplexer module for integrated RF front end. Two different matching-circuit and notch-circuit configurations were examined with importance placed on electrical characteristics (insertion loss and isolation of duplexer) and simplification of module, respectively. From circuit simulations and examinations, we verified that a simplified design was best in terms of both characteristics and space in the case of a finite inductor's Q. We also fabricate a quad-band converged Rx module (Band I + II, V + VIII) using an SAW duplexer and verified that its electrical characteristics agree well with our simulation results. [ABSTRACT FROM AUTHOR]

This paper presents a dual-band low-noise amplifier (LNA) that can be reversibly configured between 3 and 5 GHz using a phase-change (PC) RF switch. Simultaneous noise and conjugate input matching is achieved at the two frequencies using a single PC RF switch and coupled source inductors, thereby minimizing integration complexity and enabling a compact design roughly equal in size to a single-band design. The PC switch has extremely low on-state resistance (1.5-4Ω) and parasitic capacitance (12-16 fF), and has a compact footprint (~50 μm2). A chip containing the PC switch is fabricated in-house while the rest of the LNA is fabricated in a 0.13-μm CMOS technology. The two chips are combined using an in-house flip-chip integration process. Characterization from five prototypes fabricated in two batches is presented. The integrated LNAs achieved peak gain greater than 20 dB and minimum noise figure less than 2.9 dB in both the frequency bands while consuming a peak power of 7.2 mW from a 1.2-V supply. Comparison of the CMOS-PC prototypes with carefully designed control LNAs demonstrates the effectiveness of the PC switch for RF reconfiguration, which allows the reconfigurable LNA to achieve performance comparable to its nonreconfigurable counterparts. [ABSTRACT FROM AUTHOR]

This paper demonstrates a wideband CMOS all-digital polar transmitter with flip-chip connection to three high-density-interconnection PCB interposers. The interposers are designed to extract power from a CMOS open-drain inverse Class-D power amplifier core. For a wide frequency range from 0.7 to 3.5 GHz, continuous-wave output power higher than 25.5 dBm and drain efficiency (DE) above 40% are demonstrated. The low-band package achieves a peak power of 29.2 dBm at 1.1 GHz with DE of 60%, the mid-band package outputs 28.8 dBm at 1.5 GHz with DE of 56%, and the high-band package generates 26 dBm at 3 GHz with DE of 49%. The amplitude modulation (AM) is achieved by digitally modulating the switch conductance of the inverse Class-D core, and the on-chip phase modulation is achieved by digitally weighing the in-phase and quadrature bias currents in the IQ mixer. Detailed modulation tests, involving 64 quadrature amplitude modulation (QAM) and 20-MHz WLAN and LTE signals, exhibit excellent power and efficiency at 0.6, 1.2, 1.8, 2.4, 3, and 3.6 GHz. The associated specifications on spectral masks and error vector magnitudes are satisfied. [ABSTRACT FROM AUTHOR]

In this paper, the capacitively coupled LC resonators with loaded p-i-n diodes are used to develop fixed-response filter-integrated single-pole double-throw (SPDT) switch. The filter-integrated on-state channel with reverse-biased p-i-n diodes can be designed and synthesized using the coupled-resonator filter theory, and the off-state channel with forward-biased p-i-n diodes exhibits high suppression. A 1-GHz filter-integrated SPDT switch with ripple bandwidth of 195 MHz is designed to demonstrate the proposed design concept. Measured results show that it has a low on-state insertion loss (IL) of 1.03 dB, a wide passband, high off-state suppression (OSS), high port-to-port isolation, and compact circuit size. Since both the properly misaligned resonant frequencies of LC resonators and weakly coupling between LC resonators also result in high suppression, a frequency-agile filter-integrated switchless SPDT switch without p-i-n diodes can be designed by using the varactor diodes to realize the corresponding capacitors. A frequency-agile filter-integrated switchless SPDT switch with constant 1-dB fractional bandwidth of 19.5% is also designed. Measured results show that its operating frequency can be tuned from 0.612 to 1.088 GHz with corresponding frequency tuning range of 58% and IL varying from 2.8 to 2.3 dB. Good return loss, high OSS, and port-to-port isolation can be also observed. [ABSTRACT FROM AUTHOR]

This paper presents a dual-band low-noise amplifier (LNA) that can be reversibly configured between 3 and 5 GHz using a phase-change (PC) RF switch. Simultaneous noise and conjugate input matching is achieved at the two frequencies using a single PC RF switch and coupled source inductors, thereby minimizing integration complexity and enabling a compact design roughly equal in size to a single-band design. The PC switch has extremely low on-state resistance (1.5– 4\Omega ) and parasitic capacitance (12–16 fF), and has a compact footprint ( \sim 50~\mu \text{m}^{2} ). A chip containing the PC switch is fabricated in-house while the rest of the LNA is fabricated in a 0.13- \mu \text{m}$ CMOS technology. The two chips are combined using an in-house flip-chip integration process. Characterization from five prototypes fabricated in two batches is presented. The integrated LNAs achieved peak gain greater than 20 dB and minimum noise figure less than 2.9 dB in both the frequency bands while consuming a peak power of 7.2 mW from a 1.2-V supply. Comparison of the CMOS-PC prototypes with carefully designed control LNAs demonstrates the effectiveness of the PC switch for RF reconfiguration, which allows the reconfigurable LNA to achieve performance comparable to its nonreconfigurable counterparts. [ABSTRACT FROM PUBLISHER]

This paper presents the design consideration on a converged Rx surface acoustic wave (SAW) duplexer module for integrated RF front end. Two different matching-circuit and notch-circuit configurations were examined with importance placed on electrical characteristics (insertion loss and isolation of duplexer) and simplification of module, respectively. From circuit simulations and examinations, we verified that a simplified design was best in terms of both characteristics and space in the case of a finite inductor’s Q. We also fabricate a quad-band converged Rx module (Band I + II, V + VIII) using an SAW duplexer and verified that its electrical characteristics agree well with our simulation results. [ABSTRACT FROM PUBLISHER]

In this paper, the capacitively coupled LC resonators with loaded p-i-n diodes are used to develop fixed-response filter-integrated single-pole double-throw (SPDT) switch. The filter-integrated on-state channel with reverse-biased p-i-n diodes can be designed and synthesized using the coupled-resonator filter theory, and the off-state channel with forward-biased p-i-n diodes exhibits high suppression. A 1-GHz filter-integrated SPDT switch with ripple bandwidth of 195 MHz is designed to demonstrate the proposed design concept. Measured results show that it has a low on-state insertion loss (IL) of 1.03 dB, a wide passband, high off-state suppression (OSS), high port-to-port isolation, and compact circuit size. Since both the properly misaligned resonant frequencies of LC resonators and weakly coupling between LC resonators also result in high suppression, a frequency-agile filter-integrated switchless SPDT switch without p-i-n diodes can be designed by using the varactor diodes to realize the corresponding capacitors. A frequency-agile filter-integrated switchless SPDT switch with constant 1-dB fractional bandwidth of 19.5% is also designed. Measured results show that its operating frequency can be tuned from 0.612 to 1.088 GHz with corresponding frequency tuning range of 58% and IL varying from 2.8 to 2.3 dB. Good return loss, high OSS, and port-to-port isolation can be also observed. [ABSTRACT FROM PUBLISHER]

This paper demonstrates a wideband CMOS all-digital polar transmitter with flip-chip connection to three high-density-interconnection PCB interposers. The interposers are designed to extract power from a CMOS open-drain inverse Class-D power amplifier core. For a wide frequency range from 0.7 to 3.5 GHz, continuous-wave output power higher than 25.5 dBm and drain efficiency (DE) above 40% are demonstrated. The low-band package achieves a peak power of 29.2 dBm at 1.1 GHz with DE of 60%, the mid-band package outputs 28.8 dBm at 1.5 GHz with DE of 56%, and the high-band package generates 26 dBm at 3 GHz with DE of 49%. The amplitude modulation (AM) is achieved by digitally modulating the switch conductance of the inverse Class-D core, and the on-chip phase modulation is achieved by digitally weighing the in-phase and quadrature bias currents in the IQ mixer. Detailed modulation tests, involving 64 quadrature amplitude modulation (QAM) and 20-MHz WLAN and LTE signals, exhibit excellent power and efficiency at 0.6, 1.2, 1.8, 2.4, 3, and 3.6 GHz. The associated specifications on spectral masks and error vector magnitudes are satisfied. [ABSTRACT FROM PUBLISHER]

This paper presents the design and measurement results of a single-chip front-end monolithic microwave integrated circuit (MMIC), incorporating a high-power amplifier, transmit–receive switch, low-noise amplifier, and calibration coupler, realized in 0.25 \mu \textm AlGaN/GaN-on-SiC MMIC technology of UMS (GH25-10). The MMIC is operating in C-band (5.2–5.6 GHz) and is targeting the next generation spaceborne synthetic aperture radar. The use of GaN technology has resulted in a design that is robust against antenna load variation in transmit as well as against high received power levels, without the need for an additional limiter. By including a transmit-receive switch on the MMIC there is no need for an external circulator, resulting in a significant size and weight reduction of the transmit–receive module. The measured output power in transmit is higher than 40 W with 36% PAE. The receive gain is higher than 31 dB with better than 2.4 dB noise figure. To the best of the author’s knowledge this is the first time such performance has been demonstrated for a single-chip implementation of a C-band transmit–receive front-end. [ABSTRACT FROM PUBLISHER]

In this paper, the stress memorization technique (SMT) effects upon ultra-wideband RF switch performance are investigated for the first time. Low insertion loss (IL), high isolation, ultra-wideband (dc to 50 GHz) single-pole double-throw (SPDT), and single-pole four-throw (SP4T) switches designed with commercial 0.13- \mu \textm high-resistivity (HR) trap-rich SOI technology with/without SMT are presented and investigated. 2.5 V nMOS transistor ( Lg = 0.2~\mu \text{m} ) with low R\mathrm{\scriptscriptstyle ON} {^\ast} C\mathrm{\scriptscriptstyle OFF} from GF 130RFSOI PDK is used. It is found that channel mobility of switch transistor is improved by SMT and thus switch performance can be further improved. Moreover, the impact of transistor channel length, which has dominant effects on both IL and isolation of the switches, under different gate bias on switch performance are also studied and verified experimentally. Low measured IL of less than 2.1 dB and good isolation of better than 27 dB from dc to 50 GHz are obtained for the SPDT switch. For SP4T switch, the measured IL of less than 2.6 dB and isolation of better than 27 dB are achieved from dc to 35 GHz. The active chip areas of designed SPDT and SP4T switches are compact with size of only 0.214 \times 0.19~\text mm^2 and 0.36 \times 0.19~ \text mm^2 , respectively. [ABSTRACT FROM AUTHOR]

In this paper, a GaAs absorptive single-pole double-throw (SPDT) RF switch and its application to a 2.4-GHz switched beamformer module are presented. The proposed absorptive SPDT RF switch features low-power consumption and low insertion loss with good output matching both in the on and off states. Specifically, the measured insertion loss in the on state is less than 1 dB, and the measured input and output return losses are both better than 11.2 dB from 1.9 to 2.6 GHz. The measured output return loss in the off state is better than 15 dB, and the measured isolation is better than 24.7 dB in the same frequency range. Two proposed absorptive SPDT switches are then employed to form an absorptive single-pole four-throw RF switch, and it is integrated with a miniaturized $4 \times 4$ Butler matrix using the integrated passive device (IPD) technology to achieve a compact 2.4-GHz switched beamformer module with a very low profile. Specifically, the module size is 4.9 mm $\times5$ mm with a thickness of only 0.4 mm. The IPD beamformer module is then used to realize a low-profile 2-D scanning antenna array, and 16 different beams in azimuth and elevation dimensions are successfully generated. [ABSTRACT FROM PUBLISHER]

Multimode transceivers for the next generation of wireless devices require new and innovative frequency-agile microwave circuit designs to reduce their complexity, size, and cost. Intrinsically switchable frequency reconfigurable thin-film bulk acoustic resonators (FBARs) and filters that utilize these resonators are presented here for the very first time. Barium strontium titanate (BST) is a ferroelectric material that exhibits electric-field-induced piezoelectricity, which allows for the design of voltage controlled bulk acoustic wave devices. In this paper, a frequency reconfigurable resonator consisting of two series connected BST-based FBARs and a reconfigurable dual-band filter consisting of two 1.5 stage ladder-type bandpass filters are discussed. Their small size, simple design, and zero static power consumption make multifunctional ferroelectric thin-film devices attractive for use in adaptive and reconfigurable radios. [ABSTRACT FROM AUTHOR]

This paper presents a shunt protection technique to improve the hot-switching reliability of metal-contact radio-frequency microelectromechanical systems (RF-MEMS) switches. The proposed technique places shunt protection contacts in front of the main contact of an RF-MEMS metal contact switch to block RF signal while the main contact is switching ON or OFF. The shunt protection contact creates a local cold-switching condition for the main contact to increase the lifetime of the switch under hot-switching condition. The shunt protection technique can also increase the overall isolation of the switch. To demonstrate the technique, RF-MEMS switches with and without shunt protection were fabricated using all metal process. Compared with the unprotected switch, the protected switch has longer lifetime under hot-switching condition. The protected switch has >100-million cycles and up to 500-million cycles lifetime under the 1-W hot-switching condition, measured in open-air laboratory environment. Besides, the isolation of the shunt-protected switch is 70 dB at 1.0 GHz and 36 dB at 40 GHz, and the insertion loss is 0.30 dB at 1.0 GHz and 0.43 dB at 40 GHz. [ABSTRACT FROM AUTHOR]