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In modern power systems, the increasing penetration of renewables and power electronics, particularly inverter-based wind and solar power generation, is altering power system dynamics and bringing new stability concerns. One challenging issue that is attracting considerable attention is the wide range of power oscillations associated with multiple parallel grid-connected inverters. In such systems, the characteristics in terms of resonance and oscillation are significantly different from single-inverter systems. This paper investigates the mutual interaction and stability issues of multiple grid-interfacing inverters with LCL-filters in power-electronics-based power systems under various grid conditions. The investigation reveals that such interactions between power inverters and the grid may excite multiple resonances at various frequencies under certain grid conditions. The nodal admittance matrix concept, which was originally from power systems engineering, is adopted here. Moreover, this paper further develops an Interaction-Admittance model that can effectively describe these mutual interactions in terms of a physical network admittance. We apply our model to various scenarios such as stiff grid conditions and inductive grids with/without power factor correction capacitors. The results with the proposed framework demonstrate an intuitive interpretation of multi-inverter system resonance and instabilities. Finally, simulations and experiments on a lab-scale system are provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation technique is used for boosting the dc bus utilization, which is established by providing detailed mathematical analysis. The five-level inverter used here is realized by cascading a CHB unit to each phase of a three-level neutral point clamped inverter. The increase in dc bus voltage utilization owes to the pole voltage redundancies offered by CHB units. The floating capacitors of H-bridge units are balanced within a quarter fundamental cycle using the switching state redundancies of pole voltage levels. The aforementioned modulation technique allows the inverter to enhance the dc bus utilization from 0.577 $\text{V}_{\text{dc}}$ to 0.63 $\text{V}_{\text{dc}}$ under unity power factor. This enhancement is obtained in the linear modulation range without increasing the dc bus voltage, and thus, the inverter can operate without the presence of low-order harmonics in its phase voltages. The strength of this paper lies in its detailed mathematical analysis for finding out the limiting modulation index and power factor condition in the light of floating capacitor voltage balancing issue. Simulation as well as experimental verification of the modulation scheme is carried out on an induction motor drive under various operating conditions. It is shown that this carrier-based modulation technique is suitable for any single source inverter topology with one CHB unit per phase. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked $n$ -level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper introduces a new bidirectional single-phase inverter topology. The proposed topology has three ports: a dc port, an ac port, and a ripple port. The ac and dc ports are bidirectional to support rectifier or inverter operation. A small inductor, which is of alternating current, exchanges power between different ports of the single-phase system. The proposed topology is capable of accomplishing voltage step-up or step-down, suppressing the ripple power, and performing inversion or rectification operation in one stage of power conversion. The proposed configuration offers an active decoupling function, which not only eliminates the double-frequency ripple power at the dc port but also achieves minimum capacitance requirements to minimize the size of the decoupling capacitor. This facilitates the use of a very small thin-film capacitor, which offers a much longer life-cycle and higher reliability compared with a bulky electrolytic capacitor. A control approach is also developed to regulate the dc-port and ac-port currents and manage the ripple power through proper distribution of power between each port. Moreover, a very small capacitor can be placed in parallel with the inductor to reinforce the proposed configuration with soft-switching operation, which enhances the overall efficiency and minimizes the voltage stress over the semiconductor devices. This converter is capable of accommodating an arbitrary number of dc or single-phase ac sources and/or loads configuring a multiple-input multiple-output inverter without introducing any additional passive elements or sacrificing the performance of the inverter. The primary focus of this paper is dc-to-ac conversion mode of operation, in spite of the fact that it can easily be configured to serve as a rectifier. Experimental and simulation results are presented to validate the operation of the proposed topology and its control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper presents the analysis and experiments of a variable inductor (VI) based LED driver for dc grid lighting applications. The proposed driver requires only a series inductor and a transformer as major components to drive the LED lamp from a half-bridge inverter. By introducing a VI as the series inductor, the LED current can be controlled independently from any other parameter, which makes it possible to drive and regulate several LED branches from the same half-bridge output. Other advantages of the proposed converter include inherent open-circuit and short-circuit protections, zero-voltage switching for the bridge transistor and zero-current switching for the output rectifier diodes, simple dynamics, possibility of analog and pulse width modulation dimming, constant switching frequency operation, and high efficiency. The converter is thoroughly analyzed and modeled for both steady-state and dynamic operation. As another novelty of this paper, the dynamic response of the VI has been studied and taken into account to obtain the complete transfer function of the VI-controlled system. In addition, some housekeeping issues that usually arise when dealing with VI, e.g., how to drive the VI bias winding, are solved in this work. Experimental results provided from a 50 W laboratory prototype demonstrate the correctness of the performed analysis and the good possibilities of the proposed converter. [ABSTRACT FROM PUBLISHER]

The objective of this paper is to propose a novel photovoltaic (PV) micro-inverter with PV current decoupling (PVCD) strategy to achieve maximum power point tracking (MPPT) performance without using large electrolytic capacitors. Conventionally, the grid-connected PV micro-inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency voltage ripple, which is caused by the injected ac grid power, to achieve the desired MPPT performance. However, the short lifetime electrolytic capacitor will reduce the PV micro-inverter's reliability dramatically. Therefore, different active power decoupling circuits (APDCs) have been proposed in published papers to reduce the required input capacitance so that the long lifetime film capacitor can be used to replace the electrolytic capacitor. Unlike the conventional APDC with charging and discharging modes operation, a novel PVCD strategy, which is based on the concept of current decoupling instead of power decoupling, is proposed to simplify the control mechanism of the PV micro-inverter. Furthermore, to accomplish the proposed current decoupling concept, a novel circuit topology for the PV micro-inverter is also proposed. With the proposed PVCD strategy, the current decoupling tank (CDT) inside the proposed PV micro-inverter can buffer the current difference between the constant current from the PV panel and the rectified sinusoidal current of the ac grid current. Therefore, the input capacitance on the PV-side can be reduced dramatically and the long lifetime film capacitor can be used to replace the electrolytic capacitor. The reliability of the PV micro-inverter with good MPPT performance can be increased. In this paper, the operation principle and the component design of the proposed PV micro-inverter with PVCD strategy will be presented. Simulation results and experimental results of a prototype 240 W PV micro-inverter is shown to verify the performance of the PV micro-inverter with PVCD strategy. [ABSTRACT FROM AUTHOR]

In this paper, a multisource switched capacitor based boost multilevel inverter is proposed. The proposed topology features less number of components, high gain, self-charging capability of capacitors, reduced size of filter components. The modes of operation of the proposed converter and design guidelines of converter components are discussed. A comprehensive comparative study of the proposed converter topology with the topologies in the literature is given. Analytical expression for capacitor energy utilization (CEU) factor for the proposed topology is derived and the feasibility of the proposed converter with respect to CEU for the designed power rating is verified. The analytical performance of the proposed converter topology is verified through simulation studies. The common mode voltage and leakage current in the proposed topology are analyzed. Experimental prototype of the proposed converter topology with two sources and two capacitors for power rating of 500 W is developed and tested with resistive, inductive, and nonlinear loads. The experimental and simulated results are in close agreement with the analytical steady-state performance of the proposed converter. [ABSTRACT FROM AUTHOR]

This paper presents a reduced component count five-level inverter topology based on the stacked cell approach to multilevel inverters. The proposed topology utilizes the fundamental properties of three-phase voltages to reduce the number of switches and flying capacitors to cut size, weight and costs while facilitating higher reliability, simpler wiring and lesser electromagnetic interference. The operational aspects of the topology such as circuit structure, modulation and capacitor balancing are explained, followed by an account of device stresses and reliability. A discussion of certain additional features such as fault tolerant operation, loss steering and common-mode elimination addresses the usefulness of the topology in practical situations. A comparison of the proposed topology with existing methods in terms of several parameters is then used to highlight its merits and features. Finally, experimental results obtained using an induction motor drive incorporating the topology are given, so as to validate the feasibility of the proposed approach. [ABSTRACT FROM AUTHOR]

LCL resonance complicates the design of a current control loop and can even threaten its stability. Extensive approaches have been proposed to deal with this resonance, among which active damping (AD) schemes based on the feedback of a single filter variable have been shown to be effective and cost-efficient. This paper presents a study of such AD techniques, where a generalized approach to developing an AD controller by relating a control diagram to an equivalent circuit is proposed. Based on this approach, AD controller forms with any one of four commonly used filter variables to realize virtual resistors (VRs) in six different connections to the LCL filter are derived. Comparisons are then made between these 24 AD controller alternatives by considering the implementation complexity of the AD controller, the number of measuring sensors, and the effect of the AD controller on the power stage. Consequently, grid-side current feedback AD to realize a VR in parallel with the filter capacitor is selected as a considered alternative. Next, two issues associated with the practical implementation of the selected grid-side current feedback AD, caused by the second-order differential expression and the digital time delay, are discussed and solved. Finally, the selected AD method is analyzed in the discrete z-domain, and its effectiveness is experimentally verified. [ABSTRACT FROM AUTHOR]

In this paper, a neutral point (NP) voltage balancing scheme suitable for three phase 5-level active NP clamped and T-type NP clamped (TNPC) inverters is discussed. Carrier-based pulsewidth modulation is used for the balancing of dc-link capacitors and floating capacitors (FC) in the inverter. The FC voltages are regulated with the help of redundant switching states of pole voltage levels and the dc-link capacitor voltages are controlled using zero-sequence voltage injection. Though the balancing approaches are different for dc-link capacitors and FCs, they are not decoupled from each other. This is due to the effect of certain redundant switching states used for FC balancing causing NP voltage variation. To address this issue, the redundant state time ratio is estimated online every sample and based on this dynamic time ratio, an optimal relationship between neutral current and zero-sequence voltage is established. It is found that the use of dynamic time ratio helps in achieving better transient performance than that of generally adopted fixed time ratio. Simulation and experimental results prove that the proposed balancing scheme works well under all operating conditions and exhibits fast and stable transient performance. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage-source parallel resonant Class E inverter. The proposed circuit has a shunt capacitor including parasitic capacitance of a switching device and achieves zero-voltage switching and zero-voltage derivative switching at turning-on like a classical Class E inverter. Therefore, high power conversion efficiency is achieved under high operating frequency. Unlike the other Class E inverters, the proposed circuit has no choke inductor or dc blocking capacitor. Moreover, it has a parallel resonant tank unlike the classical Class E inverter. Thus, a circuit protection is not required in a wireless power transfer system. Circuit analysis, circuit simulations, and circuit experiments were carried out. The experimental circuit performed the desired operation and the power conversion efficiency was 93.2% with the output power 4.76 W at the operating frequency 1 MHz. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

Increasing demands for power supplies have contributed to the population of high-frequency ac (HFAC) power distribution system (PDS), and in order to increase the power capacity, multilevel inverters (MLIs) frequently serving as the high-frequency (HF) source-stage have obtained a prominent development. Existing MLIs commonly use more than one voltage source or a great number of power devices to enlarge the level numbers, and HF modulation (HFM) methods are usually adopted to decrease the total harmonic distortion (THD). All of these have increased the complexity and decreased the efficiency for the conversion from dc to HF ac. In this paper, a nine-level inverter employing only one input source and fewer components is proposed for HFAC PDS. It makes full use of the conversion of series and parallel connections of one voltage source and two capacitors to realize nine output levels, thus lower THD can be obtained without HFM methods. The voltage stress on power devices is relatively relieved, which has broadened its range of applications as well. Moreover, the proposed nine-level inverter is equipped with the inherent self-voltage balancing ability, thus the modulation algorithm gets simplified. The circuit structure, modulation method, capacitor calculation, loss analysis, and performance comparisons are presented in this paper, and all the superior performances of the proposed nine-level inverter are verified by simulation and experimental prototypes with rated output power of 200 W. The accordance of theoretical analysis, simulation, and experimental results confirms the feasibility of proposed nine-level inverter. [ABSTRACT FROM AUTHOR]

This paper makes an intensive comparison in operating performance between a modular multilevel double-star chopper-cells (DSCC) inverter and a modular multilevel triple-star bridge-cells (TSBC) converter. Both inverter and converter are intended to drive medium-voltage motors in industrial applications. First, it makes numerical comparisons, thus, resulting in revealing that the torque and frequency of a driven motor produce a significant effect on capacitor-voltage fluctuation and arm or cluster current in the individual DSCC inverter and TSBC converter. Next, a three-phase DSCC inverter and a three-phase TSBC converter with the same rating as 400 V and 15 kW are designed and compared to drive the following two general purposes and specially-designed induction motors; one is rated at the 380-V, 15-kW, 50-Hz four-pole motor, and the other is at the 320-V, 15-kW, 38-Hz six-pole motor. This experimental comparison based on the two downscaled drive systems confirms the validity of the numerical comparison. Finally, this paper concludes that the DSCC inverter is more suitable for driving medium-voltage high-speed motors loaded with quadratic-torque-to-speed profiles like fans, blowers, pumps, and centrifugal compressors. On the other hand, the TSBC converter is more suitable for driving medium-voltage low-speed high-torque motors like mills, kilns, conveyors, and extruders. [ABSTRACT FROM AUTHOR]

Impedance-source networks are an increasingly popular solution in power converter applications, especially in single-stage buck–boost power conversion to avoid additional front-end dc–dc power converters. In the survey papers published, no analytical comparisons of different topologies have been described, which makes it difficult to choose the best option. Thus, the aim of this paper is to present a comprehensive analytical comparison of the impedance-source-based buck–boost inverters in terms of passive component count and semiconductor stress. Based on the waveform of the input current, i.e., with or without a transformer, and with or without inductor coupling, the impedance-source converters are classified. The main criterion in our comprehensive comparison is the energy stored in the passive elements, which is considered both under constant and predefined high frequency current ripple in the inductors and the voltage ripple across the capacitors. Two-level and multilevel solutions are described. The conclusions provide a “one-stop” information source and a selection guide of impedance-source-based buck–boost inverters for different applications. [ABSTRACT FROM PUBLISHER]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

Aimed at the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy with shunt dead time based on a double ARCP (DARCP) inverter. In comparison with the original modulation strategy, this modulation strategy cannot only achieve soft switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in double ACCs (DACCs) and make the maximum current through DACCs approximately equal to load current in commutation processes. So, the circulating current loss in DACCs and the current stress of auxiliary switches can be effectively reduced. According to the equivalent circuits in different operation modes under the novel modulation strategy, this paper analyzes the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the DARCP inverter. Finally, a 10-kW–16-kHz DARCP inverter prototype with insulated gate bipolar transistor-based switches is built. Experimental results are given to demonstrate the validity and features of the DARCP inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

In this paper, the application of an innovative transformer-less unified power flow controller (UPFC) for interconnecting two synchronous ac grids with large phase difference is presented. The proposed transformer-less UPFC is based on two cascaded multilevel inverters. As is well known, the real power flow between two generators is mainly determined by their phase difference. If two grids with large phase difference are initially separate from each other, once connected, there will be huge current flowing through the transmission line and will, thus, damage the generators or other supplementary equipments. Therefore, to connect two synchronous ac grids with each other without using an extra device is impossible. For decades, researchers have been investigating different approaches to this problem but still difficult to conquer, especially for real hardware implementation. An effective solution using the transformer-less UPFC is demonstrated in this paper. The transformer-less UPFC can realize grid interconnection, independent active and reactive power control, dc-link voltage balance control, etc. Furthermore, a 1-pu equipment can compensate system with phase difference as large as 30°. Experimental results based on the 13.8-kV/ 2-MVA transformer-less UPFC prototype are shown to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

In the renewable energy generation systems, the grid-connected inverter with LCL filter (GCI-LCL) is an important device to realize dc–ac power conversion and connect the distributed power generation system and power grid. However, the resonance problems of the LCL filter may bring instability to GCI-LCL. Besides, the grid impedance and the time delay in digital controllers also have a harmful influence on the stability of GCI-LCL. To solve these problems, a dual-current active damping control strategy based on the inverter-side current and grid-connected current feedback for GCI-LCL is proposed in this paper, and the systematic parameters design process is investigated. Compared with the conventional damping strategies, a resonance suppression for the LCL filter, a larger stability margin, and a better anti-interference capability in a weak grid can be achieved under the proposed strategy. In addition, by analyzing the active damping effect of the proposed strategy, a simplified model in a low-frequency band for GCI-LCL is proposed to enhance the anti-interference capability in the weak grid and simplify the parameters design process. Finally, a GCI-LCL prototype is constructed and the experiment results verify the correctness and feasibility of the analysis and proposed strategy. [ABSTRACT FROM AUTHOR]

Currently, how the inductive grid impedance variation affects the stability of digitally controlled grid-tied inverters with a high-order (LCL or LLCL) filter has been numerously studied. Note that a distributed power system may contain the capacitive load, the power factor correction (PFC) capacitor, and the long cable. During the design of grid-tied inverters, we should address the effects of the equivalent grid reactance, including both the inductive and the capacitive impedances, on the stability of system. Nevertheless, up to now, to the best knowledge of authors, the detailed parameter design method of the LCL- or LLCL-filter-based grid-tied inverter has not yet been introduced, when the capacitive grid impedance is addressed. In this paper, by using the passivity-based analysis, the detailed stability study on the LLCL-filter-based grid-tied inverter is carried out, when the grid reactance varies in a wide range. Based on the analysis, an exact and robust parameter design of system is proposed. Simulations and experimental results on a 220 V/2 kW prototype confirm that by using the proposed parameter design method, a high-performance grid-tied inverter system can be achieved under the rigid grid condition. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, a new hybrid modulation fault-tolerant control of an open-end winding linear vernier permanent-magnet (OEW-LVPM) motor is proposed. By using a floating capacitor inverter, the proposed OEW-LVPM motor drive can continue operation under open-circuit fault condition. The OEW-LVPM motor fed by dual-inverter system consists of two inverters, which are connected to both ends of the motor windings, including a dc power named as main inverter (MI) and a floating capacitor called as capacitor inverter (CI). When one switch is broken in the CI, the CI topology will be restructured to a three-phase four-switch inverter. Then, an improved six-step modulation is investigated in the MI to reduce the switching frequency, while the conventional modulation is applied in the CI. Thus, the MI can provide all the active power, and the CI is only used to supply the reactive power. The proposed fault-tolerant control method is simulated and the experiments with the OEW-LVPM motor drive are also accomplished to verify the feasibility. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

A grid-connected inverter with critical loads should be able to supply a stable voltage to critical loads at the instant of a mode change as well as during clearing time while quickly detecting unintentional islanding. The indirect current control has been proposed to provide not only a stable voltage to critical loads during clearing time but also a seamless transfer of inverters at the instant of a mode change. However, the conventional islanding detection methods cannot be applied to the indirect current control based inverter since the magnitude and frequency of voltage do not vary when an islanding occurs. This paper proposes a reactive power P&O anti-islanding method for the indirect current control. The proposed islanding detection method generates a small reactive power perturbation at the output of the inverter and detects the islanding by observing reactive power mismatch during the islanding. Using the proposed method, the inverter can supply high quality power to critical loads without distorting the output current during the clearing time. The proposed anti-islanding method is validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) for modular multilevel converter (MMC) systems has drawn attention among researchers in recent years due to its straightforward implementation, ability to control multiple objectives in a single cost function, and excellent dynamic response. Even though MPC seems promising for the MMC, it suffers from an excessive increase in computational complexity when the number of submodules (SMs) per arm (N) is increased. The computational load can be reduced by decoupling the SM capacitor voltage control from the cost function and balancing them in an external voltage sorting algorithm. In this paper, a further reduction of computations in the MPC is achieved by the preselection of control options that can satisfy the control objectives in the next sampling time. The preselection algorithm generates a greatly reduced number of control options to be computed by a straightforward MPC loop at each sampling time. In addition, the MPC together with the preselection algorithm can generate $2N+ 1$ output voltage levels in the MMC while maintaining a low $dv/ dt$ in the output voltage and suppressing the circulating currents in MMCs with considerable number of SMs. The steady-state and dynamic performance of the MMC operating with the proposed method is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

Single-loop current control is an attractive scheme for the LCL-type grid-connected inverter due to its simplicity and low cost. However, conventional single-loop control schemes, which command either the inverter current or the grid current, are subject to the specific resonance frequency regions. The weighted average current control, which splits the filter capacitor into two parts (in form of an LCCL filter) and commands the current flowing between these two parts, is independent of the resonance frequency, but on the other hand, it is limited by the poor sensitivity to the grid impedance variation and weak stability in the grid current. These limitations are comprehensively explained in this paper and then addressed by identifying that the single-loop weighted average current control is equivalent to the dual-loop grid current control with an inherent capacitor current active damping. By tuning the capacitor split proportion as a second degree of freedom, an optimal damping performance that is robust to the grid impedance variation can be naturally achieved using only the inherent damping. Thus, no extra damping is required, and the single-loop structure with only one current sensing turns to be adequate. Moreover, for convenience of practical implementation, an improved LCCL filter configuration is proposed to allow the use of two equal nominal capacitances for the split capacitors. Finally, experiments are performed to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

To damp the LCL-filter resonance in a grid-connected inverter, the feedback of capacitor current is usually adopted, and it can be replaced by the feedback of capacitor voltage as a low-cost solution, if an accurate digital differentiator can be made. The best way for realizing such a differentiator has so far proved to be an indirect nonideal generalized integrator (GI). As a simple alternative, this paper proposes two digital differentiators, which are directly developed in the discrete domain. They are a first-order differentiator based on backward Euler plus digital lead compensator and a second-order differentiator based on Tustin plus digital notch filter. The basic idea of the proposed methods is to correct their frequency responses to match the ideal differentiator with embedded digital filters. It is shown that the proposed differentiators exhibit the same derivative performance as the nonideal-GI differentiator, and they are more attractive for digital implementations due to their direct discrete natures, compact expressions, and easy algebraic manipulations. In particular, the proposed first-order differentiator is most competitive for its general representation and simplest implementation. Finally, a 12-kW prototype is built, and experiments are performed to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a dual-mode Cuk inverter for photovoltaic/thermoelectric power applications. A dual-mode Cuk inverter operates in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM), and has the advantages of low ripples of voltage and current at the input and output, medium power density, and step-up/step-down ability, but is difficult to control because DCM and CCM have distinct system dynamics. To overcome this control problem, we propose to use a repetitive controller (RC) with a multiple phase-lead compensator for the dual-mode Cuk inverter. If the RC is applied by itself, the distinct system dynamics may severely degrade its system performance. Thus, in the proposed RC, we mainly use a multiple phase-lead compensator to compensate for the different phase lags of the dual-mode Cuk inverter. To reduce the burden from the RC, we use the dual-mode nominal duty ratio as feedforward control input. We also analyze the boundary of operation modes in the dual-mode Cuk inverter, then provide detailed and practical guidelines to design the control parameters. Experimental results obtained on a 500-W digitally controlled module integrated converter prototype confirmed the effectiveness of the control approach. [ABSTRACT FROM AUTHOR]

This paper investigates the open-circuit faults of switching devices in the three-level T-Type inverter and proposes a new tolerant control method. The three-phase current and variation of the neutral-point voltage are detected to determine the fault switch. A carrier-based pulse width modulation is developed to tolerate switch fault by transiting from three-level to two-level switching. This makes the modulation scheme easier to be implemented compared to space vector modulation. For the neutral-point fault, the fault phase is operated by two-level modulation to produce the same rating voltage. On the other hand, the inverter is able to produce balanced voltage with reduced rating by keeping the phase of half-bridge fault to the neutral-point voltage. The neutral-point voltage is also able to be balanced by using two-level modulation since it does not contribute the neutral-point current. The performance and effectiveness of the proposed tolerant control are verified by a laboratory build. [ABSTRACT FROM AUTHOR]