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The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

In this paper, a generalized droop control (GDC) is proposed for a grid-supporting inverter based on a comparison between traditional droop control and virtual synchronous generator (VSG) control. Both the traditional droop control and VSG control have their own advantages, but neither traditional droop control nor VSG control can meet the demand for different dynamic characteristics in grid-connected (GC) and stand-alone (SA) modes at the same time. Rather than using a proportional controller with a low-pass filter, as in a traditional droop control, or fully mimicking the conventional synchronous generator parameters in a VSG control, the active power control loop of the GDC can be designed flexibly to adapt to different requirements. With a well-designed controller, the GDC can achieve satisfactory control performance; unlike a traditional droop control, it can provide virtual inertia and damping properties in SA mode; unlike a VSG control, the output active power of an inverter with GDC can follow changing references quickly and accurately, without large overshoot or oscillation in the GC mode. Moreover, given specific controller parameters, the GDC can function as both a traditional droop control and a VSG control. The GDC's controller parameter design is more intuitive and flexible, and this paper provides a distinct design process. Finally, the effectiveness of the proposed control method is validated by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents the digital implementation of a boundary controller with unipolar switching characteristic for single-phase voltage source full-bridge inverters. This paper expands the application of a second-order switching surface-based control method to unipolar switching of single-phase voltage source inverters (VSIs) using a finite-state machine. The finite-state machine has been formulated considering four different states of the inverter; positive,zero1, negative, andzero2. The second-order boundary control governs the current state of the system and provides proper switching action to keep the system within the desired reference. The control law is implemented digitally in F28m35x digital control card. A full-bridge inverter topology is used to achieve the three-level voltage switching. Various simulations and experiments were performed in a 550 VA, 120 V, 60 Hz VSI with a digitally implemented controller to verify the theoretical predictions. A high-quality voltage output was obtained for various loading conditions. The transient performance of the controller was investigated using a reference and load changes. A comparison of the implementation was made with the existing classical controllers to verify the fast-dynamic response of the system. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

This paper proposes an optimized mathematical model of the voltage-source inverter parallel-operation system (VSIPS) and proposes an improved droop control method based on this model, which can realize accurate power sharing in VSIPS. First, this paper analyzes VSIPS as a multi-input and multioutput system and proposes a precise definition of circulating current. The circulating-current model, the steady-state model, and the small-signal model are proposed subsequently based on the optimum design of wire impedance, which constitute the optimized mathematical model of VSIPS in s-domain. The circulating-current phasor model and the circulating-current power phasor model (CCPPM) are also proposed. Second, the mathematical model of traditional droop control is built and analyzed based on CCPPM, which elaborates the tradeoff of droop control between the steady-state voltage bias and the load-sharing accuracy, and proves that the $V- Q$ droop control cannot realize accurate reactive-power sharing. Third, an improved droop control method ( $\omega - P_{{\text{cir}}}$ and $V- Q_{{\text{cir}}}$ control) is proposed, which can realize the accurate active- and reactive-power sharing and eliminate the steady-state voltage bias simultaneously. Finally, simulation and experimental results are presented, which validate the proposed mathematical model of VSIPS, the analysis of droop control, and the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a current sensorless control strategy for the dual active bridge (DAB) converter with nonlinear disturbance observer (NDO)-based load current feedforward. The proposed method can regulate both the dc-bus voltage and the current of the DAB converter without current sensors. Several performance indexes are established for the parameter design and a detailed design method is presented in this paper. When a single-phase H-bridge inverter is connected, the double-frequency oscillation from the feedback path is suppressed by proper parameter design, while the transient response of dc-bus voltage can be further improved by the NDO-based load current feedforward with a notch filter in the feedforward path. The performance of the proposed control method and the effectiveness of the parameter design are verified in a prototype by experimental results. [ABSTRACT FROM PUBLISHER]

Multiple transmitters powering a single receiver simultaneously is a good alternative to upgrade the power capacity of the wireless power transfer (WPT) system by using multiple modular inverters manufactured in a larger quantities, since the demand for high power applications is on the rise. A multiple overlapped transmitters based WPT system is presented in this paper. In order to alleviate the effects of the cross couplings between the transmitters, additional capacitors are adopted in the transmitters and the configuration of additional capacitors is provided. Virtual active and reactive powers are defined to decompose the transmitter current into active and reactive components. A transmitter current control scheme based on the proposed current decomposition method consisting of one reactive current control loop and one active current control loop is also presented in this paper. Finally, a low-scale experimental setup using two overlapped transmitters WPT system is provided to verify the proposed approach. The experimental results indicate that the proposed method could improve the stability of output voltage control and achieve minimal current difference amongst transmitters. Besides, the overall system efficiency is improved to 90.34% with the proposed control method at 1.45 kW output power, which demonstrates that the proposed method is a potential solution for high power applications. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

A novel control strategy for single-phase current-source inverters connected to an ac grid is proposed in this paper. The control strategy aims to inject maximum power to the grid under transient and steady-state conditions by the tracking of sinusoidal references. This paper presents the modeling and the design of the control strategy based on the exact linearization of the inverter model. Results are obtained by computational simulation and validated experimentally. By using error performance indexes in the analysis of the results, it is demonstrated that the proposed controllers achieve correct tracking of the sinusoidal reference while keeping a low switching frequency, which helps to minimize the commutation losses. [ABSTRACT FROM PUBLISHER]

Small grid-tied wind turbines based on permanent magnet generators often use a cost-effective power converter topology consisting of a passive rectifier, a boost converter, and an H-bridge inverter. Speed or position sensors are rarely used due to cost issues. Model-based estimators relying on electrical magnitudes are used instead. However, such estimators are parameter sensitive, which limit their accuracy. Further concerns arise if these parameters change with the operating condition of the machine, mainly due to temperature. Speed sensorless control using the rectifier voltage ripple is analyzed in this paper. This technique provides good dynamic response and does not depend on machine parameters. Simulations are provided for speed and power tracking comparison with an accurate model-based speed estimation method operating at non-rated parameters. They show the speed accuracy and power tracking capability of the proposed method are similar to that provided by a speed sensor. This is translated into a 0.9% power increase when the model-based speed estimator shows 9% of error. Experimental results are carried out to test the effect of current and temperature in the estimation, showing temperature insensitivity and some distortion due to fast current transients. A speed estimation accuracy of zero mean error and 1.7% standard error is experimentally obtained in the regular operation of the wind turbine. [ABSTRACT FROM AUTHOR]

This paper investigates a robust model reference adaptive control (MRAC) method for a three-phase constant-voltage constant-frequency (CVCF) inverter with an output LC filter. The proposed MRAC method is designed to stabilize the error dynamics of the system by a feedback control term in the steady state and attenuate the parameter uncertainties of the system by an updated MRAC term. Unlike the conventional proportional–derivative control (PDC) scheme, the proposed MRAC scheme ensures the fast convergence of the output errors to the exponential trajectories predefined by the reference models. Furthermore, the adaptive state-feedback mechanism can guarantee the fast dynamic response in the transient state without using load current sensors or observers. The asymptotic stability is mathematically proven by a Lyapunov theory. The feasibility of the proposed controller is confirmed through extensive experimental studies on a prototype three-phase CVCF inverter with a TI TMS320LF28335 DSP. Finally, comparative experimental results of three control methods (i.e., conventional PDC, feedback linearization control, and proposed MRAC) are provided to validate the superior performance of the proposed method such as fast transient response, low total harmonic distortion, and robustness to parameter uncertainties under critical load conditions (i.e., abrupt load changes, unbalanced loads, and distorted nonlinear loads). [ABSTRACT FROM AUTHOR]

In this paper, a neutral point (NP) voltage balancing scheme suitable for three phase 5-level active NP clamped and T-type NP clamped (TNPC) inverters is discussed. Carrier-based pulsewidth modulation is used for the balancing of dc-link capacitors and floating capacitors (FC) in the inverter. The FC voltages are regulated with the help of redundant switching states of pole voltage levels and the dc-link capacitor voltages are controlled using zero-sequence voltage injection. Though the balancing approaches are different for dc-link capacitors and FCs, they are not decoupled from each other. This is due to the effect of certain redundant switching states used for FC balancing causing NP voltage variation. To address this issue, the redundant state time ratio is estimated online every sample and based on this dynamic time ratio, an optimal relationship between neutral current and zero-sequence voltage is established. It is found that the use of dynamic time ratio helps in achieving better transient performance than that of generally adopted fixed time ratio. Simulation and experimental results prove that the proposed balancing scheme works well under all operating conditions and exhibits fast and stable transient performance. [ABSTRACT FROM AUTHOR]

In this paper, we design a voltage-modulated direct power control (VM-DPC) for a three-phase voltage source inverter (VSI) connected to a weak grid, where the phase-locked loop (PLL) system may make the system unstable if the conventional vector current control (VCC) method is applied. Compared with the conventional VCC method, the main advantage of the proposed VM-DPC method is that the PLL system is eliminated. Moreover, in order to inject the rated real power to the weak grid, the VSI system should generate some certain amount of reactive power as well. An eigenvalues-based analysis shows that the system with the proposed method tracks its desired dynamics in the certain operating range. Both simulation and experimental results match the theoretical expectations closely. [ABSTRACT FROM AUTHOR]

Three-level inverter has an outstanding performance and is more advantageous in the switching vector selection than two-level inverter. In particular, the neutral-point voltage unbalance and common-mode voltage (CMV) reduction of three-level inverter should be carefully regulated for the appropriate operation, both of which, however, are mutually coupled resulting that the conventional space vector modulation (SVM) scheme cannot deal with them properly. To overcome this limitation, this paper proposes an improved space vector modulation (ISVM) technique to reduce the CMV and neutral-point voltage imbalance simultaneously. The generating mechanism of neutral-point voltage oscillation is derived. Based on the analysis, the proposed ISVM method adopts four voltage vectors (large, medium, small, and zero vectors) with adjusted dwell times to eliminate the ac unbalance of the neutral-point voltage. Considering the occurrence of neutral-point voltage disturbances, the dc neutral-point unbalance voltage is controlled by selecting the P-type or N-type small vector and adjusting the dwell times of small vectors for neutral-point voltage recovery. In addition, a novel switching sequence arrangement method with the minimal number of switches transition in one switching cycles and between switching cycles is proposed to reduce the total switching loss. Theoretical analysis and verification results show that the proposed ISVM scheme can reduce the magnitude of CMV to half of value using the conventional SVM, and an accurate control of ac and dc unbalanced neutral-point voltage can be obtained. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

A multifunctional and wireless droop control method for distributed energy storage units (DESUs) in ac microgrids is presented in this paper. This paper achieves the state-of-charge (SoC) balancing by employing the SoC-based P-f droop control method locally for the purpose to prolong the service life of DESUs and effectively utilizing the available capability of the DESUs. Besides, inspired by the conventional P-f droop control, a $\int Qdt - V$ droop control is proposed in this paper to eliminate the reactive power sharing errors. The \int {Qdt - V} droop control is realized by reducing the voltage proportional to the integration of the reactive power instead of the reactive power itself. Meanwhile, the voltage compensation term which is proportional to the integration of the accurately shared active power is added to this method in order to restore the voltage to the acceptable range. The control strategy is straightforward to implement and does not require communication links as well as the gain scheduling. This paper also presents the analysis of the corresponding small-signal stability of the proposed droop control method. Simulation and experimental results are provided to validate the feasibility and effectiveness of the proposed approach. [ABSTRACT FROM AUTHOR]

In this paper, a global study in terms of control architecture is applied to parallel voltage-source inverters. Parallelism of inverters represents very interesting advantages for the industrial applications to meet the high-power requirements, and it is possible to apply maintenance during the operation without interruptible operation. The main objective of this paper is to guarantee a reliable operation of the parallel inverters system during healthy and faulty conditions due to full disconnection of any inverter. Special precautions are recommended to avoid the negative effects of the circulating currents, which are caused essentially by the asynchronous pulse width modulation or existence of dispersion of the system component characteristics. To deal with this crucial problem, one-loop flatness-based control is proposed to the control of N parallel inverters and allows obtaining low total harmonic distortion. The proposed control uses the advantages of the flatness to ensure high power quality at the point of common coupling and equal currents distribution between the parallel inverters and minimize the impact of a full disconnection of any inverter on the performance. The proposed algorithm is theoretically analyzed and validated experimentally. [ABSTRACT FROM AUTHOR]

The boost-inverter-based battery-supercapacitor hybrid energy storage systems (HESSs) are a popular choice for the battery lifetime extension and system power enhancement. Various sliding mode (SM) controllers have been used to control the boost inverter topology in the literature. However, the traditional SM controllers for the boost inverter topology operate with a high and variable switching frequency which increases the power losses and system components design complexity. This can be alleviated by a pulse width modulation (PWM)-based fixed-frequency SM controller proposed in this paper. The SM controller is implemented using variable amplitude PWM carrier signals generated using the output capacitor voltage and inductor current measurements, thus eliminating the requirement of the output capacitor currents measurement. The battery-connected inductor reference currents for the SM controller are generated by a supercapacitor energy controller which is responsible for the HESS power allocation. First, the theoretical aspects of the SM controller, the operation and parameter selection of the supercapacitor energy controller, and the supercapacitor sizing for the HESS are discussed in the paper. Then, the proposed control system is experimentally verified, and it is shown that the HESS is able to satisfy the HESS output power requirements, while allocating the ripple current and the fast power fluctuations to the supercapacitor while maintaining operation of the supercapacitor within predefined voltage limits. The main advantage of the proposed SM controller, as compared with the traditional double-loop control method, is in eliminating possible DC current injection into the grid when the equivalent series resistance values of the boost inductors become unequal due to the tolerances and temperature variations. [ABSTRACT FROM AUTHOR]

In this paper, the application of an innovative transformer-less unified power flow controller (UPFC) for interconnecting two synchronous ac grids with large phase difference is presented. The proposed transformer-less UPFC is based on two cascaded multilevel inverters. As is well known, the real power flow between two generators is mainly determined by their phase difference. If two grids with large phase difference are initially separate from each other, once connected, there will be huge current flowing through the transmission line and will, thus, damage the generators or other supplementary equipments. Therefore, to connect two synchronous ac grids with each other without using an extra device is impossible. For decades, researchers have been investigating different approaches to this problem but still difficult to conquer, especially for real hardware implementation. An effective solution using the transformer-less UPFC is demonstrated in this paper. The transformer-less UPFC can realize grid interconnection, independent active and reactive power control, dc-link voltage balance control, etc. Furthermore, a 1-pu equipment can compensate system with phase difference as large as 30°. Experimental results based on the 13.8-kV/ 2-MVA transformer-less UPFC prototype are shown to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

This paper proposes a general control scheme for the dual-input three-level inverter, which comes from a neutral point clamped three-level inverter. It can be used for photovoltaic (PV) systems or battery storage systems with two dc sources. The dual-input three-level inverter can be connected with two PV arrays, which are able to realize maximum power point tracking independently. First, the dynamic model of the dual-input three-level inverter is established, which describes the relationship between the dual-input voltages and the duty cycle. After discussing the control theory of the dual-input voltages, a typical control scheme is proposed. The design of a control loop is introduced in details. Afterward, modulation and restriction of the proposed method are discussed. Finally, experiment on a 125 kW dual-input three-level PV inverter is implemented to verify the validity and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

A grid-connected inverter with critical loads should be able to supply a stable voltage to critical loads at the instant of a mode change as well as during clearing time while quickly detecting unintentional islanding. The indirect current control has been proposed to provide not only a stable voltage to critical loads during clearing time but also a seamless transfer of inverters at the instant of a mode change. However, the conventional islanding detection methods cannot be applied to the indirect current control based inverter since the magnitude and frequency of voltage do not vary when an islanding occurs. This paper proposes a reactive power P&O anti-islanding method for the indirect current control. The proposed islanding detection method generates a small reactive power perturbation at the output of the inverter and detects the islanding by observing reactive power mismatch during the islanding. Using the proposed method, the inverter can supply high quality power to critical loads without distorting the output current during the clearing time. The proposed anti-islanding method is validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

In a low-voltage parallel inverter system, the active power, unbalanced power, and harmonic power generally cannot be properly shared among inverters with droop control due to the mismatch of output impedance. To address this issue, this paper proposes a two-stage adaptive virtual resistor (AVR) control scheme. In the first stage, a proportional-integral controller is applied to regulate the active power with the use of a synchronous maximum power bus (SMPB), and the reactive power is adjusted by means of aQ–ωdroop controller. In the second stage, all inverters switch to aP–Edroop control mode by introducing the AVRs at fundamental positive-sequence, negative-sequence, and harmonic frequencies. Not only can this method eliminate the active power, unbalanced power, and harmonic power-sharing errors, it can also reduce the voltage deviation caused by the droop control. Moreover, the synchronization between inverters can be guaranteed as long as the SMPB is present, without using voltage sensors at the point of common coupling. Simulation and experimental results are provided to verify the feasibility of this method. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

This paper proposes the new clamping angle control (CAC) pulse width modulation (PWM) method to restore its maximum linear modulation range of voltage source inverters (VSIs) reduced by the duty ratio limitation in hardware implementation, which makes the VSIs to operate nonlinearly in the high modulation range. The deadtime and the bootstrap gate driver circuit mainly cause this duty ratio limitation in practice. In particular, the bootstrap gate driver circuit is used in many industrial applications by avoiding the additional power supply to apply the gate-source voltage of power switches, and therefore making the VSIs to be small size with the low cost. First, the proposed CACPWM method is theoretically analyzed. Then, it is applied in the high modulation range to overcome the limitation of the duty ratio due to the use of the bootstrap gate driver circuit. Thereafter, its practical effectiveness is verified by both simulation and experimental tests. Also, the resulting harmonic distortions are compared with those by the conventional PWM methods. [ABSTRACT FROM AUTHOR]

Local hardware clocks in physically distributed computation devices hardly ever agree because clocks drift apart and the drift can be different for each device. This paper analyzes the effect that local clock drifts have in the parallel operation of voltage source inverters (VSIs) in islanded microgrids (MG). The state-of-the-art control policies for frequency regulation and active power sharing in VSIs-based MGs are reviewed and selected, and prototype policies are then reformulated in terms of clock drifts. Next, steady-state properties for these policies are analyzed. For each of the policies, analytical expressions are developed to provide exact quantification of the impact that drifts have on frequency and active power equilibrium points. In addition, a closed-loop model that accommodates all the policies is derived, and the stability of the equilibrium points is characterized in terms of the clock drifts. Finally, the implementation of the analyzed policies in a laboratory MG provides experimental results that confirm the theoretical analysis. [ABSTRACT FROM AUTHOR]

For modular multilevel converters (MMCs) applied to medium-voltage dc distribution grids, using the traditional nearest level modulation (NLM) as in HVdc systems can lead to severe current distortion due to significantly reduced module numbers. This paper proposes a hybrid modulation method combining NLM and pulse width modulation (PWM) where only one module per arm operates under PWM mode. The proposed nearest level PWM (NL-PWM) method not only significantly reduces the current distortion, but also avoids the complicated voltage balancing control in each module. The harmonic characteristics of NL-PWM are derived using double Fourier transform, which provides a theoretical basis for selecting the module number and switching frequency for medium-voltage applications in accordance with grid harmonic requirements. Finally, the harmonic characteristics and feasibility of the proposed modulation method are validated by simulation and experimental studies on an MMC with six modules per arm. The simulated and experimental results reveal that NL-PWM has better voltage and current harmonic characteristics over NLM and CPS-PWM, thereby suiting the application of MMC with few models. [ABSTRACT FROM AUTHOR]

This paper deals with an investigation of the steady-state and transient performance of the direct rotor flux-oriented control (RFOC) strategies implemented in symmetrical two-phase induction motors (2PIMs). Such an investigation is structured within a comparison study considering: 1) the case of a two-leg voltage source inverter (B4-inverter), and 2) the case of a three-leg voltage source inverter (B6-inverter), in the stator of the 2PIM. Following a presentation of both drives, the principle of the RFOC is briefly recalled. Then, a special attention is paid to the implementation of the direct RFOC on current-regulated B4- and B6-inverters. The control of the power switches is achieved by two two-level hysteresis regulators in the B4-inverter rather than three in the B6-inverter. Initiated by a simulation-based analysis of the selected steady-state features of both 2PIM drives under direct RFOC strategies, the comparison study is then extended to a deep experimental investigation of the steady-state operation with emphasis on the dc-link capacitor voltages, the stator line-to-line and phase voltages, stator phase currents, the rotor flux, and the electromagnetic torque. The established results reveal three major limitations of the B4-inverter fed 2PIM drive, such as: 1) unbalanced dc-link capacitor voltages at low speeds; 2) a reduced speed range due to the low level of the phase voltages; and 3) an injection of harmonics due to the $d$ – $q$ transformation. While the B6-inverter exhibits balanced dc-link capacitor voltages in the total constant torque region with higher ripple of the stator phase currents and of the electromagnetic torque, the experiment-based comparison is achieved by an investigation of the dynamic behaviors of both drives under step- and ramp-shaped reversals of the reference speed. It highlights the poor dynamic behavior of the B4-inverter fed 2PIM drive under both shapes of speed reversal. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) for modular multilevel converter (MMC) systems has drawn attention among researchers in recent years due to its straightforward implementation, ability to control multiple objectives in a single cost function, and excellent dynamic response. Even though MPC seems promising for the MMC, it suffers from an excessive increase in computational complexity when the number of submodules (SMs) per arm (N) is increased. The computational load can be reduced by decoupling the SM capacitor voltage control from the cost function and balancing them in an external voltage sorting algorithm. In this paper, a further reduction of computations in the MPC is achieved by the preselection of control options that can satisfy the control objectives in the next sampling time. The preselection algorithm generates a greatly reduced number of control options to be computed by a straightforward MPC loop at each sampling time. In addition, the MPC together with the preselection algorithm can generate $2N+ 1$ output voltage levels in the MMC while maintaining a low $dv/ dt$ in the output voltage and suppressing the circulating currents in MMCs with considerable number of SMs. The steady-state and dynamic performance of the MMC operating with the proposed method is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

Input-series-output-parallel (ISOP) inverter systems are suitable for the high-input-voltage and large-output-current applications. In this paper, an active power inverse-droop control method is presented for the ISOP inverter system, in which the polarity of active-power feedback is inversed to be positive compared with the traditional droop control while the reactive power droop is still adopted to achieve voltage and power sharing of the system. The modularity and reliability of the system are greatly improved due to that both power circuits and control circuits of the constituent modules are self-contained and independent. The input voltage sharing and output current sharing can be well achieved without the sampling of input voltage, so the high-voltage sensors are eliminated. Thus, the cost and volume of the system can be reduced. The operational principle of the active power inverse-droop control is introduced and the detailed system design is presented based on the proposed control scheme. The stability analysis and the guideline for power sharing loop design are also provided. Finally, simulation and experimental results of a two-module ISOP inverter system verify the effectiveness of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In an islanded inverter-interfaced microgrid (IIM), fault current is generally controlled at the same level of the normal operation current due to the limited capacities of inverters, rendering the conventional overcurrent protection methods impractical. To solve this issue, this paper presents a novel protection strategy, which incorporates flexible control of the inverter and setting of microprocessor-based relay (MBR). Once a short-circuit fault occurs at distribution line, a current limiting strategy combining with hysteresis control and maximum current root-mean square (RMS) control (MCRC) is applied for the inverter to limit the fault current within permissible range. In the MCRC mode, a percentage of fifth harmonic is injected to the fault current, facilitating the MBRs to identify the fault according to the harmonics components. Additionally, the fault current versus fault impedance ( $I_{{\rm{fault}}}- Z_{{\rm{fault}}}$ ) droop control is synthesized to make the inverters output larger fault currents when the faults are closer to the inverters, and hence, the MBRs can be coordinated with the inverse-time principle. The main advantages of this method are that it neither relies on high magnitude of the fault current to identify the fault nor needs communications among protective devices to ensure the coordination of protections. Experiments have been conducted to demonstrate the feasibility of this method. [ABSTRACT FROM AUTHOR]

Three-phase three-leg inverter is one of the most popular topologies for inverters. When short-circuit fault occurs, the inverter is generally switched to the current-controlled mode from voltage-controlled mode to limit the fault currents. In this situation, the inverter becomes equivalent to a symmetric, three-phase, positive sequence current source. However, the voltage limiting may occur under asymmetrical fault. In this paper, a closed-loop model based on time-domain is originally developed as a means to investigate the fault current characteristics under asymmetrical fault. Based on the proposed model, a more intuitive insight into fault currents is presented as follows. 1) The positive sequence fundamental component of three-phase currents can still track the symmetric current references. 2) The magnitude of fault phase currents (ignoring the harmonics) will vary between 1 and $\sqrt 3 $ times of magnitude of current limiting references. Based on the conclusion, although the magnitudes of fault phase currents can be reduced by adopting smaller current limiting references, the actual magnitudes of fault phase currents will still vary in a range depending on the load impendence of healthy phase. Therefore, the reliable action of the protection devices is greatly affected and the selective protection cannot be realized. Furthermore, in order to achieve completely controllable fault currents under asymmetrical fault, two alternative current limiting strategies are presented with reverse current limiting references, and with current limiting references based on the introduced phase angle regulation. The theoretical results are validated by simulations and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a control strategy for the parallel operation of three-phase inverters forming an online uninterruptible power system (UPS) is presented. The UPS system consists of a cluster of paralleled inverters with LC filters directly connected to an ac critical bus and an ac/dc forming a dc bus. The proposed control scheme comprises two layers: 1) a local layer that contains a “reactive power-to-phase droop” in order to synchronize the phase angle of each inverter and a virtual resistance loop that guarantees equal power sharing among inverters; and 2) a central controller that guarantees synchronization with an external real/fictitious utility, and critical bus voltage amplitude restoration. Improved transient and steady-state frequency, active, reactive, and harmonic power sharing, and global phase-locked loop resynchronization capability are achieved. Detailed system topology and control architecture are presented in this paper. Furthermore, a mathematical model was derived in order to analyze critical parameters effects on system stability. The proposed control approach has been validated by means of experimental results obtained for several case-study scenarios. [ABSTRACT FROM AUTHOR]

This paper presents a new application of power and voltage balance control schemes for the cascaded H-bridge multilevel inverter (CHMI)-based solid-state transformer (SST) topology. To reduce load on the controller and simplify modulation algorithm, a master–slave control (MSC) strategy is designed for the dual active bridge (DAB) stage. The master controller executes all control and modulation calculations, and the slave controllers manage only device switching and protection. Due to the inherent power and dc-link voltage unbalance in cascaded H-bridge-based SST, this paper presents a compensation strategy based on three-phase dq decoupled current controller. An optimum zero-sequence component is injected in the modulation scheme so that the three-phase grid currents are balanced. Furthermore, to tightly regulate the output voltage of all the DAB modules to target value, a dynamic reference voltage method is also implemented. With this proposed control method, the three-phase grid currents and dc-link voltage in each module can be simultaneously balanced. Finally, simulation and experimental results are presented to validate the performance of the controller and its application to microgrid SST. [ABSTRACT FROM PUBLISHER]

This paper provides a theoretical discussion and comparison in energy balancing between a modular multilevel cascade inverter based on single-star bridge cells (SSBC) and that on single-delta bridge cells (SDBC). Attention is paid to applications involving asymmetric active-power generation in utility-scale grid-tied photovoltaic systems. Both qualitative and quantitative evaluation metrics to assess the energy-balancing capability are introduced and applied to both SSBC and SDBC inverters. As for the SSBC inverter, six zero-sequence voltage waveforms with different harmonic content enabling enhanced energy-balancing capability are analyzed and compared regarding their effectiveness. This paper also emphasizes on the SDBC as an alternative to the SSBC and highlights its superior operating characteristics under asymmetric active-power generation. [ABSTRACT FROM PUBLISHER]

Paralleling is the development tendency of the auxiliary inverter. This paper analyzes the problems of the parallel process in detail. First, for inherent contraction between voltage regulation performance and current sharing performance, the paper adopts the resistive droop method. Second, the paper improves dynamic performance and reliability of the droop method by improving power calculation and introducing the whole cycle adaptive droop method. Third, in order to solve the unshared current problem caused by inconsistent parameters, the paper increases active power proportion droop coefficient, and introduces voltage compensation strategy to compensate voltage drop caused by increased proportion droop coefficient. Fourth, the auxiliary parallel system has complicated load characteristics; the paper proposes voltage compensation strategy to compensate voltage drop caused by the pump load. This paper utilizes three-phase total reactive power to droop frequency and active power of each phase to droop amplitude, unbalanced current can be shared. This paper introduces special virtual impedance technology to solve the harmonic current sharing problem caused by the nonlinear load. Finally, the effectiveness of above theory is fully verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

With increasingly prominent role of rail transit in the entire urban transport system, an auxiliary inverter is used increasingly. The complicated and fluctuating load condition of the auxiliary inverter implies special designs about structure and control strategy are necessary. For this purpose, a comprehensive control strategy is proposed. First of all, this paper proposes a structure that is capable of suppressing unbalanced voltage. Second, the control strategy based on the resonant controller is proposed, which can balance split capacitors voltage, is capable of suppressing the effect of unbalanced load and nonlinear load. This paper introduces the design method of the control system in detail. Then, this paper simulates the proposed comprehensive control strategy in MATLAB. Finally, experimental results are presented, which fully demonstrate the excellent performance of the comprehensive control strategy. [ABSTRACT FROM PUBLISHER]