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The paper suggests a method aimed to improve the performance of dynamical systems with periodic uncertainties and disturbances (ac power converters are typical representatives of such systems) utilizing frequency-domain disturbance observer (DOB)-based control structure. In such control arrangement, DOB filter is the key component and should be designed so that its magnitude (phase) is as close to unity (zero) as possible at frequencies where the total uncertainty and disturbance exists. The methodology for designing DOB filters is well established mostly for systems with slow-varying uncertainties/disturbances and has been barely extended to systems with periodic excitation (such as grid-connected or stand-alone ac power converters). In this study, systematic enhancement of DOB filters, designed according to the classical methodology, is suggested based on appropriate mixing with a series multiresonant term. The proposed approach allows attaining improved periodic signals rejection capability while significantly sacrificing neither the dc gain nor the crossover frequency. Quantitative design guidelines are provided, and possible tradeoffs are revealed. The proposed methodology is validated by application to current control of LCL-filter-based inverter connected to a distorted ac grid. Feasibility and performance of the suggested approach are well supported by simulations and experiments. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Finite control set-model predictive torque control (FCS-MPTC) has a fast dynamic response because this algorithm directly selects the optimal voltage vector by its cost function for induction machine drives fed by voltage source inverter (VSI). However, belonging to open-loop control paradigm, the FCS-MPTC has torque tracking error due to inevitable load disturbance and mismatched model parameters in reality. In traditional FCS-MPTC, the outer loop, i.e., speed loop, adopts a classic proportional integral (PI) controller, abbreviated as PI-MPTC. The lumped disturbance is only suppressed by a PI controller. However, pole placement of the PI controller is usually designed by cut-and-trial, which is difficult to simultaneously achieve optimal dynamic performance and optimal suppression of lumped disturbance. In this paper, the FCS-MPTC with mismatched parameters is first analyzed. Second, the deficiencies of the traditional PI controller are introduced. Third, disturbance feedforward compensation-based-model predictive torque control (DFCB-MPTC) of induction machine is proposed to compensate lumped disturbance and improve the performance of the system. Furthermore, a simplified stator flux observer is proposed, whose gain matrix is independent of rotor speed. Experimental results verify the feasibility of the proposed DFCB-MPTC. Compared with traditional PI-MPTC, the proposed DFCB-MPTC has better dynamic performance, steady performance, and stronger robustness. [ABSTRACT FROM AUTHOR]

In this paper, a new hybrid modulation fault-tolerant control of an open-end winding linear vernier permanent-magnet (OEW-LVPM) motor is proposed. By using a floating capacitor inverter, the proposed OEW-LVPM motor drive can continue operation under open-circuit fault condition. The OEW-LVPM motor fed by dual-inverter system consists of two inverters, which are connected to both ends of the motor windings, including a dc power named as main inverter (MI) and a floating capacitor called as capacitor inverter (CI). When one switch is broken in the CI, the CI topology will be restructured to a three-phase four-switch inverter. Then, an improved six-step modulation is investigated in the MI to reduce the switching frequency, while the conventional modulation is applied in the CI. Thus, the MI can provide all the active power, and the CI is only used to supply the reactive power. The proposed fault-tolerant control method is simulated and the experiments with the OEW-LVPM motor drive are also accomplished to verify the feasibility. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

This paper proposed a novel method for two-segment three-phase motor to eliminate the harmonics nearby pulsewidth modulation (PWM) frequency. Due to PWM technique and switching losses considerations, ear-piercing high-frequency electromagnetic noise in drive system is common. By using magnetically coupled inductors (MCIs) and interleaved technique, the proposed novel method is able to remove the high-frequency harmonics located nearby the PWM frequency and other odd multiples in two-segment three-phase motor. With this method, the unpleasant acoustic noise could be removed when the PWM frequency is selected near 10 kHz. The size of MCIs mainly depends on the PWM frequency harmonic currents rather than the fundamental frequency currents. Thus, its size is very small compared with LC filter. Moreover, this method remains the control dynamics of two-segment three-phase motor without additional inductance for fundamental-frequency currents. The shift phase of two inverters PWM carriers is π, which is simple to implement. Finally, the effectiveness of the proposed method is verified by experimental results. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

This paper proposes a general control scheme for the dual-input three-level inverter, which comes from a neutral point clamped three-level inverter. It can be used for photovoltaic (PV) systems or battery storage systems with two dc sources. The dual-input three-level inverter can be connected with two PV arrays, which are able to realize maximum power point tracking independently. First, the dynamic model of the dual-input three-level inverter is established, which describes the relationship between the dual-input voltages and the duty cycle. After discussing the control theory of the dual-input voltages, a typical control scheme is proposed. The design of a control loop is introduced in details. Afterward, modulation and restriction of the proposed method are discussed. Finally, experiment on a 125 kW dual-input three-level PV inverter is implemented to verify the validity and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

Power electronics inverters are one of the major failure sources in motor drive systems, and power devices are one of the main causes of the power electronics inverter failures. Typically, an insulated-gate bipolar transistor (IGBT) module has multiple power devices due to some technical and cost advantages. This kind of configurations could have an asymmetric internal layout, which may lead to different thermal loadings and thereby lifetime difference of the power devices. Therefore, both the power rating and the lifetime of inverters are limited by the most stressed device. However, generally common data are provided for all devices in the datasheet and this may cause improper design of the inverters in terms of the lifetime and the power rating. In this paper, an effect of an asymmetric layout of IGBT modules on the reliability of motor drive inverters is studied based on a three-phase motor drive application with a 600 V, 30 A, three-phase transfer molded IGBT module. The thermal impedances of six IGBTs are investigated and its effect on thermal loadings of power devices is studied under the given mission profile. Then, their lifetimes are estimated and compared. Finally, this effect is verified by the experiments. [ABSTRACT FROM AUTHOR]

This paper deals with a model reference adaptive system (MRAS) estimator based on the second-order sliding-mode (SOSM) strategy for speed-sensorless direct torque control (DTC) of a six-phase induction motor. A compensated flux observer is proposed using the well-known supertwisting algorithm, which is inherently an SOSM technique. This observer is adopted as the reference model in the MRAS-based speed estimator to overcome the chattering problem of the classical sliding-mode techniques. The estimator is robust against parameter uncertainties and dc offsets. In addition, a supertwisting-algorithm-based second-order sliding-mode (ST-SOSM) controller is designed for the speed loop in the DTC strategy to increase its robustness under applying external load disturbances. The speed control loop needs the load torque signal. For this purpose, an ST-SOSM load torque observer is proposed, where it provides a robust performance without the penalty of high chattering. Simulation and experimental results confirm the validity and the effectiveness of the proposed approaches. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a two-segment motor system powered by two inverters with phase-shift pulsewidth modulation (PWM) to fulfill the purpose of low-torque ripple and vibration noise. Different from conventional multi-inverter structure, the inverters for this type of machine are electrically isolated between each other. First, the concept of multisegment machine is presented and the basic operation principle is analyzed with finite-element analysis (FEA) method. Then vibration caused by the switching device in machine is investigated and the control model of a two-segment motor is developed. Further, the principle of carrier phase-shift PWM is illustrated with the vibration analysis. Carrier phase shift can generate interleaved torque and force on the rotor for the two groups of windings in the machine and cancel each other for certain harmonics. Then simulation of control strategy for this type of machine has been done in MATLAB. Finally, based on the concept and principles mentioned before, a two-segment motor with its drive system is fabricated. Both the test of torque ripple and the vibration of the motor have been significantly improved. Compared with a normal three-phase motor driven by a paralleled inverter with interleaving, the proposed approach is with comparable vibration reduction but without using extra coupled inductors. [ABSTRACT FROM AUTHOR]

In voltage-source inverters (VSIs), dead time is used to prevent shoot-through over switching devices. However, the existence of the dead time will distort the output phase current, which degrades the performance of the inverter as well as influences the common-mode voltage (CMV), particularly in CMV elimination relevant modulation schemes, such as zero-common-mode (CM) pulsewidth modulation (PWM)-based paralleled inverters. In the light of the situation that the normal sampling-based dead-time compensation (DTC) methods are often disturbed by the current ripple, this paper introduces a novel DTC method for the VSI, which can mitigate the impact of the current ripple and improve the accuracy of DTC. The proposed method deduces the real-time current ripple, which can reconstruct the actual trajectory of phase-leg currents, and the peak values corresponding to rising and falling edges for PWM signals can be predicted. In this way, DTC can be implemented based on the direction of relevant instantaneous switching currents and finally improves the accuracy. Especially, the current-ripple-prediction-based DTC can help to improve the CMV distortion caused by the dead time for paralleled inverters with zero-CM PWM. Simulation and experimental results are provided to validate that the proposed method can be applied to different topologies and modulation schemes with good performance. [ABSTRACT FROM AUTHOR]

A grid-connected inverter with critical loads should be able to supply a stable voltage to critical loads at the instant of a mode change as well as during clearing time while quickly detecting unintentional islanding. The indirect current control has been proposed to provide not only a stable voltage to critical loads during clearing time but also a seamless transfer of inverters at the instant of a mode change. However, the conventional islanding detection methods cannot be applied to the indirect current control based inverter since the magnitude and frequency of voltage do not vary when an islanding occurs. This paper proposes a reactive power P&O anti-islanding method for the indirect current control. The proposed islanding detection method generates a small reactive power perturbation at the output of the inverter and detects the islanding by observing reactive power mismatch during the islanding. Using the proposed method, the inverter can supply high quality power to critical loads without distorting the output current during the clearing time. The proposed anti-islanding method is validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

In a low-voltage parallel inverter system, the active power, unbalanced power, and harmonic power generally cannot be properly shared among inverters with droop control due to the mismatch of output impedance. To address this issue, this paper proposes a two-stage adaptive virtual resistor (AVR) control scheme. In the first stage, a proportional-integral controller is applied to regulate the active power with the use of a synchronous maximum power bus (SMPB), and the reactive power is adjusted by means of aQ–ωdroop controller. In the second stage, all inverters switch to aP–Edroop control mode by introducing the AVRs at fundamental positive-sequence, negative-sequence, and harmonic frequencies. Not only can this method eliminate the active power, unbalanced power, and harmonic power-sharing errors, it can also reduce the voltage deviation caused by the droop control. Moreover, the synchronization between inverters can be guaranteed as long as the SMPB is present, without using voltage sensors at the point of common coupling. Simulation and experimental results are provided to verify the feasibility of this method. [ABSTRACT FROM AUTHOR]

For the purpose of increasing the reliability in a hostile environment, techniques of fault diagnosis have been reported for a three-phase voltage-source inverter (VSI). Based on the average current Park's vector method, this paper proposes a fuzzy-based fault diagnosis method for the VSI in the three-phase permanent-magnet synchronous motor drive. By utilizing the phase current information, the fault symptom variables are calculated by using the average current Park's vector method. The fuzzy logic approach is applied to process the fault symptom variables and obtain the faulty information of power switches. Compared with other fuzzy logic methods, the fuzzy logic design, fuzzy inputs, and fuzzy rules are different. The proposed fault diagnosis method can detect and locate not only the single or multiple open-circuit faults, but also the intermittent faults in power switches, which can improve the reliability of the motor drive system. The effectiveness of the proposed method is validated by both simulation and experiments. [ABSTRACT FROM AUTHOR]

In dc microgrid systems, power converters with input filters sometimes encounter unwanted input voltage and current oscillations, due to interactions among the bus impedance, filters, and converters. This paper presents a solid-state single-port series damper (“S3damper”) that can deal with such oscillations. The damper, which is connected in series between the input filter and the converter, is realized by operating a transistor as an ac resistor. It lowers the quality factor of the filter and thus increases the damping effect on the interaction between the filter and the converter. It also increases the input impedance of the filter to avoid voltage and current oscillation between the filter and the bus. In addition, the transistor is regulated at a low dropout voltage to reduce power dissipation. The control mechanism is autonomous. Furthermore, the proposed damper does not require any power capacitor or inductor, favoring high compactness and reliability. Modeling, design, and comprehensive analysis of theS3damper will be provided. A prototype damper for a commercially available 100 W dc–dc converter operated on a 48 V bus has been built and evaluated. [ABSTRACT FROM AUTHOR]

In this paper, a modified selective harmonic mitigation pulse amplitude modulation (SHM-PAM) is presented to be capable of canceling all triplen harmonic orders and suitable for single-phase application of five-level type of voltage source inverters. To this end, a new constraint is established for the two switching angles (α1, α2) to derive the new formula for the harmonics’ amplitude, which results in self-elimination of all triplen harmonics (e.g., 3rd, 9th, 15th, …). The fifth and seventh harmonic orders are mitigated through normal operation of the proposed SHM-PAM technique. It is also shown that the proposed technique is extendable to other multilevel voltage waveforms and a flowchart of self-elimination of all triplen harmonics has been presented. Mathematical analysis supported by experimental investigations show the desired performance of the proposed SHM-PAM algorithm on a two-cell single-phase cascaded H-bridge inverter as a typical five-level configuration in dealing with linear and nonlinear loads. Then, it is demonstrated that the maximum number of harmonic orders would be controlled with the minimum number of available angles in a low switching frequency voltage waveform. [ABSTRACT FROM AUTHOR]

Although high-frequency circulating current exists in parallel-operated inverters, it has not attracted as much attention as low-frequency circulating current, and thus has not been analyzed in detail previously. In this paper, a mathematical model and analysis are presented, which reveal the spectrum components and their changing trends of the circulating currents caused by carrier phase differences. The impact of carrier phase difference on high-frequency circulating current is also analyzed and verified. A closed-loop control scheme is proposed to suppress the switching frequency circulating current caused by carrier phase difference. In addition, the deadbeat and closed-loop control are combined to suppress the low- and high-frequency circulating currents simultaneously, to improve the overall performance of circulating current suppression. The effectiveness of the proposed scheme is verified by the simulation and experimental results acquired from a laboratory platform. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

This paper proposes the new clamping angle control (CAC) pulse width modulation (PWM) method to restore its maximum linear modulation range of voltage source inverters (VSIs) reduced by the duty ratio limitation in hardware implementation, which makes the VSIs to operate nonlinearly in the high modulation range. The deadtime and the bootstrap gate driver circuit mainly cause this duty ratio limitation in practice. In particular, the bootstrap gate driver circuit is used in many industrial applications by avoiding the additional power supply to apply the gate-source voltage of power switches, and therefore making the VSIs to be small size with the low cost. First, the proposed CACPWM method is theoretically analyzed. Then, it is applied in the high modulation range to overcome the limitation of the duty ratio due to the use of the bootstrap gate driver circuit. Thereafter, its practical effectiveness is verified by both simulation and experimental tests. Also, the resulting harmonic distortions are compared with those by the conventional PWM methods. [ABSTRACT FROM AUTHOR]

Local hardware clocks in physically distributed computation devices hardly ever agree because clocks drift apart and the drift can be different for each device. This paper analyzes the effect that local clock drifts have in the parallel operation of voltage source inverters (VSIs) in islanded microgrids (MG). The state-of-the-art control policies for frequency regulation and active power sharing in VSIs-based MGs are reviewed and selected, and prototype policies are then reformulated in terms of clock drifts. Next, steady-state properties for these policies are analyzed. For each of the policies, analytical expressions are developed to provide exact quantification of the impact that drifts have on frequency and active power equilibrium points. In addition, a closed-loop model that accommodates all the policies is derived, and the stability of the equilibrium points is characterized in terms of the clock drifts. Finally, the implementation of the analyzed policies in a laboratory MG provides experimental results that confirm the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper analyzes the accuracy of the zero-order hold (ZOH) model for the digital pulse width modulator (DPWM) in the s-domain. The s-domain model and the exact z-domain model for the current control of a single-phase inverter with an L-type filter are elaborated for quantifying the deviation of the ZOH model for the DPWM. The influences of the different computational delay and duty-cycle update modes on this deviation is analyzed in detail. The compensation method for this deviation of the ZOH model is proposed for accurately predicting the stability region of the control system in the s-domain. Simulations and experimental tests are executed to verify the effectiveness and correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

For modular multilevel converters (MMCs) applied to medium-voltage dc distribution grids, using the traditional nearest level modulation (NLM) as in HVdc systems can lead to severe current distortion due to significantly reduced module numbers. This paper proposes a hybrid modulation method combining NLM and pulse width modulation (PWM) where only one module per arm operates under PWM mode. The proposed nearest level PWM (NL-PWM) method not only significantly reduces the current distortion, but also avoids the complicated voltage balancing control in each module. The harmonic characteristics of NL-PWM are derived using double Fourier transform, which provides a theoretical basis for selecting the module number and switching frequency for medium-voltage applications in accordance with grid harmonic requirements. Finally, the harmonic characteristics and feasibility of the proposed modulation method are validated by simulation and experimental studies on an MMC with six modules per arm. The simulated and experimental results reveal that NL-PWM has better voltage and current harmonic characteristics over NLM and CPS-PWM, thereby suiting the application of MMC with few models. [ABSTRACT FROM AUTHOR]

In this paper, a novel buck–boost ac–ac converter is proposed. The basic switching unit of the proposed converter is a unidirectional buck circuit; therefore, it has no shoot-through worries. It can achieve safe commutation without using RC snubbers or soft commutation strategies. It can be implemented with power MOSFETs without their body diodes conducting and, for current freewheeling external diodes, can be used to minimize the reverse recovery issues and related loss. It has a bipolar voltage gain with both inverting and non-inverting operations. The non-inverting operation can be used to compensate voltage sag, and inverting operation can be used to compensate voltage swell. Therefore, the proposed converter as a dynamic voltage restorer is capable of compensating for both voltage sag and swell in a wide range. The detailed theoretical analysis followed by detailed experimental results of a 300-W prototype converter is provided. [ABSTRACT FROM AUTHOR]

This paper deals with an investigation of the steady-state and transient performance of the direct rotor flux-oriented control (RFOC) strategies implemented in symmetrical two-phase induction motors (2PIMs). Such an investigation is structured within a comparison study considering: 1) the case of a two-leg voltage source inverter (B4-inverter), and 2) the case of a three-leg voltage source inverter (B6-inverter), in the stator of the 2PIM. Following a presentation of both drives, the principle of the RFOC is briefly recalled. Then, a special attention is paid to the implementation of the direct RFOC on current-regulated B4- and B6-inverters. The control of the power switches is achieved by two two-level hysteresis regulators in the B4-inverter rather than three in the B6-inverter. Initiated by a simulation-based analysis of the selected steady-state features of both 2PIM drives under direct RFOC strategies, the comparison study is then extended to a deep experimental investigation of the steady-state operation with emphasis on the dc-link capacitor voltages, the stator line-to-line and phase voltages, stator phase currents, the rotor flux, and the electromagnetic torque. The established results reveal three major limitations of the B4-inverter fed 2PIM drive, such as: 1) unbalanced dc-link capacitor voltages at low speeds; 2) a reduced speed range due to the low level of the phase voltages; and 3) an injection of harmonics due to the $d$ – $q$ transformation. While the B6-inverter exhibits balanced dc-link capacitor voltages in the total constant torque region with higher ripple of the stator phase currents and of the electromagnetic torque, the experiment-based comparison is achieved by an investigation of the dynamic behaviors of both drives under step- and ramp-shaped reversals of the reference speed. It highlights the poor dynamic behavior of the B4-inverter fed 2PIM drive under both shapes of speed reversal. [ABSTRACT FROM AUTHOR]

When a grid-connected inverter is connected to a weak grid, the system may be unstable. An active damper can be connected to the point of common coupling (PCC), which simulates a virtual resistor to dampen the resonance and thus stabilize the system. In this paper, an adaptive tuning method of the virtual resistor is proposed, which can automatically regulate the virtual resistor to the critical value to stabilize the system, and thus reduce the power loss. Furthermore, the active damper is designed not to respond to the dominant low-frequency harmonic components in the PCC voltage introduced by the grid background harmonics, so that its power loss can be further reduced. In order to make the active damper more accurately simulate the virtual resistor in a wide frequency range, a harmonic-current-reference compensation method is proposed. The prototypes of a 6-kW grid-connected inverter and a 1-kVA active damper are built and tested to verify the effectiveness of the proposed control scheme of the active damper. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) for modular multilevel converter (MMC) systems has drawn attention among researchers in recent years due to its straightforward implementation, ability to control multiple objectives in a single cost function, and excellent dynamic response. Even though MPC seems promising for the MMC, it suffers from an excessive increase in computational complexity when the number of submodules (SMs) per arm (N) is increased. The computational load can be reduced by decoupling the SM capacitor voltage control from the cost function and balancing them in an external voltage sorting algorithm. In this paper, a further reduction of computations in the MPC is achieved by the preselection of control options that can satisfy the control objectives in the next sampling time. The preselection algorithm generates a greatly reduced number of control options to be computed by a straightforward MPC loop at each sampling time. In addition, the MPC together with the preselection algorithm can generate $2N+ 1$ output voltage levels in the MMC while maintaining a low $dv/ dt$ in the output voltage and suppressing the circulating currents in MMCs with considerable number of SMs. The steady-state and dynamic performance of the MMC operating with the proposed method is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

Reliability of power inverters is of dominant importance in various applications, including industrial, military, aerospace, and commercial applications. Therefore, developing fault tolerant (FT) power inverters is extremely needed from the viewpoints of system availability and avoiding harmful consequences. Tolerating various types of faults, preserving full output ratings after the fault, and being cost-effective represent the main challenges for most of existing FT solutions. In this paper, a new FT single-phase five-level inverter topology is proposed. The proposed topology can effectively tolerate both of single or multiple switches faults whether they are of open- or short-circuit fault types. Moreover, the proposed topology does not deteriorate system efficiency in postfault operation compared to the previously developed FT solutions. Evaluation of the effectiveness and robustness of the proposed topology is verified in both of simulation and experimental environments. Different case studies are investigated in order to cover various types and locations of switches’ faults. Moreover, comprehensive comparisons are provided to validate the superiority of the proposed topology over the previously addressed techniques. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

To develop thermoelectric power conditioning systems that are highly efficient over a wide range of input voltages and support medium-rated power, this paper introduces a hybrid resonant dc/dc converter using an active voltage-doubler rectifier. When the input voltage is higher than the preset nominal input voltage, the converter operates in the phase-shift full-bridge series-resonant converter mode, in which it achieves high efficiency by softly switching the primary-side switches and reducing the conduction loss. When the input voltage is lower than the nominal one, it operates in the resonant boost mode that boosts the resonant inductor current. By using the active voltage-doubler rectifier on the secondary side of the converter, we can build the converter with less number of active components. As a result, the proposed converter achieves, at low cost, high boost-ratio and high efficiency over a wide range of input voltages. A detailed analysis of the converter operation is presented along with the design procedure. At 35–55 V, a 600-W/360-V prototype of the proposed converter has been built and tested to demonstrate its effectiveness. [ABSTRACT FROM AUTHOR]

Parallel operation of multiple grid-connected power converters through LCL filters is known to have the potential problem of triggering oscillations in the ac mains. Such oscillatory frequencies are not integral multiples of the fundamental frequency and, hence, form a new source of interharmonics. Early detection of such oscillations is essential for the parallel power converters to move out of the unstable zone. This paper presents an online observer-based algorithm that can perform fast detection of interharmonics within a specified frequency band. The algorithm has been adopted in a specific and reduced form from an integral observer algorithm for detection of fundamental and interharmonic voltage components in the ac mains. A new method based on the kernel signal for fast interharmonic detection is proposed and practically verified. It has been implemented in a digital controller to detect oscillations such as those occurring between two grid-connected power converters. The practical results indicate that the algorithm can locate such frequency within the specific frequency band within one mains cycle. [ABSTRACT FROM AUTHOR]

A sawtooth carrier-based sinusoidal pulse width modulation (SC-SPWM) technique for asymmetrical six-phase two-level inverters is proposed in this paper, which could reduce both the peak-to-peak amplitude and the changing frequency of the common-mode voltage (CMV). The intersection-plotting method reveals that the mirror symmetrical sawtooth carriers for two three-phase groups can help optimize the distribution of overlapping areas, which is the CMV reduction mechanism of SC-SPWM. Additionally, the Fourier analysis is employed to quantitatively evaluate the modulation index and harmonic performance of SC-SPWM compared with the conventional SPWM and two phase-shifted SPWM methods. Also, further analysis demonstrates that dead time does not affect the reduction of CMV in a noticeable way. Finally, both simulation and experimental results coincide with the theoretical analysis that the proposed SC-SPWM shows the best performance in reducing the CMV amplitude and changing frequency among these four SPWM methods, though it leads to a higher phase current distortion. [ABSTRACT FROM AUTHOR]

Three-level converters typically feature low switching loss and small filter size. In order to realize a high-power-density design for three-level converters, SiC MOSFETs may be selected instead of using Si insulated-gate bipolar transistors. However, all-SiC-MOSFET-based converters suffer from extremely high total cost. In this paper, a SiC MOSFET and Si device hybrid active neutral-point-clamped (ANPC) converter is proposed. It consists of four Si active switches and only two SiC MOSFETs. Thus, it has lower total cost compared to the all-SiC-MOSFET-based ANPC converter. Furthermore, a dedicated modulation scheme is proposed to completely move all the switching events from Si devices to SiC MOSFETs by using redundant switching states. As a result, the switching losses are significantly reduced and extremely high efficiency is achieved. The proposed converter has fully utilized the low-switching-loss advantage of SiC MOSFETs and the low-cost advantage of Si devices, which shows significant superiority in high-end grid-connected inverter and rectifier applications. [ABSTRACT FROM AUTHOR]

This paper proposes an adaptive super-twisting algorithm based sliding-mode observer (STA-SMO) for surface-mounted permanent magnet synchronous machine (PMSM) sensorless control, in which voltage source inverter (VSI) nonlinearity is taken into consideration. An adaptive algorithm for online tuning the sliding-mode coefficients of STA-SMO is proposed based on the existing stable conditions. Thus, position estimation error can be reduced by the proposed adaptive algorithm in wide-speed range. Furthermore, voltage distortion due to VSI nonlinearity is online compensated to improve the accuracy of PMSM model. Because mismatch between reference and actual voltage due to VSI nonlinearity may bring large rotor position and speed estimation error, especially in low-speed range where distorted voltages may become dominant compared to actual voltages. Thus, a STA-SMO with adaptive sliding-mode coefficients and accurate voltage value could be obtained. Finally, the effectiveness of the proposed adaptive STA-SMO with online VSI nonlinearity compensation is verified on a surface-mounted PMSM by experiments. [ABSTRACT FROM AUTHOR]

Single-loop current control is an attractive scheme for the LCL-type grid-connected inverter due to its simplicity and low cost. However, conventional single-loop control schemes, which command either the inverter current or the grid current, are subject to the specific resonance frequency regions. The weighted average current control, which splits the filter capacitor into two parts (in form of an LCCL filter) and commands the current flowing between these two parts, is independent of the resonance frequency, but on the other hand, it is limited by the poor sensitivity to the grid impedance variation and weak stability in the grid current. These limitations are comprehensively explained in this paper and then addressed by identifying that the single-loop weighted average current control is equivalent to the dual-loop grid current control with an inherent capacitor current active damping. By tuning the capacitor split proportion as a second degree of freedom, an optimal damping performance that is robust to the grid impedance variation can be naturally achieved using only the inherent damping. Thus, no extra damping is required, and the single-loop structure with only one current sensing turns to be adequate. Moreover, for convenience of practical implementation, an improved LCCL filter configuration is proposed to allow the use of two equal nominal capacitances for the split capacitors. Finally, experiments are performed to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a novel three-phase DC-link multilevel inverter topology with reduced number of input DC power supplies. The proposed inverter consists of series-connected half-bridge modules to generate the multilevel waveform and a simple H-bridge module, acting as a polarity generator. The inverter output voltage is transferred to the load through a three-phase transformer, which facilitates a galvanic isolation between the inverter and the load. The proposed topology features many advantages when compared with the conventional multilevel inverters proposed in the literatures. These features include scalability, simple control, reduced number of DC voltage sources, and less devices count. A simple sinusoidal pulse-width modulation technique is employed to control the proposed inverter. The performance of the inverter is evaluated under different loading conditions and a comparison with some existing topologies is also presented. The feasibility and effectiveness of the proposed inverter are confirmed through simulation and experimental studies using a scaled down low-voltage laboratory prototype. [ABSTRACT FROM AUTHOR]

To damp the LCL-filter resonance in a grid-connected inverter, the feedback of capacitor current is usually adopted, and it can be replaced by the feedback of capacitor voltage as a low-cost solution, if an accurate digital differentiator can be made. The best way for realizing such a differentiator has so far proved to be an indirect nonideal generalized integrator (GI). As a simple alternative, this paper proposes two digital differentiators, which are directly developed in the discrete domain. They are a first-order differentiator based on backward Euler plus digital lead compensator and a second-order differentiator based on Tustin plus digital notch filter. The basic idea of the proposed methods is to correct their frequency responses to match the ideal differentiator with embedded digital filters. It is shown that the proposed differentiators exhibit the same derivative performance as the nonideal-GI differentiator, and they are more attractive for digital implementations due to their direct discrete natures, compact expressions, and easy algebraic manipulations. In particular, the proposed first-order differentiator is most competitive for its general representation and simplest implementation. Finally, a 12-kW prototype is built, and experiments are performed to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a dual-mode Cuk inverter for photovoltaic/thermoelectric power applications. A dual-mode Cuk inverter operates in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM), and has the advantages of low ripples of voltage and current at the input and output, medium power density, and step-up/step-down ability, but is difficult to control because DCM and CCM have distinct system dynamics. To overcome this control problem, we propose to use a repetitive controller (RC) with a multiple phase-lead compensator for the dual-mode Cuk inverter. If the RC is applied by itself, the distinct system dynamics may severely degrade its system performance. Thus, in the proposed RC, we mainly use a multiple phase-lead compensator to compensate for the different phase lags of the dual-mode Cuk inverter. To reduce the burden from the RC, we use the dual-mode nominal duty ratio as feedforward control input. We also analyze the boundary of operation modes in the dual-mode Cuk inverter, then provide detailed and practical guidelines to design the control parameters. Experimental results obtained on a 500-W digitally controlled module integrated converter prototype confirmed the effectiveness of the control approach. [ABSTRACT FROM AUTHOR]

This paper investigates the open-circuit faults of switching devices in the three-level T-Type inverter and proposes a new tolerant control method. The three-phase current and variation of the neutral-point voltage are detected to determine the fault switch. A carrier-based pulse width modulation is developed to tolerate switch fault by transiting from three-level to two-level switching. This makes the modulation scheme easier to be implemented compared to space vector modulation. For the neutral-point fault, the fault phase is operated by two-level modulation to produce the same rating voltage. On the other hand, the inverter is able to produce balanced voltage with reduced rating by keeping the phase of half-bridge fault to the neutral-point voltage. The neutral-point voltage is also able to be balanced by using two-level modulation since it does not contribute the neutral-point current. The performance and effectiveness of the proposed tolerant control are verified by a laboratory build. [ABSTRACT FROM AUTHOR]

Owing to low cost, small size, and low weight, transformerless inverters became prominent in single-phase grid connected photovoltaic (PV) systems. Key issues pertaining to these inverters include suppression of common mode (CM) leakage current and improvement of conversion efficiency. Achieving higher efficiency in single-phase grid-connected photovoltaic systems depends on the number of stages involved in feeding power to the grid, predominantly, if the PV array voltage is less than the peak value of the grid voltage. In this paper, an integrated dc–dc converter based grid-connected transformerless PV inverter is proposed which is aimed at maintaining high efficiency, even if the PV array voltage falls below the peak value of grid voltage (efficient operation at an extended input voltage range). A modulation strategy is discussed in order to minimize the flow of CM leakage current. Further, the efficiencies of certain transformerless inverter topologies are analyzed and compared with that of the proposed topology. Detailed simulation studies are carried out in MATLAB/Simulink environment to verify the analysis. Experimental results for a scaled down laboratory prototype are included as a proof-of-concept to validate the claims. [ABSTRACT FROM AUTHOR]

For the purpose of reducing cost and volume, as well as to increase reliability in hostile environments, techniques of reconstructing three-phase current through a single current sensor have been reported for a three-phase alternating current motor vector control system. Based on the phase current reconstruction method, this paper proposes a novel open-circuit fault diagnosis method for the low-power voltage source inverter in the three-phase permanent-magnet synchronous motor drive. Other than sampling the single dc-link current sensor, the zero voltage vector sampling method (ZVVSM) is adopted to implement the fault diagnosis. By placing the single current sensor at a special position, ZVVSM is able to sample current during the two zero voltage vectors and reconstruct the three-phase currents. The reconstructed three-phase currents are used to generate the diagnostic variables that can detect and locate the faulty power switches. The PWM modulation strategy remains unchanged in this method and the reconstructed phase currents are with less waveform distortion and less harmonic contents, which are suitable for the fault diagnosis. The effectiveness of the proposed method is verified by experiments. [ABSTRACT FROM AUTHOR]

In this paper, a novel six-switch dual-output inverter is proposed. The three-switch leg in the proposed inverter is implemented with the dual-buck structure. Hence, it retains all the benefits of the conventional dual-buck inverter such as improved reliability owing to the absence of short-circuit problems and higher efficiency with the use of power metal–oxide–semiconductor field-effect transistor (mosfet) without reverse recovery issues on its body diode. In addition, the passive components can be reduced with the high switching frequency operation. A 3.5-kW, 400-V dc input mosfet-based hardware prototype was built and tested to verify the performance of the proposed inverter and a maximum efficiency of 97% was achieved. [ABSTRACT FROM AUTHOR]

Input-series-output-parallel (ISOP) inverter systems are suitable for the high-input-voltage and large-output-current applications. In this paper, an active power inverse-droop control method is presented for the ISOP inverter system, in which the polarity of active-power feedback is inversed to be positive compared with the traditional droop control while the reactive power droop is still adopted to achieve voltage and power sharing of the system. The modularity and reliability of the system are greatly improved due to that both power circuits and control circuits of the constituent modules are self-contained and independent. The input voltage sharing and output current sharing can be well achieved without the sampling of input voltage, so the high-voltage sensors are eliminated. Thus, the cost and volume of the system can be reduced. The operational principle of the active power inverse-droop control is introduced and the detailed system design is presented based on the proposed control scheme. The stability analysis and the guideline for power sharing loop design are also provided. Finally, simulation and experimental results of a two-module ISOP inverter system verify the effectiveness of the proposed control strategy. [ABSTRACT FROM AUTHOR]

The cascaded H-bridge multilevel inverter (CMI) is one of the most popular converters, especially in renewabale energy applications. Beyond offering some significant benefits, this inverter suffers from the drawback of employing great number of components which reduces the reliability of the inverter. Thus, designing a scheme to enhance reliability in this kind of inverter is of crucial importance. In this paper, a fault-tolerant structure for the cascaded H-bridge multilevel inverter is designed. Failure rates of the switches and diodes are calculated. Then, by using the Markov method, reliability and mean time to failure (MTTF) of the mentioned inverter, before and after employing the suggested scheme, are evaluated. In order to prove proper performance of the suggested scheme, a laboratory built prototype is employed. The results show that employing the suggested scheme significantly enhances reliability and MTTF of the inverter. [ABSTRACT FROM AUTHOR]

A quasi-Z-source inverter (qZSI) could achieve buck/boost conversion as well as dc to ac inversion in a single-stage topology, which reduces the structure cost when compared to a traditional two-stage inverter. Specifically, the buck/boost conversion was accomplished via shoot-through state which took place across all phase legs of the inverter. In this paper, instead of using traditional dual-loop-based proportional integral (PI)-P controller, a type 2 based closed-loop voltage controller with novel dc-link voltage reference algorithm was proposed to fulfill the dc-link voltage tracking control of a single-phase qZSI regardless of any loading conditions, without the need of inner inductor current loop. A dc–ac boost inverter with similar circuit parameters as a qZSI was used to verify the flexibility of the proposed controller. The dynamic and transient performances of the proposed controller were investigated to evaluate its superiority against the aforementioned conventional controller. The integrated proposed controller and qZSI topology was then employed in static synchronous compensator application to perform reactive power compensation at the point of common coupling. The effectiveness of the proposed approach was verified through both simulation and experimental studies. [ABSTRACT FROM AUTHOR]

A wide-range soft-switching high-efficiency cycloconverter-type high-frequency-link inverter with dual-phase-shift modulation strategy is proposed in this paper. By adding an auxiliary inductor in primary-side full bridge circuit and adopting center-tapped four-winding transformer structure, the soft-switching range for primary-side switches has been extended. The secondary-side active clamper network is designed to recycle leakage inductor energy, and suppress voltage spikes caused by the resonance of the leakage inductor and the parasitic capacitance of switches. One feature of the proposed inverter is that both the primary-side full-bridge and active clamper network employ phase-shift modulation technique where all switches are driven with nearly 50% duty cycle square signals, hence a simple and reliable transformer-isolated gate drive circuit with small transmission delay is presented. Moreover, all switches in the proposed inverter achieve zero voltage switching, which contributes to higher conversion efficiency as well as higher switching frequency. Analysis, design, and implementation of the proposed inverter are discussed in detail. A 200-kHz laboratory prototype for the high-voltage audio amplifier application is developed and the experimental results are presented to validate the analysis and performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

In an islanded inverter-interfaced microgrid (IIM), fault current is generally controlled at the same level of the normal operation current due to the limited capacities of inverters, rendering the conventional overcurrent protection methods impractical. To solve this issue, this paper presents a novel protection strategy, which incorporates flexible control of the inverter and setting of microprocessor-based relay (MBR). Once a short-circuit fault occurs at distribution line, a current limiting strategy combining with hysteresis control and maximum current root-mean square (RMS) control (MCRC) is applied for the inverter to limit the fault current within permissible range. In the MCRC mode, a percentage of fifth harmonic is injected to the fault current, facilitating the MBRs to identify the fault according to the harmonics components. Additionally, the fault current versus fault impedance ( $I_{{\rm{fault}}}- Z_{{\rm{fault}}}$ ) droop control is synthesized to make the inverters output larger fault currents when the faults are closer to the inverters, and hence, the MBRs can be coordinated with the inverse-time principle. The main advantages of this method are that it neither relies on high magnitude of the fault current to identify the fault nor needs communications among protective devices to ensure the coordination of protections. Experiments have been conducted to demonstrate the feasibility of this method. [ABSTRACT FROM AUTHOR]