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This paper proposed a new half-bridge (HB) LLC resonant converter family with pulse-width modulated (PWM) auxiliary switch (sLLC converter) for hold-up mode operation. The proposed sLLC converters could operate with synchronous rectifier, which is suitable for low-output voltage applications. In the proposed converters, an auxiliary switch is added at the primary side to provide charging path for the series resonant inductor. For nominal 400-V input, sLLC achieves same performance as conventional LLC converter, and all the good features such as soft switching are naturally retained. For slight input voltage fluctuation, frequency modulation is used to regulate the output voltage. When the input voltage reduces further, HB switches will operate at constant minimum frequency, and the auxiliary switch will operate in the PWM mode to energize the resonant inductor with the bus voltage directly during hold-up period. Thus, the converter achieves higher voltage gain, and the output voltage can be maintained at desired level. To verify the effectiveness of the proposed sLLC converter, operational principle and equivalent circuits will be carefully explained and analyzed in this paper. A 300-W prototype is built for 250–400-V input 12-V output application. [ABSTRACT FROM AUTHOR]

For the conventional PFC rectifiers, the high efficiency cannot be achieved over a wide input range, and the efficiency will be greatly decreased at low-input voltages. In order to overcome the efficiency bottleneck under low-line input, a flexible mode bridgeless boost power factor correction (PFC) rectifier is proposed in this paper. According to the input voltage, the proposed rectifier can be flexibly adapted to the suitable operating mode to obtain the maximum efficiency. Meanwhile, the circuit components can be reused by different operating modes, so the extra cost is low. In the proposed rectifier, a back-to-back bridgeless boost PFC topology is adopted at high-line conditions and a three-level bridgeless boost PFC topology is rebuilt to reduce the switching losses at low-line conditions. Compared with the traditional bridgeless boost PFC rectifier, an extra low-voltage bidirectional switch (usually composed of two switches) is added, so the increased cost is low. In addition, the low common-mode noise can be achieved at both high- and low-line conditions due to the direct connection between the input mains and the output electrolytic capacitor. The detailed principle analysis about the proposed rectifier is presented in this paper. Finally, an experimental prototype is built to verify the feasibility and the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

A new active-clamped zero-voltage switching (ZVS) push–pull converter is proposed in this paper. Compared with the conventional push–pull converter, one auxiliary switch $Q_{{3}} and a clamping capacitor Ca are added in the primary side of the transformer to recycle the energy stored in the leakage inductors and clamp the voltage spike. Owing to the proposed converter which maintains ZVS of all the three switches from full load to very light-load condition, switching losses are reduced significantly. The voltage across the switch can be clamped at the input voltage plus the clamping capacitor voltage, i.e., V\rm{in}{+}VCa, are much less than those of a conventional push–pull converter that enabling the use of low-voltage, low-performance, and low-cost devices. In addition, the proposed topology can eliminate the problems of flux imbalance existing in the conventional one. Detailed operation, analysis, design, comparative study, and experimental results for the proposed converter are presented in this paper. An 800 W prototype was developed in the laboratory to evaluate and demonstrate the validity of the converter. [ABSTRACT FROM AUTHOR]

To reduce current stress and improve efficiency of dual active bridge (DAB) dc–dc converters, various control schemes have been proposed in recent decades. Most control schemes for directly minimizing power losses from power loss modeling analysis and optimization aspect of the adopted converter are too difficult and complicated to implement in real-time digital microcontrollers. Thus, this paper focuses on a simple solution to reduce current stress and improve the efficiency of the adopted DAB converter. However, traditional current-stress-optimized (CSO) schemes have some drawbacks, such as inductance dependency and an additional load-current sensor. In this paper, a simple CSO scheme with a unified phase-shift (UPS) control, which can be equivalent to the existing conventional phase-shift controls, is proposed for DAB dc–dc converters to realize current stress optimization. The simple CSO scheme can overcome those drawbacks of traditional CSO schemes, gain the minimum current stress, and improve efficiency. Then, a comparison of single-phase-shift (SPS) control, simple CSO scheme with dual-phase-shift (CSO-DPS) control, simple CSO scheme with extended-phase-shift (CSO-EPS) control, and simple CSO scheme with UPS (CSO-UPS) control is analyzed in detail. Finally, experimental results verify the excellent performance of the proposed CSO-UPS control scheme and the correctness of theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a nonisolated two-channel light-emitting diode (LED) driver with automatic current balance and zero-voltage switching (ZVS) is presented. In this LED driver, a dc-blocking capacitor is connected with one side of the coupled inductor. Therefore, based on the ampere–second balance, a current source is generated with the average value of the positive current identical to the absolute average value of the negative current. Accordingly, the LED currents can be balanced naturally without extra active components or current sharing transformer. Consequently, the circuit components can keep at a low count. In addition, the proposed LED driver can achieve ZVS turn-on. Thus, the switching loss can be decreased. Above all, the proposed two-channel LED driver can be extended to a multichannel LED driver. In this paper, detailed theoretical analyses and experimental results are provided to verify the feasibility and effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

Aimed at the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy with shunt dead time based on a double ARCP (DARCP) inverter. In comparison with the original modulation strategy, this modulation strategy cannot only achieve soft switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in double ACCs (DACCs) and make the maximum current through DACCs approximately equal to load current in commutation processes. So, the circulating current loss in DACCs and the current stress of auxiliary switches can be effectively reduced. According to the equivalent circuits in different operation modes under the novel modulation strategy, this paper analyzes the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the DARCP inverter. Finally, a 10-kW–16-kHz DARCP inverter prototype with insulated gate bipolar transistor-based switches is built. Experimental results are given to demonstrate the validity and features of the DARCP inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

This paper presents a novel interleaved high-conversion-ratio bidirectional dc–dc converter based on switched capacitors and coupled inductors. Series-connected switched capacitor and inductor cells were used to increase the voltage conversion ratio, reduce voltage stresses on power switches, realize soft-charging/discharging of switched capacitors, and achieve autocurrent-sharing in parallel inductors. The interleaved structure combined with switched capacitors was adopted to reduce current ripple at the side having lower voltage, thus enabling applications that require high power levels. In this paper, we first review the status of high-voltage-ratio bidirectional dc–dc converters. Then, the evolution of the proposed extensible topologies and the steady-state operating principle under the inductor current continuous conduction mode is presented. Finally, the performance and features such as voltage gain, voltage and current stress, and the autocurrent-sharing mechanism that are realized by switched capacitors are verified; the optimal design of coupled-inductors, switched-capacitors, and the chip size of switches are given. A specific design of the driving circuit that facilitates actual applications is described. A 1-kW prototype converter, employing a hybrid configuration of SiC and Si mosfets, was constructed to verify the theoretical analysis, and achieved an optimal compromise between conversion efficiency and low cost. [ABSTRACT FROM AUTHOR]

A variable switching frequency space vector modulation control method is proposed in this paper. It is used to achieve zero-voltage switching (ZVS) for two parallel 180° interleaved three-phase grid-connected voltage-source inverters at unity power factor. A wide range of ZVS can be achieved without any additional sensor, auxiliary circuit, or current zero-crossing detection circuit. The carrier wave frequency is easy to be calculated and updated with digital control. The current ripple is precisely predicted and controlled to minimize unnecessary circulation loss. The high current ripple at the inverter side can be considerably canceled by the parallel interleaved configuration. LCL filter is used to further attenuate the current ripple and improve the power quality at the grid side. The switching loss can be significantly reduced especially by using a wide bandgap device with low turn-off loss. The power density is greatly improved owing to the high switching frequency and low component parameters of the filter. A 4.5-kW simulation and experimental prototype interfacing 400 V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In more electric aircraft (MEA), three-phase power factor correction (PFC) rectifiers of several kilowatts are required. In this paper, a three-phase buck–boost derived PFC converter with three switches and with input inductors connected in delta configuration for use in MEA is presented. The proposed converter is operated in a discontinuous conduction mode to achieve PFC at ac input. This avoids the inner current control loop which further eliminates the current sensors. It requires only one output voltage sensor unlike five sensors in conventional PFC converter for its control implementation. This makes the system cost effective, more reliable, and robust. A simple voltage control loop is used to generate the gate signals. The steady state operation of the converter and detailed design calculations are presented. For each power component, the analytical expressions for calculating the average and rms current ratings are derived to facilitate the converter design. The small-signal model of the converter is presented to aid the controller design. The experimental results from a 2 kW laboratory prototype are presented to confirm the operation of the proposed converter. An input power factor of 0.999, an input current total harmonic distortion of as low as 2.76%, and a high conversion efficiency of 96% are achieved from the prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a new interleaved high step-up converter with coupled inductors. Interleaving configuration is employed at the input side to reduce the input current ripple and increase the power level. The series structure at the output side helps achieve a very high step-up voltage gain. Also, the proposed converter has very low switch voltage stress; thus, switching loss can be reduced and low-voltage-rating mosfets with small on resistance are allowed to lower the conduction loss. Due to the passive clamp performance, the leakage energy of the coupled inductors can be recycled and large voltage spikes across the switches are alleviated. Furthermore, with the aid of the leakage inductances, zero-current switching of the active switches can be achieved and the reverse recovery problem of the diodes is alleviated. The operating principles, performance analysis, and design considerations of the proposed converter are discussed. A prototype with 20-V input and 400-V output is built, and experimental results are provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

The widespread use of electronic devices increases the need for compact power factor corrected power supplies. This paper describes an isolated power factor corrected power supply that utilizes the leakage inductance of the isolation transformer to provide boost inductor functionality. The bulk capacitor is in the isolated part of the power supply allowing for controlled startup without dedicated surge limiting components. A control method based on switch timing and input/output voltage measurements is developed to jointly achieve voltage regulation and input power factor control. A prototype design is implemented with detailed measurements and waveforms shown to confirm the desired functionality. [ABSTRACT FROM AUTHOR]

In this paper, a variable switching frequency space vector pulsewidth modulation control is proposed. It is used to achieve zero voltage switching (ZVS) for a three-phase grid-connected voltage source inverter with unity power factor. A wide range of ZVS can be realized without any additional sensors, auxiliary circuits, or current zero crossing detection circuits. The switching frequency can be easily calculated by a digital controller. The frequency variation range in a line cycle is only about 1.5 times at any specific load. An LCL filter is used to attenuate the high current ripples at the inverter side, and active damping is adopted to avoid the resonance and reduce the filter power loss. The switching loss can be significantly reduced by using silicon carbide mosfets so that the conversion efficiency is high. The power density can also be improved due to the high switching frequency and the low inductance value of the filter. The operating principle, design considerations, and loss analyses are discussed in detail. A 3.5-kW simulation and experimental prototype interfacing a 350–400-V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

A component-minimized and low-voltage-stress single-phase power factor correction rectifier without electrolytic capacitor is proposed in this paper. Component minimization is achieved by embedding an active pulsating-power-buffering (PPB) function within each switching period, such that typical add-on power electronic circuits for PPB are no longer needed. Additionally, with a three-level flying-capacitor configuration, the voltage stresses of switching devices can be reduced more than 50% as compared to existing solutions that are based on embedded PPB. The relationship between the inductance requirement and the patterns of the modulation carriers, and how it can be utilized to minimize the magnetics of the rectifier, is also discussed. A 110 W hardware prototype is designed and tested to demonstrate the feasibilities of the proposed rectifier. An input power factor of more than 0.97, peak efficiency of 95.1%, and an output voltage ripple of less than 4.3% across a wide load range have been experimentally obtained. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

Many research works have been conducted on increasing the efficiency of interleaved boost converters (IBCs) applied for power factor correction (PFC) by using high-performance power electronic devices and soft switching circuits, which are not helpful in reducing the hardware cost and systematic complexity. In this paper, three intrinsic parameters affecting the efficiency of IBC PFC are found and analyzed, including the switching frequency value, boost inductor value, and output voltage value. Based on the findings, considering the limitations of current ripples, power factor, maximum magnetic flux density, and volume of a boost inductor, an optimization design method for high-efficiency IBC PFC is proposed. A 3.3-kW IBC PFC prototype is developed based on Si devices. The experimental result verifies that the proposed method can improve the efficiency of IBC PFC with low-cost low-performance devices in the full-load range. [ABSTRACT FROM AUTHOR]

This paper presents an output-series connected dual active bridge (DAB) converter for efficient zero-voltage switching (ZVS) by employing dual auxiliary LC networks in high-output voltage applications. The dual auxiliary LC networks are integrated into the converter for ZVS throughout full load range. The gate signals of the output side switches can control the current in the LC networks. By analyzing the working modes of the converter, the modulation trajectory is designed in terms of the boundaries of the ZVS range. The conduction loss caused by the auxiliary LC networks is adjusted according to the voltage and load power. The modulation scheme can achieve seamless transition between the adjacent working modes. The conduction loss of the proposed converter is compared with the conventional output-series DAB converter. Although the conduction loss is increased under light loads, all the switches can achieve ZVS. The reduced switching loss can improve the overall efficiency. Finally, a 1.3 kW experimental prototype was built to verify the effectiveness of the proposed converter and the modulation scheme, which demonstrates the ZVS performance and efficiency improvement. [ABSTRACT FROM AUTHOR]

This paper presents a new class of switched tank converters (abbreviated as STCs) for high-efficiency high-density nonisolated dc–dc applications where large voltage step down (up) ratios are required. Distinguished from switched capacitor converters, the STCs uniquely employ LC resonant tanks to partially replace the flying capacitors for energy transfer. Full soft charging, soft switching, and minimal device voltage stresses are achieved under all operating conditions. The STCs feature very high efficiency, power density, and robustness against component nonidealities over a wide range of operating conditions. Furthermore, thanks to the full resonant operation, multiple STCs can operate in parallel with inherent droop current sharing, offering the best scalability and control simplicity. These attributes make STC a disruptive and robust technology viable for industry's high volume adoption. A novel equivalent DCX building block principle is introduced to simplify the analysis of STC. A 98.9% efficiency STC product evaluation board (4-to-1, 650 W) has been developed and demonstrated for the next-generation of 48-V bus conversion for data center servers. [ABSTRACT FROM AUTHOR]

In a power electronics system, an electrolytic capacitor (E-Cap) is widely used, whose performance degradation can be reflected by the change of capacitance (C) and equivalent series resistance (ESR). This paper proposes a new online C and ESR monitoring scheme for the output electrolytic capacitor in a discontinuous conduction mode (DCM) flyback converter. The mathematical relationship between the instantaneous capacitor voltage and other parameters is analyzed and then the scheme of undetermined coefficients based on the multiple-spot sampling and least square method is further proposed. In addition, considering the particularity of high ripple current and the resultant voltage ripple variation range, especially with the temperature, an inverse ripple voltage isolation amplifier with variable amplification factor and negative voltage elimination is put forward so as to make digital signal processor identify the temperature change easily. The proposed scheme is noninvasive as only voltage signals need to be sampled and no current sensor is necessary. A prototype is built and the experiments are made to verify the effectiveness of the proposed method, from which the data are in accordance with the results measured by an LCR meter. [ABSTRACT FROM AUTHOR]

Although SiC-mosfet has significant advantages on switching performance over traditional Si-IGBT, the switching loss of SiC-mosfet devices at hard switching rises quickly with the increment in the switching frequency. This has narrowed down further possibilities of improving efficiency and power density of the grid inverter. Zero-voltage-switching (ZVS) space-vector-modulation (SVM) technique is introduced to further push the power density of SiC-mosfet inverter. This paper focuses on the impact of applying the ZVS-SVM to three-phase two-level SiC-mosfet inverter. With the same efficiency requirement the ZVS-SVM SiC inverter can operate at a much higher switching frequency, which gives the opportunity to further reduce the size of passive components. The loss distributions, conversion efficiencies, and volumes of passive components of both a 20-kW SiC-mosfet hard-switching inverter and a 20-kW SiC-mosfet ZVS-SVM inverter have been compared under switching-frequency range from 50 to 300 kHz. Meanwhile, a new metric called “efficiency stiffness” is proposed to compare different inverters with respect to the efficiency performance against switching-frequency characteristics. In addition, high voltage overshoot of SiC-mosfet and high thermal stress of resonant inductor are the two critical issues in the SiC-mosfet ZVS-SVM inverter with high switching frequency. A power module including seven SiC-mosfet bare dies with low stray inductance is designed for ZVS-SVM inverter instead of the existing seven discrete TO-247 package SiC-mosfets to reduce the voltage overshoots on the switches. Besides, to reduce the power loss of the resonant inductor caused by large amplitude of current at hundreds of kHz excitation frequency, design of the inductor with distributed air gap and optimal winding thickness are studied. A 20-kW SiC-mosfet ZVS-SVM grid inverter prototype is built to verify the proposed design. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dynamic ramp valley control in a current-mode adaptive on-time controller for the on-chip buck converter. It improves the system stability and reduces the output voltage under the load-dump. The proposed novel dynamic ramp valley control uses a sample and hold circuit, a comparator, and a ramp valley control to avoid the generation of an erroneous pulse signal while regulating the output voltage under the load-dump. Finally, a buck converter with 12 to 19 V input voltage range and 1.05 V output voltage with the novel dynamic ramp valley control is implemented in an integrated circuit. Based on the hardware experimental results, the output voltage under the load-dump with and without the proposed dynamic ramp valley control is 156 and 224 mV, respectively. Thus, the output voltage with the proposed dynamic ramp valley control is lower by 68 mV than that without the proposed dynamic ramp valley control, avoiding the potential damage of the output load, moreover, this performance has been verified with the SIMPLIS simulation and hardware experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a developed structure is proposed for high step-up nonisolated noncoupled inductor based multiport dc–dc converters. The voltage gain per number of devices of the proposed topology is higher than that of similar topologies. This means that, by using the same number of devices, the proposed topology can generate higher gains than other structures. In other words, the proposed topology utilizes less number of devices for producing the same voltage gain, which leads to less total cost, size, weight, and complexity. Despite high voltage gain, the normalized peak inverse voltage (NPIV) on switches/diodes is low. Higher number of input ports leads to higher gains and lower NPIVs on devices. The load energy can be absorbed and stored in first input unit. Modularity, simple structure, continuous input currents, and low input current ripple are the other profits of proposed topology. Low/medium power applications are suggested for the proposed structure. Proposed topology has been explained and operational modes along with steady-state analysis have been discussed. For better verification, the proposed topology has been compared with several multiport high gain converters. Comparison results confirm the advantages of the proposed topology. Finally, the proper performance of the proposed topology has been validated by experimental results. [ABSTRACT FROM AUTHOR]

Flyback converter has advantages of simple circuit configuration and easy control. However, it suffers two problems. One is the active switch is hard switching. The other is a very high voltage spike when the active switch is turned off. In order to solve these problems, this paper presents a novel dc-to-dc converter that mainly consists of two interleaved flyback converters. Both active switches can achieve zero-voltage switching on without the use of any active clamp circuit or snubber circuit. In addition, the leakage flux energy can be delivered to the output by using two added diodes. It helps to reduce the voltage spikes on the active switches and improve circuit efficiency. The steady-state analyses at different operation modes and the mathematical equations for parameters design are provided. Finally, a 200-W prototype circuit for driving high-brightness light-emitting diodes (LEDs) is built and tested to verify the feasibility of the proposed circuit. The LEDs are dimmed from 100% to 10% full power. Satisfactory performances are obtained from the experimental results. [ABSTRACT FROM AUTHOR]

Due to the lack of electrical isolation, the leakage current is one of the most important issues for transformerless photovoltaic (PV) systems. In this paper, a new modulation strategy is proposed to reduce the leakage current for a Z-source four-leg transformerless PV inverter. First, the common-mode loop model is presented. And then the common mode voltage behavior and the effect of factors on the leakage current are discussed. A new modulation strategy is proposed to achieve the step-up function and constant common mode voltage. Therefore, the leakage current can be suppressed effectively. Finally, the proposed strategy is digitally implemented and tested on the TMS320F28335 DSP and XC3S400 FPGA controlled hardware platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper presents a new dc/ac inverter for low-power applications (i.e., high-voltage, low-current applications), which offers soft switching of the power semiconductors and low output current ripple. In the proposed power circuitry, a novel ripple steering approach is used that can provide soft switching for the power semiconductors and significantly attenuate the high-frequency current ripple of the inverter. The proposed ripple steering technique utilizes the switching frequency and the duty cycle in order to perform the aforementioned tasks. Basically, the ripple steering technique steers the energy of the ripple to the output capacitances of the power semiconductors in order to provide the soft-switching condition. Theoretical analysis, simulation results, and experimental results verify the feasibility of the proposed technique and demonstrate the superior performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

This paper presents a modular multilevel series/parallel converter (MMSPC) with intermodule switched-inductor power transfer. The switched-inductor voltage conversion feature allows controllable and efficient transfer of energy between modules with nonnegligible voltage difference, providing both step-down and step-up functionalities. Thus, this converter can accurately control and rapidly adjust the voltage of each module to generate an ac output voltage waveform with a controllable number of levels, increasing the quality of the output. Moreover, the intrinsic dc–dc conversion feature can generate a dc controllable output voltage and enable new applications. In this text, we specifically demonstrate how the flexibility of obtaining both ac and dc output with the same setup renders the topology promising for battery energy storage systems and dc microgrid applications. Experimental results validate the topology and concept of an MMSPC with intrinsic switched-inductor conversion. [ABSTRACT FROM AUTHOR]

This paper presents a new interleaved active clamp forward converter for low and wide input, and high current output applications. In the proposed converter, the operating duty ratio can be extended over 0.5 due to the additional powering path resulting from additional series-connected secondary windings from each transformer. As a result, the proposed converter can be designed with large transformer turns ratio. Thus, since the proposed converter can reduce not only the primary RMS current but also switch turn-off current, it can achieve high efficiency. Moreover, since all secondary switches can operate without floating gate drivers, the proposed converter can maintain simple structure and low complexity of gate driving circuits in the secondary side. The validity of this proposed converter is verified by the experimental results from 36V–72 V input and 12 V/500 W output for the dc/dc prototype. [ABSTRACT FROM AUTHOR]

In the traditional energy storage systems consisting of series-connected energy storage cells such as electric double-layer capacitors (EDLCs), not only a bidirectional pulsewidth modulation (PWM) converter but also a cell voltage equalizer is required. The system is prone to complexity as two converters (i.e., the bidirectional converter and cell voltage equalizer) are separately necessary. This paper proposes the transformerless bidirectional PWM converter integrating the voltage multiplier-based cell voltage equalizer. An inductor in a conventional bidirectional PWM converter is replaced with series-connected inductors in the proposed converter in order to generate square-wave voltage with an arbitrary amplitude, by which the voltage multiplier is driven. The charge–discharge cycling test for nine EDLCs connected in series was performed using the proposed integrated converter from a voltage-imbalanced condition. The voltage imbalance was gradually eliminated during charge–discharge cycling, demonstrating the integrated functions. [ABSTRACT FROM AUTHOR]

This paper explores the use of the flying-capacitor multilevel (FCML) topology in high step-up conversion. Compared to the conventional two-level boost converter, the FCML topology utilizes high energy density capacitors to facilitate inductors with storing and transferring energy during the conversion process, which brings features, such as lower voltage stress on the switches, reduced voltage stress on the inductor, and high effective switching frequency at the switching node. As a result, the total volume of the passive components in the converter is greatly reduced while maintaining high efficiency at high voltage gain. To demonstrate the potential high power density and high efficiency, a hardware prototype that converts 100 V to 1 kV with 820-W maximum output power is built. Such specifications require careful optimizations in many aspects of the converter to ensure a high power density and efficiency design. The implemented solutions and associate design process are presented in detail, with comparison with other state-of-the-art solutions. The hardware prototype has successfully demonstrated a peak efficiency of 94.1%, and 329 W/in $^3$ (20 W/cm $^3$) overall power density. [ABSTRACT FROM AUTHOR]

This paper presents three nonisolated high voltage gain dc–dc converters with ripple-free input current. The proposed converters combine coupled inductors and voltage-doubler structure (VDS) to achieve high step-up of input voltage. An active clamp circuit is used to suppress voltage spike of the switch caused by of the leakage inductor of the coupled inductor. VDS is placed in the secondary winding of the coupled inductor that clamps the diodes voltage stress. Working principle and design methodology of the proposed converters are presented in detail. Experimental results for a 300 W laboratory prototype, 48 V input voltage, and regulated output voltage of 400 V, are shown to validate the operation of proposed converters. [ABSTRACT FROM AUTHOR]

A high-performance impedance-source converter utilizing switched inductor is proposed in this paper, which can be adopted in the applications demanding high-voltage conversion. The proposed converter not only retains the advantage of quasi-Z-source of sharing common ground between the input and output but also possesses the superiorities of enhanced boost ability and lower stresses as well as higher efficiency. Mathematical analysis of the converter and its performance comparison with other converters are presented in detail. Finally, a 100 W prototype is built and the experimental results are provided to verify the feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

The ultra-high voltage gain dc–dc converters are extremely required because of the low voltage level of many nonpolluting power resources. This paper proposes an ultra-high voltage gain converter based on an interleave technique and using three-winding coupled inductor and voltage multiplier cell. The interleave technique is useful for reducing the size of the filter components. In the proposed converter, high voltage gain is achieved without extreme duty cycle of solid-state switches. The voltage stress across the semiconductor devices can be reduced by increasing the turn ratio of the secondary of the coupled inductors. In addition, because of the implementation of the interleave structure, peak-to-peak variation of the main input current and switching losses are substantially reduced. The steady-state principles of the proposed converter in continuous conduction mode operation are given. Also, design equations are presented. Validity and performance of the proposed converter are surveyed by simulation and experimental results of a 120 W prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a high-frequency dc–dc converter with a synchronous rectifier (SR), which is suitable for the low-voltage output application. The proposed topology consisting of a Class Φ2 inverter and a synchronous Class E current-driven rectifier features low switch voltage stress, fast transient response, and high efficiency. First, the analysis and design method of the converter are presented. Concerning the coupling of amplitude and phase of the fundamental voltage and current in the rectifier stage, the duty cycle of the switch is considered in the proposed design method. For the design of the inverter stage, the impedance of the resonant tank across the main mosfet is utilized in the design process. Second, a self-oscillating resonant driver with dc bias voltage is proposed for the SR switch and features low component count and low driving power loss. A prototype with 12 V input and 5 V/10 W output was built to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper presents a self-powered interface circuit to extract energy from ambient vibrations for powering up microelectronic devices. The circuit interfaces a piezoelectric energy harvesting micro electro-mechanical systems (MEMS) device to scavenge acoustic energy. Synchronous electric charge extraction (SECE) technique is deployed through the implementation of a novel multistage energy extraction (MSEE) circuit in 180 nm HV CMOS technology to harvest and store energy. The circuit is optimized to operate with minimum power losses when input power is limited, and adapts well to operating conditions with higher input power. The highly accurate peak detector was validated for a wide piezoelectric frequency range from 20 Hz to 4 kHz. A charging efficiency of about 84% has been achieved for 4.75 V open-circuit piezoelectric voltage excited at 390 Hz input vibration under nominal input power range of 30–80 μW. Power optimizations enable the circuit to maintain a conversion efficiency of 47% at input power level as low as 3.12 μW. MSEE provides up to 15% efficiency improvement compared to traditional SECE, and maintains power efficiency as high as possible for a wide input power range. [ABSTRACT FROM AUTHOR]

Single-phase universal-input ac–dc converters are needed in a wide range of applications. This paper presents a novel power factor correction (PFC) architecture that can achieve high-power density and high efficiency for grid-interface power electronics. The multitrack PFC architecture reduces the internal device voltage stress of the power converter subsystems, allowing PFC circuits to maintain zero-voltage-switching at high frequency (1 MHz–4 MHz) across universal input voltage range (85  $\rm V_{\text{ac}}$ –265  $\rm V_{\text{ac}}$). The high performance of the power converter is enabled by delivering power in multiple stacked voltage domains and reconfiguring the power processing paths depending on the input voltage. This multitrack concept can be used together with many other design techniques for PFC systems to create mutual advantages in many function blocks. A prototype 150 W, universal ac input, 12  $\rm V_{\text{dc}}$ output, isolated multitrack PFC system with a power density of 50 W/in $^3$ , and a peak end-to-end efficiency of 92% has been built and tested to verify the effectiveness of the multitrack PFC architecture. [ABSTRACT FROM AUTHOR]

A simple buck–boost LED driver suitable for battery operated applications with limited input voltage level is presented in this paper. Soft switching performance is provided for the main switch via a resonant circuit to improve the converter efficiency. The incorporated auxiliary switch also performs under zero voltage switching condition. Both power switches can be driven with a simple gate drive circuit, so, the additional switch does not add any driving complexity. In addition, only one magnetic element is utilized in the proposed LED driver which contributes to circuit simplicity and lower weight and size. Also, all diodes turn off at zero current switching which eliminates the reverse recovery losses and improves efficiency. A laboratory prototype converting 12 V input voltage to 32 V output operating at 26 W output power is implemented and tested to verify the effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

An isolated buck–boost (IBB) converter with a hybrid three-level full-bridge primary-side circuit is proposed to achieve wider voltage range regulation. The primary-side circuit is composed of a three-level leg and a two-level leg. The output voltage of the primary-side circuit is five level (i.e., $\pm V_{{\text{in}}}$ , $\pm V_{{\text{in}}}{\text{/ 2}}$ , and zero), and the secondary-side circuit is a semiactive full-bridge rectifier with two active switches and two diodes. The input voltage of the secondary-side circuit is three level (i.e., $\pm V_{{\text{o}}}$ and zero). Hence, the operation voltage range can be wider than the normal IBB converter's with three voltage levels in the primary-side circuit and secondary-side circuit. This paper focuses on the control strategy allowing the converter to operate in boundary current mode at heavy load and in discontinuous current mode at light load with smooth mode transition. The soft-switching performance and output characteristics of the proposed converter are presented in detail. Compared with the semi-dual active bridge converter, the voltage range is doubled and the peak current of the clamped inductor is decreased. An 800-W prototype with 100–400-V input voltage and 380-V output voltage is built and tested to verify the feasibility of the proposed control strategy. [ABSTRACT FROM AUTHOR]

This paper presents an analysis of a novel control approach for the secondary side controlled flyback concept, along with improved drain–source voltage sensing for more precise gate signals and reduced losses. In contrast to the existing control scheme for this concept, the approach presented here sustains constant switching frequency throughout the load range without any additional hardware, boosting efficiency and simplifying coupled inductor design optimization. A 65-W demonstrator shows minimal output ripple during load changes, peak efficiency of 89.90%, natural output current limiting in overload conditions, and utilizes a novel lossless synchronous-rectification sensing subcircuit with minimal zero current crossing delay. [ABSTRACT FROM AUTHOR]

This paper presents a five-level flying capacitor multilevel (FCML) converter with an integrated auxiliary power converter to supply power to the controller and gate drive circuitry. The auxiliary power converter is sourced from within the FCML converter at a naturally occurring low-voltage node, reducing the voltage rating requirements by 75% and thus the size of the auxiliary converter. The auxiliary load current drawn from the FCML converter induces an imbalance in the flying capacitors, which is detrimental to the capacitor and switch ratings if left unchecked. To compensate for this imbalance, an active-balancing method is proposed that adjusts the phase and duty cycle of the traditional phase-shifted pulsewidth modulated control signals. The active balancing requires only a single capacitor voltage measurement and proportional control with no additional hardware components. A start-up circuit is proposed to power the auxiliary power supply and soft-start the FCML converter. Experimental results have been demonstrated with an experimental prototype resulting in an excellent flying capacitor balancing and FCML start-up. [ABSTRACT FROM AUTHOR]

This paper proposes a quadratic boost dc–dc converter with a high voltage gain and reduced voltage stresses. The conventional quadratic boost converter has a limited voltage gain, which is not suitable for high-step-up applications with various microgrids. In the proposed converter, to improve the voltage gain beyond that of a quadratic converter, a coupled inductor is adopted. Additionally, passive clamping circuits are applied to reduce the high voltage stresses caused by leakage inductance of the coupled inductor. Hence, additional power losses from the snubber circuit do not occur, and low-voltage-rating switching devices can be utilized for the main switch and output diode. Moreover, the reverse-recovery problem of the output diode can be alleviated by the leakage inductance. Therefore, the total power efficiency is improved. The theoretical analysis of the proposed converter is verified with a 300-V, 120-W prototype. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

Parallel-form switch-linear hybrid (SLH) envelope tracking (ET) power supply is constituted by a linear amplifier and a switched-mode converter connected in parallel. The switched-mode converter is usually implemented by a buck converter with hysteresis current control. However, the slew rates of the load current and the inductor current of the buck converter cannot match well when the slew rate of the load current has a wide variation range. The unmatched slew rates will lead to a high switching frequency of the buck converter or a large loss of the linear amplifier, which degrades the overall efficiency. In this paper, a multilevel converter is adopted to replace the buck converter in the parallel-form SLH ET power supply, and the hysteresis current control scheme is proposed for the multilevel converter to dynamically adjust its inductor current slew rate to approach that of the load current to improve the overall efficiency. The optimal design for the efficiency-related parameters including the inductor, the current hysteresis, and the number and values of the voltage levels in the multilevel converter is given. A prototype of the parallel-form SLH ET power supply with hysteresis current controlled multilevel converter is fabricated and tested in the lab. The measured overall efficiency is 79.4% when tracking the envelope of wideband code division multiple access signal with 5 MHz bandwidth and outputs 18 W average power, and a 3.8% efficiency improvement is achieved over that with the hysteresis current controlled buck converter. [ABSTRACT FROM AUTHOR]

This paper presents a deadbeat-based method for the single-inductor multiple-input multiple-output (SI-MIMO) dc–dc converter. By solving the cross regulation problem of the SI-MIMO dc–dc converter, the proposed method is capable of achieving the input current regulation (ICR) and the output voltage regulation (OVR) simultaneously. Moreover, the output current observers are adopted to replace the output current sensors, which are required by the conventional model based methods for dc–dc converters. The proposed control approaches including ICR and OVR are discussed in detail. To verify the effectiveness of the proposed deadbeat-based method, simulation runs and experiments are conducted on the single-inductor dual-input dual-output buck converter simulation platform and hardware prototype, respectively. The simulation and experimental results are analyzed in detail, and the comparison with the previous works is conducted. [ABSTRACT FROM AUTHOR]

In this paper, analysis and design of a three-phase-isolated Cuk-based power factor correction (PFC) converter have been proposed. The proposed converter is operated in discontinuous output inductor current mode to achieve PFC at ac input. This avoids the inner current control loop which further eliminates the sensing of current. This makes the system more reliable and robust. The converter requires only one simple voltage control loop for output voltage regulation, and all the power switches are driven by the same gate signal which simplifies the gate driver circuit. The detailed operation of the converter and design calculations are presented. And also a small-signal model of the converter by using current injected equivalent circuit approach is presented to aid the controller design. The experimental results from a 2-kW laboratory prototype with 208-V line-to-line input voltage, 400-V output voltage are presented to confirm the operation of the proposed converter. An input power factor of 0.999, an input current total harmonic distortion of as low as 4.06%, and a high conversion efficiency of 95.1% are achieved from laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]