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A high step-up dc–dc converter is proposed in this paper. The presented converter benefits from some advantages such as high voltage gain and continuous input current, which makes it suitable for the renewable energy applications. The presented converter is based on the SEPIC converter. However, the converter voltage gain is improved by employing a coupled inductor and two voltage multipliers. A passive clamp circuit is also added to the proposed converter that increases the voltage gain and reduces the voltage stress on the main switch. Thus, a switch with low $R_{{\text{DS(on)}}}$ will be needed that decreases the conduction loss. Besides, the voltage stress on the output diode in the proposed converter is reduced, which alleviates reverse recovery problem. The steady-state analysis of the proposed converter is discussed in this paper. The analysis is verified with experimental results under the output power of 245 W. [ABSTRACT FROM AUTHOR]

This paper proposes an open-delta operation as the fault-tolerant control strategy for the delta-connected cascaded converter. Based on the detailed power analysis, the fault-tolerant control enables continued operation and maintains dc capacitor voltages balancing during the occurrence of bridge cells fail. This enhances the system's reliability and availability. The simulation and laboratory test-bench, combining a seven-level delta-connected cascaded converter apply in a STATCOM operation and a PV system is tested to verify the proposed control technique. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

Voltage-controlled voltage-source converters (VSCs) are widely applied in islanded microgrids, dynamic voltage restorers, and uninterruptible power supplies, etc. Typically, an LC filter with a large filter capacitance is employed to improve the quality of output voltage and system robustness against external disturbances. Nevertheless, a large capacitance may lead to a low LC-resonant-frequency and cause unstable voltage control of VSCs when a single-loop proportional-resonant (PR) or resonant controller is used. This paper proposes a novel design of single-loop voltage control, where a negative proportional gain is adopted in the PR voltage controller, and it is revealed that the voltage control can be stable even with a low LC -resonant-frequency, e.g., lower than one-third of the system sampling frequency. To tackle the poor dynamic issue introduced by the negative proportional gain, this paper further proposes a closed-loop zeros configuration-based control method, which can flexibly tune the system dynamic response without affecting its stability. Finally, simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new power decoupling control method for a direct ac-to-ac converter. The ac-to-ac converter consists of two half-bridge converters, two input filter capacitors, and a series-resonant circuit, which enables it to convert the single-phase line-frequency ac input to the high-frequency ac output directly. The proposed power decoupling control method stores input power pulsation at double the line frequency in the input filter capacitors. Thus, the proposed control method realizes a unity power factor in the line-frequency ac input and a constant amplitude current in the high-frequency ac output without any additional switching device or energy storage element. This paper theoretically discusses the principle and operating performance of the proposed control method and confirms the effectiveness of the proposed control method in experiments using an isolated ac-to-dc converter based on the direct ac-to-ac converter. As a result, the proposed power decoupling control method effectively improved the displacement power factor of the line-frequency ac input current to more than 0.99 and reduced the voltage ripple in the dc load to 4%. [ABSTRACT FROM AUTHOR]

With increasingly prominent role of rail transit in the entire urban transport system, an auxiliary inverter is used increasingly. The complicated and fluctuating load condition of the auxiliary inverter implies special designs about structure and control strategy are necessary. For this purpose, a comprehensive control strategy is proposed. First of all, this paper proposes a structure that is capable of suppressing unbalanced voltage. Second, the control strategy based on the resonant controller is proposed, which can balance split capacitors voltage, is capable of suppressing the effect of unbalanced load and nonlinear load. This paper introduces the design method of the control system in detail. Then, this paper simulates the proposed comprehensive control strategy in MATLAB. Finally, experimental results are presented, which fully demonstrate the excellent performance of the comprehensive control strategy. [ABSTRACT FROM PUBLISHER]

Multilevel inverters have created a new wave of interest in industry and research. While the classical topologies have proved to be a viable alternative in a wide range of high-power medium-voltage applications, there has been an active interest in the evolution of newer topologies. Reduction in overall part count as compared to the classical topologies has been an important objective in the recently introduced topologies. In this paper, some of the recently proposed multilevel inverter topologies with reduced power switch count are reviewed and analyzed. The paper will serve as an introduction and an update to these topologies, both in terms of the qualitative and quantitative parameters. Also, it takes into account the challenges which arise when an attempt is made to reduce the device count. Based on a detailed comparison of these topologies as presented in this paper, appropriate multilevel solution can be arrived at for a given application. [ABSTRACT FROM AUTHOR]

This paper presents the modular multilevel cascade converter based on double-star chopper-cells, which is intended for grid connection to medium-voltage power systems without using line-frequency transformers. The converter is characterized by a modular arm structure consisting of cascade connection of multiple bidirectional pulsewidth modulation chopper-cells with floating dc capacitors. This arm structure requires voltage-balancing control of all the dc capacitors. However, the voltage control combining an averaging control with an individual-balancing control imposes certain limitations on operating conditions. This paper proposes an arm-balancing control to achieve voltage balancing under all the operating conditions. The validity of the arm-balancing control as well as the theory developed in this paper is confirmed by computer simulation and experiment. [ABSTRACT FROM AUTHOR]

Constant on-time V^2 control for point-of-load buck converters has instability issues in the cases that the output capacitors' RC time constants are small. This paper intensively studies the proposed solution using capacitor current ramp compensation, which is a superior solution featuring fast response and universality. A frequency-domain small-signal model based on describing function method is proposed in this paper. The time-domain large-signal response to the load step change is analyzed. The analysis illustrates the unique transient response behaviors of the capacitor current ramp compensated V^2 control. The design optimization methodology based on frequency-domain and time-domain analysis is presented. The proposed model and the design guidelines are verified by the experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

Class $E^2$ DC–DC converter composed of Class $E$ power amplifier (PA) and rectifier is a promising candidate for MHz wireless power transfer. It is soft-switching based and able to achieve high efficiency at MHz frequency. However, the converter implemented through traditional static design is sensitive to the variations of operation condition. Its performance gets deteriorated when DC load and coil coupling deviate from their respective optimum values. This paper demonstrates that the degradation of system efficiency is mostly due to the mismatch of PA load, and the efficiency drop can be efficiently improved by adding an L-type impedance matching network (IMN) after PA. A fixed IMN is sufficient to maintain a high efficiency, while a tunable IMN is required to ensure stable output power when operation condition dramatically changes. Key techniques, particularly system-level optimization, are discussed in this paper that ensure high efficiency over a wide range of variation in operation condition and also with reduced capacitor/inductor tuning ranges in the IMN. The 6.78-MHz Class $E^2$ DC–DC converters with and without the fixed/tunable IMN are fabricated and measured for validation purposes. The experimental results show that both high efficiency ( $>$66%) and stable output power (around 9 W) are maintained for the tunable converter when there are variations in the DC load and coil coupling. [ABSTRACT FROM AUTHOR]

The soft-switching solid-state transformer (S4T) employs only 12 main active devices and an auxiliary resonant circuit to implement a bidirectional solid-state transformer, with an attractive feature of achieving a full range of zero-voltage-switching conditions for all the main devices. This paper covers detailed design of the power stage, auxiliary resonant circuit, and control of the S4T. The high-frequency transformer is an essential element for the S4T, and it has a unique feature of dc-biased flux. Design of such a high-frequency transformer is also discussed in detail in this paper. Soft startup, shutdown, and fast dynamic response under load transients are also attractive behaviors because of the low inertia of the S4T. Experimental results from a 208-V/10-kV·A S4T unit are presented. [ABSTRACT FROM PUBLISHER]

This paper analyzes the limitations of a reduced-order model for modular multilevel converters (MMCs) by elucidating the relation between its accuracy, operating frequency, and converter parameters. A reduced-order simplifies the analysis of the MMC and thereby may provide additional information about the converter behavior. However, the accuracy of such model depends on several factors. In this paper, the effect of approximating the converter as a continuous system by neglecting quantization issues associated with having a finite number of modules is studied in detail. The analysis is done based on Fourier-series approximations with which it is possible to elucidate the relationship between the resonant frequencies of the MMC and the error of the reduced-order model. With the Fourier approximation, it is also possible to characterize resonant frequencies of the converter, both numerically and analytically, in terms of the converter parameters. The results can serve as a tool to identify situations when the reduced-order model produces good and also less accurate approximations especially when a low number of modules is available. [ABSTRACT FROM PUBLISHER]

Cascaded H-bridge (CHB) converter technology is actually the most popular solution for grid-connected converters in both medium- and high-voltage applications. This paper introduces a new control of a single-phase CHB active rectifier. The control uses a direct grid current control based on adaptive resonant controllers. The resonant controllers are adapting to slow fluctuation of ac grid frequency. The challenging problem of CHB converters is dc-link capacitor voltage balancing especially under unbalanced load conditions. This paper presents a reliable voltage-balancing technique utilizing energy estimation of particular dc-link capacitor banks and simple prediction of the changes of their energies. A nonlinear behavior of the converter caused by power semiconductors voltage drops and dead-time effects is minimized by auxiliary adaptive resonant controllers. The resulting control has very good performance, including the operation under unbalanced load conditions, and achieves low total harmonic distortion of converter grid current. The theoretical results were verified by experiments made on the developed CHB active rectifier prototype with three power cells in cascade. [ABSTRACT FROM AUTHOR]

An analytical steady-state model of the modular multilevel converter (MMC) can be used for component sizing and assessment of the impact of different parameters on the MMC performance. Thus, this paper proposes an enhanced steady-state model for the MMC, which enables one to calculate the amplitudes of the harmonic components of MMC arm currents, submodule capacitor voltages, and arm voltages. In addition, the proposed model allows for the calculation of the amplitude and phase angle of the modulating signal, and it also presents a criterion for resonance of the arm currents. This is achieved by means of a polynomial function of the modulation index, and through checking the stability criteria established by the proposed model. The capability of formulating the modulating signal enables a more accurate calculation of the steady-state amplitudes of the variables, as compared to the previously published models. This paper also presents an accurate method of submodule capacitor sizing, based on the proposed steady-state model. The proposed method gives the exact value of the submodule capacitance (i.e., the capacitance that results in dc voltage fluctuations within a desired range) for a prespecified submodule capacitor voltage variation and a given circulating current amplitude. The stability criterion given by the proposed steady-state model, used for sizing the arm inductance, and the submodule capacitor voltage variation given by the proposed capacitor sizing method, used for sizing the submodule capacitor, allows for the determining of the operating limits of the MMC in terms of its parameters. Extensive simulation results are presented to demonstrate the efficacy of the proposed steady-state model and the capacitor sizing method. Further, the results obtained from the proposed capacitor sizing method are compared with experimental results from the literature. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid nonisolated dc–dc commutation cell, which is generated by the integration between conventional commutation cell and ladder-type passive switched capacitor (SC) cell. From the resulted hybrid cell are derived three different dc–dc converters: a buck-type, a boost-type, and a buck–boost-type. The three structures are analyzed in this paper and are presented the topological stages, static gain characteristics in continuous conduction mode and discontinuous conduction mode, steady-state analysis. The analyses are generalized in relation to the number of switched-capacitor cells employed, which allows the increase of the rated gain of the converters by adding more SC cells. In addition, the proposed hybrid nonisolated dc–dc commutation divides naturally the voltage stress among the semiconductors and capacitors of the power stage. A 1-kW prototype was developed to verify the operation of the three proposed converters and their theoretical analysis. For the buck-type topology, designed with an input voltage of 600 V and output voltage of 450 V, a peak efficiency of 99.2% and efficiency at rated power of 99% were obtained. [ABSTRACT FROM PUBLISHER]

DC grid technology is regarded as a promising solution for future electric networks integrating a great amount of renewable energies. It calls for high-efficiency dc–dc converters with high voltage step-up ratio to interconnect medium-voltage (MV) dc distribution grids and high-voltage (HV) dc transmission grids. This paper presents an isolated bidirectional soft-switching dc–dc converter combining two-level converters in parallel on the MV side and a modular multilevel converter (MMC) on the HV side. A dedicated control method of the proposed converter is presented. By the proposed method, a certain reactive current is injected into the MV side by the MMC to ensure soft-switching on the MV side. The proposed converter presents low power-semiconductor total device rating and low semiconductor losses over a wide power range at variable input and output voltages. Simulation of a 50 kV/400 kV, 400 MW converter is conducted to evaluate semiconductor losses and verify the validity of this work. [ABSTRACT FROM PUBLISHER]

Hysteretic control provides unique advantages in dc–dc converter applications but it is less popular than other types of control because the switching frequency depends on the operating point, the feedback ripple, and the component parasitics. Furthermore, it is difficult to predict the frequency due to the complex interaction of those factors. This paper proposes harmonic balance analysis to systematically determine the switching frequency of the buck and boost-like converters with hysteretic current control, and extends the method to buck converters with hysteretic voltage control. The analysis includes the most important second-order effects (feedback ripple, component parasitics, a second output capacitor, and switching delays). For the less complex cases the switching frequency is expressed in closed form, and for the more complex cases the paper proposes a graphical solution. The predictions are verified by simulations and, for the buck converter with hysteretic current control, by experiments. The derived results are useful for designing a converter with predictable switching frequency, and can also be employed during the design process of a converter with synchronized or stabilized frequency. Given an arbitrary control scheme or circuit variation, the switching frequency can be readily obtained by following the proposed approach. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

SiC mosfet has low on-state resistance and can work on high switching frequency, high voltage, and some other tough conditions with less temperature drift, which could provide the significant improvement of power density in power converters. However, for the bridge circuit in an actual converter, high dv/dt during fast switching transient of one mosfet will amplify the negative influence of parasitic components and produce the significant negative voltage spikes on the complementary mosfet, which will threaten its safe operation. This paper proposes a new gate driver circuit for SiC mosfet to attenuate the negative voltage spikes in a bridge circuit. The proposed gate driver adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series-connected capacitor to suppress the negative voltage spikes, which could satisfy the stringent requirements of fast switching SiC mosfets under the high dc voltage condition with low cost and less complexity. An analysis is presented in this paper based on the simulation and experimental results with the performance comparison evaluated. [ABSTRACT FROM AUTHOR]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

The modular multilevel converter (MMC) has become a very attractive solution for interfacing high voltages in hybrid networks. The MMC enables scalability to different power levels, full controllability provided by insulated-gate bipolar transistors, and can achieve very high efficiencies by using a low-switching-frequency method as the nearest level modulation. However, the nearest level modulation requires a capacitor voltage-balancing algorithm, which can result in unbalanced loading for the power semiconductors in the different submodules. Particularly at low-power-factor operation, which could occur in the case of low-voltage ride through and of reactive power injection, the conventional algorithm is no more effective. This paper provides thermal stress analysis of the MMC in operation and proposes a thermal balancing approach, which is embedded in the capacitor voltage-balancing algorithm. The purpose of the thermal balancing is to achieve similar stress distribution among the different submodules to enhance the lifetime. The junction temperatures in the different submodules are studied for HVDC applications, and this paper proves experimentally that the thermal balance within the submodules is significantly improved. [ABSTRACT FROM PUBLISHER]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper presents the analysis and experiments of a variable inductor (VI) based LED driver for dc grid lighting applications. The proposed driver requires only a series inductor and a transformer as major components to drive the LED lamp from a half-bridge inverter. By introducing a VI as the series inductor, the LED current can be controlled independently from any other parameter, which makes it possible to drive and regulate several LED branches from the same half-bridge output. Other advantages of the proposed converter include inherent open-circuit and short-circuit protections, zero-voltage switching for the bridge transistor and zero-current switching for the output rectifier diodes, simple dynamics, possibility of analog and pulse width modulation dimming, constant switching frequency operation, and high efficiency. The converter is thoroughly analyzed and modeled for both steady-state and dynamic operation. As another novelty of this paper, the dynamic response of the VI has been studied and taken into account to obtain the complete transfer function of the VI-controlled system. In addition, some housekeeping issues that usually arise when dealing with VI, e.g., how to drive the VI bias winding, are solved in this work. Experimental results provided from a 50 W laboratory prototype demonstrate the correctness of the performed analysis and the good possibilities of the proposed converter. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

In the paper by Xiang et al. (IEEE Trans. Power Electron., vol. 33, no. 6, pp. 5452–5464, Jun. 2018), the authors proposed an improved virtual space vector modulation for three-level neutral-point-clamped converter. However, some problems are worth being discussed about vector synthesis of the improved virtual space vector modulation. This paper presents some comments and results concerning the above-mentioned paper. [ABSTRACT FROM AUTHOR]

Renewable energy generations have been attracting sustained attentions in academic and industry. Current-fed-isolated-bidirectional dc/dc converters (CF-IBDCs) are widely adopted in low-voltage high-current applications such as solar photovoltaic fuel cell with energy storage. This paper gives an overview and a comprehensive comparative evaluation of CF-IBDCs. The active clamped, dual half-bridge, L-L type dual active bridge, resonant-type, naturally clamped, and other type topologies of CF-IBDCs are investigated, analyzed, and compared regarding their circuit topological structures, operation characteristics, modulation methods, and soft-switching technologies. In addition, component cost models and loss models of converters are deduced and presented. On this basis, quantitative and comprehensive performance comparison of seven typical CF-IBDC topologies selected from each type is conducted in terms of costs, losses, weight, volume, and power density for the given system specifications and design constraints. Finally, the application range of different CF-IBDCs and future trend are presented to encourage further development. [ABSTRACT FROM AUTHOR]

Inductive power transfer (IPT) systems with front-side and load-side converters are generally developed for better overall system efficiency than a single IPT converter by providing maximum efficiency tracking and output regulation against variations of coupling coefficient ($k$) and load. The optimum efficiency point of an IPT converter is at a particular loading resistance, which varies with $k$ and is hard to measure directly for the purpose of control. Perturb and observe control is normally implemented to iteratively track the optimum efficiency point. However, this heuristic algorithm results in slow response to the variations of $k$ and load. Recently, a much faster linear control for optimum efficiency tracking has been developed for the series-series (SS) IPT system only. This paper proposes a general linear control scheme for all four basic IPT systems to track the optimum efficiency point. Unlike the SS IPT converter, it is found that additional control of either frequency or adaptive compensation is needed for the other three basic IPT converters to operate against the variation of $k$. Different input to output transfer functions and their $k$ - and load-independent properties at optimum efficiency are identified for all four basic IPT systems. Thus, a general fast linear control can be applied in the front-side converter to achieve optimum efficiency, while the load-side converter regulates the output power independently. Furthermore, the maximum efficiencies of the IPT converters with these four basic compensations for an identical loosely-coupled transformer are compared theoretically and verified experimentally. The parallel–parallel IPT converter gives the best efficiency. Its additional frequency control in conjunction with the optimum efficiency tracking and the output power regulation is also experimentally validated. [ABSTRACT FROM AUTHOR]

This paper proposes a new approach for the capacitor balancing of a dual three-level T-type converter based on silicon carbide discrete semiconductors. This study is performed while the converter feeds an open-end induction motor. The model predictive control (MPC) scheme is developed to balance the dc-link capacitors and to control the machine torque simultaneously. The proposed technique for MPC reduces the number of redundant switching states that are used in computations without affecting the operating voltage vectors. This reduces the computational time substantially. In addition, the proposed control strategy mitigates the weighting factor tuning problem of capacitor balancing in addition to the conventional MPC cost function. MATLAB simulation results for the proposed drive system under different case studies are presented. Hardware experimental setup for the proposed converter is built, tested, and verified. A comparison between experimental and simulation results is presented. It is observed that the theoretical as well as the experimental results are in full agreement. [ABSTRACT FROM AUTHOR]

In this paper, a novel topology combining reconfigurability and hybridization is presented. Reconfigurability allows the proposed converter to operate in three different operating modes, yielding a wide range of step-up conversion ratios. The combination of two charge-pump cells and an inductor allows to reduce the average inductor current if compared to a standard equivalent boost converter. A prototype with integrated MOS, drivers, and logic but external passives was built. Experimental results show that with $\mathbf {f_{s} }=\text{300}\,$ kHz, $\mathbf {V_{in} = \text{6}}\,$ V, and $\mathbf {I_o = \text{70}}\,$ mA, the converter can cover conversion ratios in the range from $\text {2.5}$ to $\text {10}$ , with a maximum output voltage equal to $\text {60}\,$ V. Peak efficiency is $\text {91}$ %. When the output current is increased to $\text {100}\,$ mA peak efficiency is $\text {92.8}$ %. [ABSTRACT FROM AUTHOR]

Multilevel converters are widely applied in medium voltage (MV) drive systems due to the attractive features, such as the ability to use devices with lower voltage ratings, high equivalent switching frequency, etc. Recently, a multilevel topology, named seven-level hybrid clamped (7L-HC), is proposed for MV drives. It has a competitive number of devices, showing the potential to build low-cost 7L converters. However, to ensure the wide frequency range operation and power quality of MV drives, its dc-link capacitors and floating capacitors must be controlled properly with balanced voltages. In this paper, an active voltage balancing method is proposed for the 7L-HC converter. This method can effectively balance all the capacitor voltages under a wide frequency range. The method is embedded in the PWM procedure without modifying the control strategies. Simulation and experimental results are provided to validate the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a voltage multiplier topology that is a hybrid between a Cockcroft–Walton multiplier and a Dickson charge pump. The Cockcroft–Walton structure exhibits significant output voltage drop under load as the number of multiplier stage increases. This is because all coupling capacitors are connected in series. Dickson charge pump mitigates this issue by connecting all capacitors in parallel. But this solution comes at the expense of large capacitor voltage stress at the last multiplier stage. The proposed hybrid structure arranges some capacitors in parallel and others in series, thereby achieving low output voltage drop and low capacitor voltage stress at the same time. We develop a model that predicts hybrid multiplier's performance and validates it experimentally. We also demonstrate a 60–2.25 kV dc–dc converter based on a 16-stage hybrid voltage multiplier which achieves a voltage gain of 12.8 while keeping the highest capacitor voltage stress to 660 V. [ABSTRACT FROM AUTHOR]

This paper proposes a dc-link voltage shaping method for a cascaded H-bridge (CHB) static synchronous compensator (STATCOM). A recently proposed low capacitance-STATCOM system, which intentionally operates with large voltage ripples on the dc-link capacitors, offers the advantage of superior harmonic performance. However, the capacitor voltage ripples decrease when operating at below-rated reactive current, which removes the aforementioned harmonic performance benefit of this system. In addition, such harmonic performance benefit is only achieved in capacitive operation mode. In order to expand the operating region where advantageous voltage ripples are present, a new voltage shaping method is proposed. The proposed method uses a CHB multilevel converter coupled with simple dc–dc converters to shape voltage ripples on the dc-link capacitor regardless of its operating point. This is achieved by controlling the average current of the dc–dc converter using model predictive control. The concept is best applied to an enhanced STATCOM, or E-STATCOM, application in which the STATCOM is integrated with either a renewable energy source or energy storage system. The operational principle of the proposed approach is validated via simulation and experimental results on a five-level single-phase CHB STATCOM. [ABSTRACT FROM AUTHOR]

Compared with the well-known modular multilevel cascaded converter with single-star bridge-cells (MMCC-SSBC), the hybrid cascaded converter (HCC) has the advantage of the lower component count of power transistors and dc capacitors. Thereby, this paper explores the HCC in grid applications and proposes a hierarchical control scheme, which allows the HCC to operate under unbalanced grid conditions and power imbalances among all cells. The HCC is further compared with the MMCC-SSBC under these unbalanced conditions to evaluate its performance. The laboratory test results are provided to verify the proposed control scheme and the comparison. The operational flexibility and reliability of the HCC are also discussed. [ABSTRACT FROM AUTHOR]

This paper presents a new single-phase ac–dc–ac three-level three-leg converter composed of three coupled-inductors and six active switches. The system model, operation principles, and a control strategy are presented and discussed. Additionally, a space-vector pulsewidth modulation technique is developed to double the effective frequency of the grid and load voltages and to reduce the switching losses. The proposed converter is compared to other similar converters in terms of switch count, harmonic distortion, and power losses. The results show that the proposed topology has improved power quality and uses fewer switches and gate drive circuits. These characteristics can potentially reduce the costs and the complexity of the system. In addition, the proposed converter eliminates the requirement for dead time to prevent short circuit of the dc-link. In order to validate the theoretical analysis, simulated and experimental results are presented and discussed. [ABSTRACT FROM AUTHOR]

This paper presents a pulsed power modulator with a new structure that utilizes the reverse recovery characteristics of diodes to achieve an effective pull-down circuit configuration. The proposed configuration for active pull-down applicable to negative pulsed power applications with a high-voltage direct switching method is implemented by adding a diode to the pulse discharging path of the modulator, instead of using a pull-down resistor. The diode is forward-biased while an output pulse voltage is applied to the load. When the pulse voltage applied to the load is removed, the residual energy in the load is quickly discharged through the reverse recovery path of the diode so that the pull-down function of the pulsed power supply system is efficiently performed. The operating principle of the proposed system is described, and each operating mode is analyzed in detail. In addition, the feasibility of the proposed system configuration is examined through various simulation results. Finally, it is proven that the proposed system can be used effectively in pulsed power application fields through a practical experiment in plasma source ion implantation applications. [ABSTRACT FROM AUTHOR]

In this paper, a multisource switched capacitor based boost multilevel inverter is proposed. The proposed topology features less number of components, high gain, self-charging capability of capacitors, reduced size of filter components. The modes of operation of the proposed converter and design guidelines of converter components are discussed. A comprehensive comparative study of the proposed converter topology with the topologies in the literature is given. Analytical expression for capacitor energy utilization (CEU) factor for the proposed topology is derived and the feasibility of the proposed converter with respect to CEU for the designed power rating is verified. The analytical performance of the proposed converter topology is verified through simulation studies. The common mode voltage and leakage current in the proposed topology are analyzed. Experimental prototype of the proposed converter topology with two sources and two capacitors for power rating of 500 W is developed and tested with resistive, inductive, and nonlinear loads. The experimental and simulated results are in close agreement with the analytical steady-state performance of the proposed converter. [ABSTRACT FROM AUTHOR]

DC-to-DC power supplies are critical components for processors in high performance computing and datacenter servers. Conversion from an intermediate bus voltage (e.g., 12 or 48 V) to the core voltage (∼0.9 V) of processors must be efficient, compact, and cost effective. This paper proposes two versions of active-clamp forward converter (ACFC) power blocks to supply core voltage from either 12 or 48 V intermediate bus voltage. The ACFC power block can be individually tested prior to assembly and vertically soldered onto the motherboard to fit in a standard 1U server. A low loss, compact planar transformer is designed into the ACFC power block printed circuit board (PCB). A custom, standing slab inductor not only provides high inductance and high saturation current but also helps to mechanically support the power block. A one-piece copper winding connects the transformer to the inductor, thereby reducing the dc loss in the current path. Thorough analysis is performed to model the conversion loss of the proposed power block. Experimental results show a peak efficiency of 90.4% (12 V input) and 89.5% (48 V input) with 0.9-V output. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) strings consisting of multiple panels suffer from partial shading or characteristic mismatch issues, such as a significant reduction in power yield. Various kinds of differential power processing (DPP) converters have been developed to prevent the negative impacts of substring-level partial shading. For panel-level applications, however, conventional DPP converters face a variety of challenges, such as impaired extendibility and increased voltage stress of circuit elements. This paper proposes a switched capacitor converter (SCC)-based modular DPP architecture. Modules, each containing series-connected panels with a panel-level DPP converter, are connected through a switchless module-level DPP converter, and PV panel characteristics are unified at module- and panel-levels. The number of panels in each module is fixed, while the number of modules can be arbitrarily extended without redesigning DPP converters, hence offering good modularity. In addition, since voltage stresses of capacitors in the proposed architecture can be reduced lower than half the module voltages, the proposed DPP system realizes all-ceramic-capacitor SCC circuit by properly determining the module voltages. A prototype for eight panels, which were grouped into two modules, was built, and laboratory and field tests were performed. The experimental results demonstrated the enhanced power yield from the partially shaded PV string. [ABSTRACT FROM AUTHOR]

In this paper, a dual half-bridge LLC resonant converter with magnetic control is proposed for the battery charger application. The primary switches are shared by two LLC resonant networks, and their outputs are connected in series. One of the LLC resonant converters is designed to operate at the series resonant frequency, which is also the highest efficiency operating point, and the constant output voltage characteristic is achieved at this operating point. The second LLC resonant converter adopts magnetic control to regulate the total output current and voltage during both constant current charge mode and constant voltage charge mode. Meanwhile, the function decoupling idea is adopted to further improve the system efficiency. The significant amount of the power is handled by the LLC resonant converter operating at the series resonant frequency, whereas the second LLC resonant converter fulfills the responsibility to achieve closed-loop control. By carefully designing the resonant networks, the zero-voltage switching for primary switches and zero-current switching for secondary diodes can be achieved for whole operation range. A 320-W experimental prototype is built to verify the theoretical analysis, and the maximum efficiency is measured about 95.5%. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-pilot (NPP) topology, as a new structure for converters, bears the advantages of a high power density, robustness, and flexibility and is therefore suitable for high-voltage and high-power applications. For a multilevel converter, as the number of power electronic switches increases, the risk of switch failure increases, together with the complexity of fault detection and tolerance control. The requirements for a higher operational stability and reliability continue to grow. However, studies on fault tolerance for multilevel converters are limited. In this paper, a fault diagnosis and tolerance solution for a five-level nested NPP converter is proposed. For the fault diagnosis, a deep learning method integrating the wavelet packet transform and long short-term memory is presented. Both open- and short-circuit switch failures can be precisely detected and located without the requirement of a large sample set. Two software-based control strategies for fault tolerance are adopted, and low-cost hardware reconfigurations are also implemented to prevent failure expansion and ensure continuous operation. Furthermore, the voltages of dc-link capacitors and flying capacitors are effectively balanced with the improved algorithm even when a failure occurs. Finally, the effectiveness of the fault-tolerant strategy are proven by simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes the design of gray wolf optimizer (GWO) algorithm-based fractional order proportional integral (FOPI) controller for power factor correction (PFC) using interleaved dc–dc single ended primary inductance converter converter with improved performance characteristics such as speed, accuracy, and stability. The detailed analysis and modeling of the proposed converter are presented. The optimal parameters of FOPI controller are obtained using GWO algorithm to improve the speed of response of the system. FOPI controller provides better performance in terms of robustness and stability since it has one more adjustable parameter than the conventional proportional integral (PI) controller. The cascade control strategy is implemented for the proposed converter with GWO-based FOPI controller as inner current and outer voltage controllers for PFC and load voltage regulation. The performance characteristics of the proposed system are analyzed and compared with conventional and other optimization techniques using MATLAB/Simulink software. A prototype of the proposed converter controlled by TMS320C2000 microcontroller for an output power of 200 W is tested and validated with the simulation results. The proposed system is used for powering devices like robots in critical applications such as military, space craft, etc., where stability, speed, and accuracy are major concerns. [ABSTRACT FROM AUTHOR]

This paper proposes a new modulation strategy with balanced power device currents for the full-bridge three-level dc/dc converter. The proposed modulation strategy has two working patterns, which cannot only realize zero-voltage switching (ZVS) but also satisfy the wide input voltage range. More significantly, the two working patterns of the proposed strategy can balance the currents both among the power switches and clamping diodes in comparison with the conventional control strategies which cause current imbalances among the power switches and clamping diodes. Consequently, the proposed strategy can balance the thermal stresses among the power switches and clamping diodes, which would, thus, improve the converter's reliability. Finally, the experimental results, obtained using a built 1.5-kW experimental prototype, verify almost zero current difference and zero thermal-stress difference among the inner power switches, outer power switches, and clamping diodes under the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a constrained modulated model-predictive control (M $^{2}$ PC) scheme for an LC-filtered voltage-source converter (VSC). To tackle the coupling effects of the state variables in a second-order LC filter, a dual-objective cost function (CF) is used to explicitly track both capacitor voltage and inductor current references, which can achieve an improved voltage quality. To handle the state and control input constraints of VSCs, a constrained M $^{2}$ PC scheme is proposed with an “online post-correction” constraint-handling technique. First, the unconstrained optimal voltage vector (OVV) is derived. It is generated by seeking the minimum analytical solution of the CF offline, simplifying the online implementation. Then, an “online post-correction” strategy is employed by reconsidering the constraints to correct the precalculated OVV online, which guarantees the future states within the allowed range. Finally, the corrected OVV is synthesized by the space vector modulation, resulting in a fixed switching frequency and low harmonics. Compared with the typical constrained model-predictive control, the presented scheme has the advantages of improved steady-state performance, flexible constraint-handling ability, and lower computational cost. Additionally, design procedures for weighting factor selection in the CF are given. Comparative experiments are investigated to verify the presented control strategy. [ABSTRACT FROM AUTHOR]