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This paper describes a flow control of the dye in the paper mill with the quasi-Z-source indirect matrix converter (QZSIMC) fed induction motor drive. More than a decade the voltage-source inverter (VSI) and current-source inverter (CSI) have been used to control the speed of the induction motor, which in turns controls the flow of dye. Recently, the matrix converter (MC) has been an excellent competitor for the VSI or CSI for its compactness. The voltage transfer ratio of the VSI, CSI, and MC has been limited to 0.866. Thus, the efficiency of these converters is less. To improve the voltage transfer ratio the quasi-Z-source network (QZSN) is to be used between voltage source and indirect MC (IMC). The modification in the shoot-through duty ratio of the QZSN varies the voltage transfer ratio greater than 0.866. Different voltage transfer ratios are needed for different voltage sag conditions. For a variation of the duty ratio of the QZSN, the fuzzy logic controller has been presented. To control the IMC vector control with space vector modulation has been presented. This paper proposes the implementation of QZSIMC adjustable speed drive for the flow control of dye in paper mill during different voltage sag conditions. A 4-kW prototype has been built and the effectiveness of the proposed system is verified with simulation results and experimental setup. Simulation is done in MATLAB, Simulink platform. Experimental setup is done with the aid of a TMS320F2812 (Texas Instrument) processor. The experimental results validate the maintenance of the speed of an induction motor at the set condition, thus controlling the perfect flow of dye in paper manufacturing technology. [ABSTRACT FROM AUTHOR]

This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

A modular multilevel converter (MMC) is regarded as a promising topology in high-voltage direct current systems. However, the MMC consists of numerous submodules (SMs) and switching devices, which lead to a considerable switching loss, and increased cost and size of the heat sink. To mitigate these issues, this paper presents a novel modulation method composed of fundamental frequency modulation (FFM) and multicarrier-based sinusoidal pulsewidth modulation schemes. The main purpose of this modulation method is the reduction of switching loss while maintaining good harmonic performance. However, the FFM scheme leads to the unbalanced capacitor voltage of each SM in the MMC. Accordingly, this paper additionally proposes the rotation method and selective voltage balancing control for SMs to ensure effective performance of the method. Simulation and experimental results verify the effectiveness and performance of the proposed modulation scheme through switching loss and spectral analyses. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

This paper introduces a novel H-bridge structured ac–ac pulsewidth modulation (PWM) converter topology based on two-level non-differential ac chopper legs, which can work at the non-inverting and inverting modes for the utility voltage compensation. Compared to the traditional bipolar-type H-bridge ac–ac converter, no bidirectional switches are switched in a complementary manner to overcome the commutation problem due to the delayed response of electronic circuits and semiconductor switching devices. The detailed PWM control signals and operational principles are presented to regulate the output voltage in a bipolar manner. Especially the main advantage is that the proposed ac–ac converter has the same buck/boost operation process for non-inverting and inverting modes, which ensures the continuously average current supply to the low-voltage output side without a high-value capacitor to support power. Additionally, due to the common sharing ground of the input and output, the feature that output can reverse or maintain phase angle with input is supported well. Then, the detailed analysis, design conditions, and experimental verification based on a 1 kW experimental prototype are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

This paper presents new space vector pulsewidth modulation (PWM) strategies for a single-phase three-level buck-boost neutral point clamped inverter coupled with impedance-source (IS) network. These strategies can be implemented for systems with any IS network with neutral point. The case study system is based on the quasi-Z-source inverter with continuous input current. To demonstrate an improved performance, the strategies are compared with a traditional PWM strategy. The advantages lie in reduced switching number, without output voltage quality distortion. The simulation and experimental results confirm the theoretical predictions. [ABSTRACT FROM AUTHOR]

A fast modularized multiwinding transformer balancing topology (MMTBT) for series-connected supercapacitors is proposed in this paper. With the proposed MMTBT, the voltage balancing inside modules and between modules are completely decoupled and the degree of modularization is high. This is different from the existing MMTBT, with the existing MMTBT, different modules share the same PWM drive. While with the proposed MMTBT, different modules can be driven by different PWM, then the variable frequency control strategy can be used to realize a fast balancing speed. With the proposed variable frequency control strategy, the average balancing current will be large and the balancing speed inside modules will be fast. With the proposed MMTBT, the balancing between modules is realized by discharging the higher voltage modules. The MMTBT of the higher voltage modules will act as a fly-back converter and the excitation current is in continuous current mode (CCM) to realize a great discharging power. First, the extra energy from the higher voltage module is transferred to the filter capacitor of the half-bridge converter. Then, the outputs of the half-bridge converters are connected in series to form a multilevel converter to act as the input of a boost converter. At last, the energy is transferred back to the supercapacitor energy storage system by the boost converter. The higher voltage module will be discharged with a great discharging power, then the balancing speed between modules will be fast. The fast balancing speed is realized inside modules and between modules, then the balancing speed of the whole system will be fast. The variable frequency control strategy and the control strategy of boost converter are analyzed in detail and the fast balancing speed of the proposed balancing topology is proved by experimental results. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems containing a rechargeable battery as an energy buffer require multiple dc–dc converters for PV panel control and battery regulation, and hence, they are prone to be complex and costly. To simplify the system by reducing the number of converters, this paper proposes the nonisolated switched capacitor converter (SCC)-based multiport converter (SC-MPC) for standalone PV systems. The proposed SC-MPC can be derived by integrating a bidirectional pulsewidth modulation (PWM) converter, series-resonant converter (SRC), and an SCC with sharing switches. PWM and pulse frequency modulation (PFM) controls are employed for the PWM converter and SRC, respectively, to regulate either a battery voltage, output voltage, or input power from a PV panel, depending on power balance among the input, battery, and load. The 150-W prototype was built for an experimental verification, and the results demonstrated the output voltage could be regulated independently on the battery voltage or input port of PV panels. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

The switching frequency is an important control parameter of pulse-width-modulation (PWM) rectifier to reduce switching losses and electromagnetic interference noise. This paper proposed a variable switching frequency PWM (VSFPWM) strategy for dc-link voltage ripple control in two-level rectifier. DC-link voltage ripple is determined by the dc-link current directly, and can be predicted synchronously with PWM signals. A real-time prediction model of dc-link voltage ripple is derived for a common voltage-oriented control PWM rectifier. Then, VSFPWM control is introduced, which changes the switching frequency cycle to cycle with a restriction of dc-link voltage ripple peak value. Furthermore, the dynamic behavior is also observed when the proposed VSFPWM control scheme is adopted. Detail simulation and experimental comparisons are carried out between VSFPWM and normal constant switching frequency PWM, which demonstrate the advantages of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents the active capacitor voltage-balancing (ACVB) methods based on the dynamic model for a five-level nested neutral-point piloted (NNPP) converter using hybrid carrier modulation. The traditional hybrid carrier modulation provides natural voltage balancing of floating capacitors and dc-link capacitors. First, the natural voltage-balancing ability under steady-state and ideal conditions is theoretically proved. However, there are accumulated errors and deviations of capacitor voltages in practical applications, especially under dynamic conditions. In order to address the accumulated errors and deviations of capacitor voltages, the dynamic models of floating-capacitor voltages and neutral-point voltage are established. Moreover, the ACVB method based on the dynamic model of the neutral-point voltage is proposed by injecting the zero-sequence voltage. And the ACVB method based on the dynamic model of floating-capacitor voltages is proposed by introducing the adjustment variables. The proposed ACVB methods have the advantages of simple formula, definite physical meaning, and high accuracy. Furthermore, the output voltage quality and current quality are evaluated in term of total harmonic distortion and the effect of model parameter mismatch on the proposed ACVB methods is presented. Finally, the comparative simulation and experimental results verify the correctness of the proposed ACVB methods based on the dynamic model under different conditions. [ABSTRACT FROM AUTHOR]

In order to solve the neutral-point voltage unbalancing problem for three-level inverters, this paper proposes a method to balance the neutral-point voltage for three-level inverters with variable modulation wave offset sinusoidal pulse-width modulation (SPWM) control. Based on the mathematical expressions of neutral-point voltage unbalancing, the factors are studied, which affect the fluctuation of neutral-point voltage. Theoretically the mathematical expressions of the neutral-point voltage with the proposed method are derived, and the mathematical relationship between the fluctuation of neutral-point voltage and the adjusting offset of modulation wave is studied. This proposed method realizes controlling the neutral-point voltage balance by dynamically calculating the offset superimposed to the modulation wave based on SPWM (DCOSPWM). This DCOSPWM method is very simple, which has good steady-state performance and is easy for digital implementation. The simulation results verify the correctness of the theoretical analysis in this paper, and the feasibility and effectiveness of this method is verified by the experiments in the experimental platform of neutral point clamped three-level inverters based on digital signal processor (DSP)-complex programmable logic device (CPLD). [ABSTRACT FROM AUTHOR]

Conventional centralized control strategies may reduce the flexibility and expandability of a modular multilevel converter (MMC) system. To tackle this issue, this paper proposes a distributed control architecture that is capable of assigning certain control tasks to distributed local controllers and improves the modularity of an MMC system. A central controller dealing with the output current regulation based on sensed arm currents is adopted. The control of MMC internal dynamics and the pulsewidth modulation (PWM) generation are distributed into local controllers. Unlike the conventional MMC control that needs all submodule capacitor voltages for capacitor voltage averaging, the proposed capacitor voltage control only relies on local submodule voltage measurement. Consequently, communication-intensive capacitor voltage transmission in each control cycle is not required and the communication burden of the control system can be significantly reduced. The control loops and possible control conflicts among submodules are presented and considered for system stability analysis. The effectiveness of the proposed distributed control architecture and capacitor voltage control for an MMC are confirmed by the start-up, steady state, and transient experimental results. [ABSTRACT FROM PUBLISHER]

This paper presents a general space vector modulation (SVM) method for the modular multilevel converter (MMC). Compared with earlier modulation methods, the proposed SVM method not only utilizes the maximum level number (i.e., $2n+ 1$, where $n$ is the number of submodules in the upper or lower arm of each phase) of output phase voltages, but also leads to an optimized control performance in terms of capacitor voltage balancing, circulating current suppression, and common-mode voltage reduction. The maximum level number is achieved by introducing a new equivalent circuit of the MMC, and the optimized control is obtained by selecting the optimal redundant switching states. Since the computational burden of the SVM scheme is independent of the voltage level number, the proposed method is well suited to the MMC with any number of submodules. Simulation and experimental results are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

The flying-capacitor modular multilevel converter (FC-MMC) overcomes the low/zero-speed operation issues of conventional MMC-based drive. The FC-MMC injects no common-mode voltage (CMV) to the drive system. However, the pulse width modulator (PWM) introduces switching ripples, which appear as CMV on motor stator windings. To completely get rid of the CMV, an elimination method based on a new modulation scheme is proposed in this paper. The modulation algorithm places the switching pulses end to end for upper and lower arms, respectively. The consistent switching positions between upper and lower arms lead to the complete CMV elimination for FC-MMC-based drive system in entire speed range. Although the proposed method slightly increases the switching frequency as compared to conventional phase-shifted PWM, it is still acceptable in medium-voltage applications. The validation of the proposal is proved by simulations and experiments. [ABSTRACT FROM PUBLISHER]

This paper proposes a pulse width modulation plus phase-shift (PPS) control for nonisolated high gain soft-switching bidirectional dc–dc converter (HSBDC). The phase-shift angle is used to control the direction and amount of power flow of the bidirectional dc–dc converter, while the duty cycle is used to balance the voltage between two high voltage side (HVS) capacitors. The HSBDC with PPS control has the advantages of simple control structure and symmetrical switching patterns, ensured soft-switching in both forward and backward modes at all load under wide voltage range, and reduced voltage ratings of the HVS capacitors and switches. The operation principle of the HSBDC with PPS control is analyzed in detail. Based on the analysis the passive component is designed to achieve higher efficiency. A 3-kW prototype is implemented and tested to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

The noninverting buck–boost converter has attracted significant attention in the photovoltaic (PV) module integrated application, as it offers high efficiency while maintaining a low cost and a simple topology. When this converter is employed, special care must be taken at the transition between buck and boost operating modes, as a dead-zone in the voltage transfer function can cause abrupt perturbations in the controlled voltage, decreasing the regulation quality and ultimately lowering the power conversion efficiency. In this paper, a new dead-zone compensation technique is proposed with the scope of smoothing the transition between operating modes, eliminating the voltage ripple and improving the regulation performance, while maintaining high efficiency. The converter under analysis is studied together with its gate driving circuit, which is based on a bootstrap capacitor power supply for the high-side switches. The proposed dead-zone compensation technique is deduced by using the principle of maintaining the ideal voltage gain function across the converter operating range. The technique is analyzed, implemented and tested on a purposely built PV module integrated noninverting buck–boost converter. The experiments reveal a sensible improvement of the voltage regulation during mode transition, confirming the effectiveness of the proposed technique and its fitness for the PV application. [ABSTRACT FROM AUTHOR]

Five-level hybrid-clamped (5L-HC) converter is a newly proposed topology which is suitable for high-performance medium-voltage high-power conversions without switches directly connected in series. The critical issue of this converter is that two flying capacitor voltages of each phase and two neutral-point potentials of the dc-link need to be balanced. This paper presents a decoupled voltage balancing method for this 5L-HC converter based on modified phase-shifted pulse width modulation (PS-PWM) and optimal zero-sequence voltage injection. The voltages across the central dc-link capacitor and two flying capacitors are balanced first by adjusting the width of four PWM signals. Second, the relationship between the neutral-point currents and the output phase voltage is studied and the upper and lower dc-link capacitor voltages are balanced by zero-sequence voltage injection. Both steady-state and dynamic-state simulation and experimental results are presented to confirm the validity of this method. [ABSTRACT FROM AUTHOR]

High-voltage direct current (HVdc) grid which incorporates multiple dc transmission lines will have extensive application since it has better operating flexibility and enhances the power trade. DC/DC converters are important components in the HVdc grid. The buck/boost modular multilevel dc/dc converter (MMDCC), which uses half-bridge submodules to reduce the voltage stresses across the power switches, is a good choice for the nonisolated applications in the HVdc grid. This paper proposes a pulse width modulation (PWM) control scheme for the buck/boost MMDCC, which uses much smaller submodule capacitors than those in the existing phase-shifted (PS) control scheme, thus reducing the converter volume and weight significantly. The operating principle of the proposed PWM control scheme is elaborated, along with the submodule capacitor voltage balancing strategy and the closed-loop control flowchart. Besides, the capacitance requirement of the buck/boost MMDCC in the PWM control scheme is calculated and compared to that in the PS control scheme, showing a dramatic reduction. The reason for the capacitance requirement difference of the two schemes is also explained. Simulation and experimental results validate the effectiveness of the proposed PWM control scheme and its ability to reduce the submodule capacitance. [ABSTRACT FROM AUTHOR]

Insertion of dead time in space vector pulse width modulation (SVPWM) causes phase voltage and current distortion or even zero-current clamping phenomenon, degrading the control performance of ac induction motor. In addition, analysis of distortion becomes more complicated due to the existence of parasitic capacitance in power switching device of voltage source inverter (VSI). This paper tries to make clear that how the parasitic capacitance influences VSI's output independently. First, an equivalent circuit of VSI containing parasitic capacitance is constructed. On that basis, mathematical expression of phase voltage distortion is derived from Kirchhoff's voltage law, Kirchhoff's current law, and charge and discharge characteristics of capacitance. Moreover, through the division of multiple zero-crossing regions in one phase current period, the difficulty of obtaining specific phase voltage error expressions is overcome. Second, to figure out the effect of parasitic capacitance, it is theoretically discussed in detail that how parasitic capacitances of different values affect phase voltage, current distortion, and zero-current clamping phenomenon. At last, simulations and experiments are carried out in which VSI with different parasitic capacitances is constructed by paralleling additional capacitors and with phase voltage feedback methods, the theoretical analysis can be verified. [ABSTRACT FROM PUBLISHER]

The simple boost control (SBC) method is usually used to control the shoot-through state in a single-phase single-stage quasi-switched boost inverter (qSBI). This paper proposes a new pulse-width modulation (PWM) control scheme to improve the modulation index for the qSBI. The advantages of the proposed method for the qSBI over the conventional SBC method are as follows: 1) the modulation index is larger; 2) the voltage stress on the capacitor, diodes, and switches is reduced significantly; 3) the high-frequency peak-to-peak inductor current and capacitor voltage ripples are smaller; 4) the shoot-through current is lower; and 5) the efficiency is higher. The operating principles and circuit analysis for the proposed PWM control scheme are shown. To verify the performance of the proposed PWM control method, a 400W prototype was built with a 110 V/50 Hz output voltage. The experimental results matched those of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Presently, the neutral-point potential offset is an inherent problem for three-level converters on three-phase four-wire active power filters. The conventional three-dimensional space vector pulse width modulation (3-D-SVPWM) strategy is adopted as a normal solution to the problem, but the selection of space vector sectors for four-wire converter is both abstract and complicated in practice. This paper proposes a new PWM strategy accordingly to simplify the selection process and the calculation of duration. Compared to the conventional 3D-SVPWM, the proposed method locates the sector of optimal vector directly with the polarity of three-phase reference voltage. Then, by applying voltage–second balance rule, it can perform a fast calculation of the duration and generate PWM signals to control the switching devices’ on/off. As an approach to correct the imbalance dc-link capacitor voltage, this strategy reconstructs the switching sequence. A portion of state O duration is disassembled into states P and N to suppress the neutral-point potential offset. The proposed strategy is validated with a range of experiments. The results indicate that this simplified PWM strategy can effectively reduce the computational burden, and also the dc-link capacitor voltage is well controlled. [ABSTRACT FROM PUBLISHER]

Four-level nested neutral-point clamped (NNPC) inverters experience severe voltage balancing problems under low output-frequency conditions when the conventional four-level space vector modulation (4L-SVM) technique is applied, which limits their wider application. In order to get a complete control of the flying-capacitor voltages, and to alleviate the calculation burden of conventional 4L-SVM, a simplified but effective 4L-SVM technique along with the voltage balance control (VBC) function is proposed in this paper. For low modulation indexes, zero and small vectors are selectively utilized and distributed to force the average charging and discharging time of flying capacitors to be equal to each other during every switching period, so that voltage ripples are greatly reduced to be within an acceptable level under low output-frequency conditions. For high modulation indexes, the simplification of conventional 4L-SVM for NNPC inverters into two-level SVM is proposed to reduce the computation complexity. Principles of the proposed 4L-SVM and VBC are elaborated in detail. The steady-state, transient-state, and VBC performances are investigated and compared with the case where the conventional 4L-SVM is applied. Simulation results of a 5 MVA inverter system and experimental results of a scaled-down 5 kVA inverter system are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

In this paper, the properties and operation of the virtual-space-vector pulse-width modulation (PWM) for a three-level neutral-point-clamped inverter with unbalanced dc-links are studied. By quantitatively analyzing the characteristics of the revised space-vector diagram (SVD) with unbalanced dc-links, the defined virtual SVD (VSVD) for the unbalanced case is theoretically proven identical to the VSVD of the conventional virtual-space-vector PWM (VSVPWM) strategy with balanced dc-links. The well-developed and fast-processing methods to calculate the durations of the nearest three virtual vectors for the conventional VSVPWM can be directly utilized. In addition, a control strategy to realize the asymmetric control of the dc-link voltages with VSVPWM is also studied, and this method can adjust the unbalancing degree with a high accuracy for any modulation indexes and load power factors. Simulated and experimental results are given to validate the effectiveness. [ABSTRACT FROM PUBLISHER]

This paper proposes a voltage match (VM) control for hybrid-bridge-based dual active bridge (DAB) converter in wide voltage conversion gain applications. With the addition of an auxiliary half-bridge circuit, the topology becomes an integration of a half-bridge and a full-bridge DAB converter. Unlike other pulse width modulation generation method for DAB converters, this converter utilizes four-level voltage at one port of the transformer to obtain matched voltage waveforms within the range of twice the minimum conversion gain. Wide conversion gain, decoupling of the two power control variables and wide zero-voltage switching (ZVS) ranges can be achieved with the proposed VM control. Full load ranges of ZVS for the six main power switches can be achieved and the two auxiliary switches can also operate in a wide ZVS range. In addition, the power control is done only using two control variables and its implementation is very simple, only needing a divider and a conventional voltage regulator. These characteristics and benefits of the proposed control are verified by experimental results from a 1-kw converter prototype. [ABSTRACT FROM AUTHOR]

The current imbalance among the two input capacitors is one of the important issues of the half-bridge three-level (HBTL) dc/dc converter, which would affect system performance and reliability. In this paper, a zero-voltage switching (ZVS) pulse-wide modulation (PWM) strategy including two operation modes is proposed. Based on the proposed ZVS PWM strategy, a capacitor current-balancing control is proposed for the HBTL dc/dc converter, where the currents on the two input capacitors can be kept balanced by alternating the two operation modes of the proposed ZVS PWM strategy. Therefore, the proposed control strategy can improve the performance and reliability of the converter in the aspect of balancing the thermal stresses and lifetimes among the two input capacitors. Finally, simulation and experimental studies are conducted and results verify the proposed control strategy. [ABSTRACT FROM PUBLISHER]

Z-source inverter provides a competitive single-stage dc–ac power conversion with the capability of both buck and boost voltage regulation. In order to maximize voltage gain and to increase efficiency, this paper proposes an improved pulse-width modulation (PWM) strategy. By adjusting the shoot-through duty ratio of one-phase leg, it regulates the average value of intermediate dc-link voltage, which is the same as the instantaneous maximum of three-phase line voltage in one switching time period (Ts) . And the other two-phase legs maintain the fixed switching states. Thus, the equivalent switching frequency of power devices in the inverter bridge is reduced to 1/ 3fs (fs is the frequency corresponding to Ts). The operating principles and closed-loop controller design are analyzed and verified by simulation and experiments. Compared with the existing PWM strategies, the improved PWM (IPWM) strategy demonstrates higher efficiency under full operation range of low voltage gain (1.27-2) application. However, with the IPWM strategy, the inductor current and capacitor voltage contain six-time-line-frequency ripples, which consequently require large size of the passive components when the output frequency is very low. Thus, it is also suitable for 400–800-Hz medium frequency aircraft and vessel power supply system due to a relatively high output line frequency. Furthermore, the idea of IPWM strategy can be extended to other kinds of three-phase impedance network-based inverters. [ABSTRACT FROM PUBLISHER]

Dynamic voltage restorer (DVR) technology has become a mature power quality product. In high-power applications, DVR using a multilevel converter is commonly used. However, DVR using a multilevel direct pulse width modulation (PWM) ac–ac converter has not been well studied. This paper presents a new DVR topology using a cascaded multilevel direct PWM ac–ac converter. In the proposed scheme, the unit cell of the multilevel converter consists of a single-phase PWM ac-ac converter using switching cell structure with coupled inductors. Therefore, the multilevel converter can be short- and open-circuited without damaging the switching devices. Neither lossy RC snubber nor a dedicated soft commutation strategy is required in the proposed DVR. This improves the reliability of the DVR system. The output voltage levels of the multilevel converter increase with the number of cascaded unit cells, and a high ac output voltage is obtained by using low-voltage-rating switching devices. Furthermore, a phase-shifted PWM technique is applied to significantly reduce the size of the output filter inductor. A 1-kW prototype of single-phase DVR is developed, and its performance is experimentally verified. Finally, the simulation results are shown for a three-phase DVR system. [ABSTRACT FROM AUTHOR]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

The imbalance in the currents of strings of LEDs will cause fast degradation or even failure in some LEDs. Such current imbalance should be avoided. To balance the common average current, a small duty cycle may necessitate a large LED turn-on current amplitude, which may cause temporal overheat and low luminous efficacy of the LEDs. This paper presents a current balancing method based on pulse-width modulation of a common bus voltage to each LED string to achieve the intended average current. An optimal feedback control scheme is proposed to maximize the duty cycles and minimize the bus voltage. As a result, at least one of the LED strings is operating at unity duty cycle. The analysis, implementation, and verification are detailed in this paper. [ABSTRACT FROM AUTHOR]

The five-level active neutral-point-clamped (5L-ANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead-time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven-segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead-time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods. Finally, the optimized SVPWM strategy is experimentally verified in this paper. [ABSTRACT FROM AUTHOR]

This paper presents the high-performance quasi-Z-source series resonant dc–dc converter as a candidate topology for the photovoltaic module-level power electronics applications. The converter features a wide input voltage and load regulation range thanks to the multimode operation, i.e., when the shoot-through pulse width modulation and phase-shift modulation are combined in a single switching stage to realize the boost and buck operating modes, respectively. Our experiments confirmed that the proposed converter is capable of ensuring ripple-free 400 V output voltage within the sixfold variation of the input voltage (from 10 to 60 V). The converter prototype assembled achieved a maximum efficiency of 97.4%, which includes the auxiliary power and control system losses. [ABSTRACT FROM AUTHOR]

This paper proposes a simplified instantaneous output power control to suppress the second harmonic dc-bus voltage due to asymmetry in a three-phase pulsewidth-modulated (PWM) converter system without any sequential component decomposers. Normally, in the instantaneous output power control, the positive and negative sequence output voltages and currents are required, and they are usually decomposed by notch filters or dual second-order generalized integrals that are difficult to tune and complicated. While in the proposed method, the positive-sequence and negative-sequence currents are regulated by PI plus resonant (PI-R) controllers in the dq frame. Therefore, the sequential current decomposers can be avoided. Meanwhile, the positive-sequence and negative-sequence output voltages, which are essential for calculating the positive-sequence and negative-sequence current references, are simply obtained from the outputs of the proportional−integral (PI) and resonant controllers, respectively. The proposed method is robust to any asymmetries and its effectiveness is verified on a prototype asymmetric three-phase permanent-magnet synchronous generator (PMSG) system with inherent and externally added asymmetries. [ABSTRACT FROM AUTHOR]

In this paper, a single-phase buck–boost matrix converter is proposed which can both buck and boost the input voltage with step-changed frequency. It consists of only six unidirectional current flowing bidirectional voltage blocking switches, two input and output filter capacitors, and one inductor. It has following advantages over the existing single-phase matrix converters: 1) it can both buck and boost input voltage solving the limited voltage transfer ratio (only boost or buck) problem; 2) it also has enhanced reliability as it is immune from shoot-through problem of voltage source when all switches are turned-on simultaneously, and, therefore, it has no need of PWM dead times and RC snubbers or dedicated soft-commutation strategies to solve the commutation problem; 3) it can also use high-speed power MOSFETs as their body diodes never conduct, which eliminate their poor reverse recovery problem. The operation principle of the proposed converter is given, and switching strategies are developed to obtain various multiples and submultiples of input frequency. To verify its performance, a laboratory prototype is fabricated and experiments are performed to produce step-down and step-up voltage with three different frequencies of 120, 60, and 30 Hz. [ABSTRACT FROM PUBLISHER]

Diode-assisted buck–boost voltage-source inverter achieves high voltage gain by introducing a switch-capacitor based high step-up dc–dc circuit between the dc source and inverter bridge. As for the unique structure, various pulse width modulation (PWM) strategies are developed with regard to the chopped intermediate dc-link voltage. In order to maximize voltage gain and increase efficiency, this paper proposes a novel PWM strategy. It regulates the average value of intermediate dc-link voltage in one switching time period ( Ts) the same as the instantaneous maximum value of three-phase line voltage by controlling the front boost circuit. Then, the equivalent switching frequency of power devices in the inverter bridge can be reduced to 1/3fs (fs = 1/Ts). The operating principle and closed-loop controller design are analyzed and verified by simulations and experiments. Compared with existing PWM strategies, the new control strategy demonstrates less power device requirement and higher efficiency in high voltage gain applications. It is a more competitive topology for wide range dc/ac voltage regulation in renewable energy applications. Furthermore, with new control strategy, the dc-side inductor current and capacitor voltage contains six-time line-frequency ripples. To overcome the undesired influence of low frequency ripples, it is also suitable for 400–800 Hz medium frequency aircraft and vessel power supply system. [ABSTRACT FROM PUBLISHER]

This paper investigates the problem of fluctuation of the neutral-point potential (NPP) in a three-level NPC inverter with a capacitor-voltage loop. The phase pulse width duty cycle disturbance pulse width modulation (PWM) method is proposed to suppress the NPP fluctuation efficiently. Based on the basic carrier-based phase-disposition PWM method, the average pulse neutral-point current model is established. Then, the frequency, amplitude, and equivalent initial phase of the NPP fluctuation are analyzed based on the current model. According to the alternating error of the dc-link capacitor voltages, a capacitor-voltage loop with a quasi-proportional resonant (PR) controller is presented. The control variable, which varies with the modulation index, phase current, load power factor, etc., can be obtained from the quasi-PR controller. Finally, an experimental three-level NPC inverter is described and the validity and feasibility of the proposed method are verified by experimental results. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) is very popular in medium-voltage applications, such as high-voltage direct current transmission, static Var generator, and motor drives. The arm capacitor voltage of MMC is usually constant and the output voltage is adjusted by regulating the pulse width modulation (PWM) index for switches in previous studies. In this paper, a novel flexible capacitor voltage control strategy for MMC as motor drives was proposed, with which the arm capacitor voltage was controlled flexibly according to the motor speed, by regulating the dc component and ac component of the PWM reference signal, and unsymmetrical control was used for the control of the upper arm and the lower arm in MMC. With the proposed control strategy, the circuit efficiency and the precision of the output voltage of the converter could be improved when the motor speed was low, and di/dt and d v/dt of the motor windings could be decreased. These proposals were implemented on a laboratory prototype, and experiments were carried out. The validity of the control strategy under both steady and dynamic states was verified. [ABSTRACT FROM AUTHOR]

Modular multilevel converter (MMC) is considered to be one of the most promising multilevel topologies from the medium- to high-voltage power applications. However, by reason of energy exchange between the dc side and ac side, the fluctuation of sub-module (SM) capacitor voltage for the MMC system is inevitable. Moreover, this fluctuation would deteriorate the total harmonic distortion (THD) of the output voltage. The influence of the fluctuation of the SM capacitor voltage on the output voltage is analyzed mathematically in detail. In this paper, an improved phase-shifted carrier (PSC) pulse width modulation (PWM) for the MMC is presented to suppress the influence of the fluctuation of SM capacitor voltage. This improved modulation can be regarded as a nonlinear compensation applied in the traditional PSC-PWM method. The THD of the output voltage is improved with this modulation method noticeably. Simulation and experiment results verify the effectiveness of the proposed modulation. [ABSTRACT FROM AUTHOR]

Electrical grid voltage sags are a significant industrial power quality concern. According to a survey result across the US, voltage sags and short-duration power outages are responsible for 92% of power quality problems faced by industrial customers. These power interruptions often impose severe cost penalties in plant shutdowns for many industries. A series compensation scheme for an induction motor is presented with inherent voltage sag ride through capability. The system utilizes a system of three-phase floating capacitor H-bridge converters located in each phase between the utility grid and a squirrel-cage induction motor. By injecting a series voltage in each phase, the proposed system can manipulate the voltage supplied to a motor, increasing its tolerance of grid voltage sags. The voltage injection scheme has an inherently leading grid power factor under steady state and, hence, generates VARs into the grid, over a wide range of load conditions. The paper develops mathematical analysis of the proposed system to quantify both the voltage sag ride-through and the reactive power generation that results. The analysis shows that voltage sag tolerance of the proposed system is closely related to the motor fundamental power factor. Moreover, it is found that unity power factor operation of the system, as seen from the grid, is possible and that the reactive power generation capability can also be accurately quantified. A 5-hp experimental testbed is used to validate both the grid voltage ride-through capability feature and the reactive power generation characteristics. [ABSTRACT FROM AUTHOR]

With increasing penetration of the renewable energy, the grid-tied PWM inverters need to take corresponding responsibilities for the security and stability of future grid, behaving like conventional rotational synchronous generator (RSG). Therefore, recognizing the inherent relationship and intrinsic differences between inverters and RSGs is essential for such target. By modeling the typical electromechanical transient of grid-tied PWM inverters, this paper first proves that PWM inverters and RSGs are similar in physical mechanism and equivalent in mathematical model, and the concept of static synchronous generator (SSG) is thereby developed. Furthermore, the comprehensive comparison between RSG and SSG is carried out in detail, and their inherent relation is built. Based on these findings, the rationality and feasibility of migrating the concepts, tools, and methods of RSG stability analysis to investigate the dynamic behaviors and stability issues of SSG is therefore confirmed. Taking stability issues as an example, the criteria of small signal and transient stability of a typical grid-tied PWM inverter is put forward to demonstrate the significance of the developed SSG model (including synchronizing coefficient, damping coefficient, inertia constant, and power-angle curve), providing clear physical interpretation on the dynamic characteristics and stability issues. The developed SSG model promotes grid-friendly integration of renewable energy to future grid and stimulates interdisciplinary research between power electronics and power system. [ABSTRACT FROM AUTHOR]

Four-level hybrid-clamped (4L-HC) inverter is a newly proposed topology which is suitable for high-performance medium-voltage drives. Each phase of this topology consists of eight switches and a flying capacitor and the dc-link is split into three parts by two neutral points. In order to ensure the topology operating properly, the voltages across the flying capacitors and three dc-link capacitors should be controlled and maintain balanced at their nominal values. This paper presents a decoupled voltage balancing method for this 4L-HC inverter, including the voltage balancing of dc-link capacitors and flying capacitors. A modified phase-shifted pulse-width modulation method is used to regulate the voltages of flying capacitors and the central dc-link capacitor. The relationship between the neutral-point currents and the output voltage is studied and the upper and lower dc-link capacitor voltages are balanced by injecting an optimum zero-sequence voltage. Simulation and experimental results are presented to verify the validity of this method. [ABSTRACT FROM AUTHOR]

This paper proposes a new circuit topology for a multilevel pulse width modulation (PWM) rectifier. The proposed method forms a new circuit by combining a diode clamp-type topology with a flying capacitor-type topology. The proposed circuit uses only 12 switches, despite the use of a five-level three-phase PWM rectifier. Further, the proposed circuit can obtain good performance, same as a conventional multilevel circuit. This paper describes about the features of the proposed topology; the control strategy and the loss analysis that is estimated by a circuit simulator. In addition, the basic operation of the proposed method is confirmed by simulation and experimental results. The proposed converter achieved total harmonic distortion of 3.4% for the input current and efficiency of 97.4% for a 1 kW class experimental setup. [ABSTRACT FROM AUTHOR]

The modeling, modulation, and control of the three-phase four-switch (TPFS) PWM rectifier are investigated in this paper. Three space vector pulse width modulation methods using different equivalent zero vectors are developed, where sector identification and the trigonometric function are not required. Then, the high-frequency model for the current ripple analysis is proposed, and the effects of three SVM approaches on the ac current ripple are investigated. According to the analytical results, the method introducing the smallest current ripple is selected. With the optimized SVM approach, a control-oriented model, considering the capacitor voltage oscillation and deviation, is built in the dq synchronous frame to facilitate the controller design. Furthermore, a control strategy implementing the proportional controller is developed to eliminate the capacitor voltage deviation. Meanwhile, the dual-loop control of the TPFS is not affected by the proposed strategy as the capacitor voltage deviation is eliminated. Finally, a novel linear modulation index function is defined to reject the low-frequency harmonic current introduced by the overmodulation. Experimental results demonstrate that excellent current performance is achieved with comprehensive considerations of the modeling, modulation, and control strategy. [ABSTRACT FROM AUTHOR]

In a single-phase grid-connected nanogrid system, a bidirectional ac–dc converter is usually required to transfer energy between the ac grid and a dc bus. Active ac power balancing is often implemented to prevent the ac grid ripple power from injecting into the dc bus. A four-phase-leg sinusoidal pulsewidth-modulation (SPWM) converter can readily provide power factor correction and active ac power balancing. In this paper, the use of three-phase-leg SPWM converters for achieving these functions is analyzed. A family of bidirectional single-phase ac–dc three-phase-leg SPWM converters with an ac storage capacitor for use in a nanogrid system is designed with a general control structure and a modulation scheme for minimizing the ac storage capacitance. The general control structure is designed to achieve a decoupled system of a power-factor-correction converter cascaded with an active ac power load at the dc bus. The decoupled system is developed based on decomposition to differential-mode and common-mode voltages. The modulation method involves an extra zero-sequence voltage injection derived from the three-phase-leg SPWM voltages without introducing higher order harmonic distortions. A significant reduction of the ac storage capacitance and an improvement of converter efficiency are achieved. The design and analysis are verified by simulations and experimental measurements. [ABSTRACT FROM AUTHOR]

Conventional three-phase rectifiers are controlled to achieve good power factor and low total harmonic distortion in the input. In the case of pulsating power loads, the fast dynamic response implies that the load pulses are reflected in the generator. These pulsating loads affect the lifetime operation of the generator, especially when it is not oversized (as in the case of aircraft applications). In order to smooth the power demanded from the generator, it is preferable to reduce the bandwidth of the output voltage controller for the rectifier but it affects its stability due to the fact that the right-half-plane (RHP) pole given by the negative impedance of a constant power load requires high-bandwidth control loop to compensate it. In this paper, an energy control method is proposed that utilizes the energy stored in the output capacitor of the rectifier to control the output voltage of the rectifier. In such a way, the minimum bandwidth restriction imposed by the RHP pole of the power load is eliminated and the bandwidth of the voltage loop can be defined low enough to demand smooth power from the generator. [ABSTRACT FROM PUBLISHER]