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A variable switching frequency space vector modulation control method is proposed in this paper. It is used to achieve zero-voltage switching (ZVS) for two parallel 180° interleaved three-phase grid-connected voltage-source inverters at unity power factor. A wide range of ZVS can be achieved without any additional sensor, auxiliary circuit, or current zero-crossing detection circuit. The carrier wave frequency is easy to be calculated and updated with digital control. The current ripple is precisely predicted and controlled to minimize unnecessary circulation loss. The high current ripple at the inverter side can be considerably canceled by the parallel interleaved configuration. LCL filter is used to further attenuate the current ripple and improve the power quality at the grid side. The switching loss can be significantly reduced especially by using a wide bandgap device with low turn-off loss. The power density is greatly improved owing to the high switching frequency and low component parameters of the filter. A 4.5-kW simulation and experimental prototype interfacing 400 V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In more electric aircraft (MEA), three-phase power factor correction (PFC) rectifiers of several kilowatts are required. In this paper, a three-phase buck–boost derived PFC converter with three switches and with input inductors connected in delta configuration for use in MEA is presented. The proposed converter is operated in a discontinuous conduction mode to achieve PFC at ac input. This avoids the inner current control loop which further eliminates the current sensors. It requires only one output voltage sensor unlike five sensors in conventional PFC converter for its control implementation. This makes the system cost effective, more reliable, and robust. A simple voltage control loop is used to generate the gate signals. The steady state operation of the converter and detailed design calculations are presented. For each power component, the analytical expressions for calculating the average and rms current ratings are derived to facilitate the converter design. The small-signal model of the converter is presented to aid the controller design. The experimental results from a 2 kW laboratory prototype are presented to confirm the operation of the proposed converter. An input power factor of 0.999, an input current total harmonic distortion of as low as 2.76%, and a high conversion efficiency of 96% are achieved from the prototype. [ABSTRACT FROM AUTHOR]

High step-down dc/dc converters are widely utilized in telecom and modern industrial applications. Due to the high step-down ratio, conventional Buck converter cannot provide satisfactory performance. To solve this problem, quite a few new topologies have been proposed to improve the performance of high step-down dc/dc converters, such as series-capacitor Buck (SC-Buck) converter, 3-level Buck converters, tapped inductor Buck converters, and LLC resonant converters. In this paper, the twice step-down benefit of SC-Buck converter and the zero-voltage switching benefit of series-capacitor tapped Buck (SC-TaB) converter are combined together to propose a new topology: interleaved series-capacitor tapped Buck (ISC-TaB) converter. To analyze the performance of the proposed ISC-TaB converter, the operation principles are discussed and the voltage conversion ratio is derived. In addition, to guide the design procedure and optimization, the current waveforms and voltage waveforms of the proposed ISC-TaB are derived. In order to verify the performance of the proposed ISC-TaB, hardware prototype of the proposed ISC-TaB converter and conventional two-phase series-capacitor tapped Buck converter (2ph-TaB) are designed and tested. The application is targeted at telecom with 48-V input and 3.3 V/20 A output. The test results are compared between these two converters. A peak efficiency of 95.6% is achieved on the proposed ISC-TaB and the efficiency of the ISC-TaB over all load range is at least 1% higher than that of 2ph-TaB. [ABSTRACT FROM AUTHOR]

The momentum toward high power density high-efficiency power converters continues unabated. The key to reducing the size of power converters is high-frequency operation and the bottleneck is the magnetic components. With the emerging widebandgap devices, the switching frequency of power converters increases significantly, to hundreds of kilohertz, which provides us the opportunity to adopt printed circuit board (PCB) winding planar magnetics. Compared with the conventional litz-wire-based magnetics, planar magnetics can not only effectively reduce the converter size, but also offer improved reliability through automated manufacturing process with repeatable parasitics. Another way to reduce the number of magnetic components and shrink the size of power converters is through the magnetic integration. In this paper, a novel PCB winding based magnetic structure is proposed to integrate both inductor and transformer into one component. In this structure, the inductor value can be easily controlled by changing the cross-sectional area of the core or the length of the air gap. A 6.6-kW 500-kHz CLLC resonant converter prototype with 98% efficiency and 130-W/in3 (8 kW/L) power density is built to verify the feasibility of the proposed PCB winding based magnetic structure. [ABSTRACT FROM AUTHOR]

This paper proposes a new interleaved high step-up converter with coupled inductors. Interleaving configuration is employed at the input side to reduce the input current ripple and increase the power level. The series structure at the output side helps achieve a very high step-up voltage gain. Also, the proposed converter has very low switch voltage stress; thus, switching loss can be reduced and low-voltage-rating mosfets with small on resistance are allowed to lower the conduction loss. Due to the passive clamp performance, the leakage energy of the coupled inductors can be recycled and large voltage spikes across the switches are alleviated. Furthermore, with the aid of the leakage inductances, zero-current switching of the active switches can be achieved and the reverse recovery problem of the diodes is alleviated. The operating principles, performance analysis, and design considerations of the proposed converter are discussed. A prototype with 20-V input and 400-V output is built, and experimental results are provided to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

The widespread use of electronic devices increases the need for compact power factor corrected power supplies. This paper describes an isolated power factor corrected power supply that utilizes the leakage inductance of the isolation transformer to provide boost inductor functionality. The bulk capacitor is in the isolated part of the power supply allowing for controlled startup without dedicated surge limiting components. A control method based on switch timing and input/output voltage measurements is developed to jointly achieve voltage regulation and input power factor control. A prototype design is implemented with detailed measurements and waveforms shown to confirm the desired functionality. [ABSTRACT FROM AUTHOR]

In this paper, a variable switching frequency space vector pulsewidth modulation control is proposed. It is used to achieve zero voltage switching (ZVS) for a three-phase grid-connected voltage source inverter with unity power factor. A wide range of ZVS can be realized without any additional sensors, auxiliary circuits, or current zero crossing detection circuits. The switching frequency can be easily calculated by a digital controller. The frequency variation range in a line cycle is only about 1.5 times at any specific load. An LCL filter is used to attenuate the high current ripples at the inverter side, and active damping is adopted to avoid the resonance and reduce the filter power loss. The switching loss can be significantly reduced by using silicon carbide mosfets so that the conversion efficiency is high. The power density can also be improved due to the high switching frequency and the low inductance value of the filter. The operating principle, design considerations, and loss analyses are discussed in detail. A 3.5-kW simulation and experimental prototype interfacing a 350–400-V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In this paper, a coupled-inductor-based LCC resonant converter with the primary-parallel–secondary-series (PPSS) configuration is proposed to achieve output-voltage sharing ability for HV generator applications. The PPSS configuration of the LCC resonant converter with the voltage multipliers is introduced to achieve high output-voltage and increase the output-power level. However, the variations of the magnetizing inductance, leakage inductance, and winding capacitance of the HV transformer and voltage multiplier impact on the output-voltage sharing performance. Subsequently, the resonant inductors in the primary side of the conventional LCC resonant converters with the PPSS configuration are coupled to achieve the output-voltage sharing without any additional circuits and control efforts. Furthermore, an analytical equivalent circuit model considering the magnetizing inductor of the HV transformer is derived to analyze the output-voltage sharing ability. Moreover, the design method for the coupled inductors considering the output-voltage sharing performance affected by the leakage inductance of the coupled inductors is presented. Finally, the output-voltage sharing performance of the proposed coupled-inductor-based LCC resonant converter with the PPSS configuration is validated by the experimental results of a 50-V input, 5-kV output 100-W prototype. The prototype experimental results show that the unbalance voltage degree decreases from 67.7% to 8.5% with the utilization of the coupled inductor. [ABSTRACT FROM AUTHOR]

A component-minimized and low-voltage-stress single-phase power factor correction rectifier without electrolytic capacitor is proposed in this paper. Component minimization is achieved by embedding an active pulsating-power-buffering (PPB) function within each switching period, such that typical add-on power electronic circuits for PPB are no longer needed. Additionally, with a three-level flying-capacitor configuration, the voltage stresses of switching devices can be reduced more than 50% as compared to existing solutions that are based on embedded PPB. The relationship between the inductance requirement and the patterns of the modulation carriers, and how it can be utilized to minimize the magnetics of the rectifier, is also discussed. A 110 W hardware prototype is designed and tested to demonstrate the feasibilities of the proposed rectifier. An input power factor of more than 0.97, peak efficiency of 95.1%, and an output voltage ripple of less than 4.3% across a wide load range have been experimentally obtained. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

Many research works have been conducted on increasing the efficiency of interleaved boost converters (IBCs) applied for power factor correction (PFC) by using high-performance power electronic devices and soft switching circuits, which are not helpful in reducing the hardware cost and systematic complexity. In this paper, three intrinsic parameters affecting the efficiency of IBC PFC are found and analyzed, including the switching frequency value, boost inductor value, and output voltage value. Based on the findings, considering the limitations of current ripples, power factor, maximum magnetic flux density, and volume of a boost inductor, an optimization design method for high-efficiency IBC PFC is proposed. A 3.3-kW IBC PFC prototype is developed based on Si devices. The experimental result verifies that the proposed method can improve the efficiency of IBC PFC with low-cost low-performance devices in the full-load range. [ABSTRACT FROM AUTHOR]

This paper investigates the magnetic field immunity and near magnetic field reduction for different inductor-winding structures. A double-twisted winding structure, which includes two magnetic cores, is proposed for common mode (CM) inductors. The proposed CM inductor can achieve much lower near magnetic field emission, much better magnetic field immunity against the external magnetic field, and much bigger differential mode (DM) impedance than conventional winding structures. The proposed inductor structures are good for high power-density applications. Theoretical analysis, magnetic three-dimensional simulations and experiments were conducted to validate the developed theory and technique. [ABSTRACT FROM AUTHOR]

This paper presents an output-series connected dual active bridge (DAB) converter for efficient zero-voltage switching (ZVS) by employing dual auxiliary LC networks in high-output voltage applications. The dual auxiliary LC networks are integrated into the converter for ZVS throughout full load range. The gate signals of the output side switches can control the current in the LC networks. By analyzing the working modes of the converter, the modulation trajectory is designed in terms of the boundaries of the ZVS range. The conduction loss caused by the auxiliary LC networks is adjusted according to the voltage and load power. The modulation scheme can achieve seamless transition between the adjacent working modes. The conduction loss of the proposed converter is compared with the conventional output-series DAB converter. Although the conduction loss is increased under light loads, all the switches can achieve ZVS. The reduced switching loss can improve the overall efficiency. Finally, a 1.3 kW experimental prototype was built to verify the effectiveness of the proposed converter and the modulation scheme, which demonstrates the ZVS performance and efficiency improvement. [ABSTRACT FROM AUTHOR]

This paper presents a new class of switched tank converters (abbreviated as STCs) for high-efficiency high-density nonisolated dc–dc applications where large voltage step down (up) ratios are required. Distinguished from switched capacitor converters, the STCs uniquely employ LC resonant tanks to partially replace the flying capacitors for energy transfer. Full soft charging, soft switching, and minimal device voltage stresses are achieved under all operating conditions. The STCs feature very high efficiency, power density, and robustness against component nonidealities over a wide range of operating conditions. Furthermore, thanks to the full resonant operation, multiple STCs can operate in parallel with inherent droop current sharing, offering the best scalability and control simplicity. These attributes make STC a disruptive and robust technology viable for industry's high volume adoption. A novel equivalent DCX building block principle is introduced to simplify the analysis of STC. A 98.9% efficiency STC product evaluation board (4-to-1, 650 W) has been developed and demonstrated for the next-generation of 48-V bus conversion for data center servers. [ABSTRACT FROM AUTHOR]

In a power electronics system, an electrolytic capacitor (E-Cap) is widely used, whose performance degradation can be reflected by the change of capacitance (C) and equivalent series resistance (ESR). This paper proposes a new online C and ESR monitoring scheme for the output electrolytic capacitor in a discontinuous conduction mode (DCM) flyback converter. The mathematical relationship between the instantaneous capacitor voltage and other parameters is analyzed and then the scheme of undetermined coefficients based on the multiple-spot sampling and least square method is further proposed. In addition, considering the particularity of high ripple current and the resultant voltage ripple variation range, especially with the temperature, an inverse ripple voltage isolation amplifier with variable amplification factor and negative voltage elimination is put forward so as to make digital signal processor identify the temperature change easily. The proposed scheme is noninvasive as only voltage signals need to be sampled and no current sensor is necessary. A prototype is built and the experiments are made to verify the effectiveness of the proposed method, from which the data are in accordance with the results measured by an LCR meter. [ABSTRACT FROM AUTHOR]

Core loss estimation of filter inductors is increasingly important for modeling and optimizing high-frequency, high-efficiency, and high-density pulsewidth modulation (PWM) power electronic converters. However, data provided by inductor core manufacturers are insufficient for core loss estimation in PWM converters, particularly in the case of customized gapped inductors. This paper presents a whole process of characterizing and estimating the core loss of a customized high-current gapped inductor for PWM converters. To excite the inductor for the B–H loop measurement, a test circuit formed by a half-bridge structure is proposed, which has the ability to compensate the asymmetric rectangular voltage on the inductor caused by the device voltage drops. To overcome the other challenges raised by a high excitation current, a refined discontinuous test procedure, triple pulse test, is proposed to reduce the requirements of the high-current test setup (thermal stress, current–time stress for current probes, capacity of dc sources, etc.). For practical purposes, a user-friendly loss map approach is proposed involving only time-domain and electrical variables to replace magnetic variables to enable the straightforward loss mapping process and core loss calculations. Presented experimental results show consistency between the estimated inductor loss and measured values. Overall, the proposed testing approach can be easily implemented on the user's side to develop a loss map of a given inductor. The established core loss map enables the users to accurately and rapidly estimate the core loss of a tested inductor for given PWM waveforms. [ABSTRACT FROM AUTHOR]

Although SiC-mosfet has significant advantages on switching performance over traditional Si-IGBT, the switching loss of SiC-mosfet devices at hard switching rises quickly with the increment in the switching frequency. This has narrowed down further possibilities of improving efficiency and power density of the grid inverter. Zero-voltage-switching (ZVS) space-vector-modulation (SVM) technique is introduced to further push the power density of SiC-mosfet inverter. This paper focuses on the impact of applying the ZVS-SVM to three-phase two-level SiC-mosfet inverter. With the same efficiency requirement the ZVS-SVM SiC inverter can operate at a much higher switching frequency, which gives the opportunity to further reduce the size of passive components. The loss distributions, conversion efficiencies, and volumes of passive components of both a 20-kW SiC-mosfet hard-switching inverter and a 20-kW SiC-mosfet ZVS-SVM inverter have been compared under switching-frequency range from 50 to 300 kHz. Meanwhile, a new metric called “efficiency stiffness” is proposed to compare different inverters with respect to the efficiency performance against switching-frequency characteristics. In addition, high voltage overshoot of SiC-mosfet and high thermal stress of resonant inductor are the two critical issues in the SiC-mosfet ZVS-SVM inverter with high switching frequency. A power module including seven SiC-mosfet bare dies with low stray inductance is designed for ZVS-SVM inverter instead of the existing seven discrete TO-247 package SiC-mosfets to reduce the voltage overshoots on the switches. Besides, to reduce the power loss of the resonant inductor caused by large amplitude of current at hundreds of kHz excitation frequency, design of the inductor with distributed air gap and optimal winding thickness are studied. A 20-kW SiC-mosfet ZVS-SVM grid inverter prototype is built to verify the proposed design. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

The grounding of low-frequency distribution transformers is a critical concern that ensures the proper operation and protection of the distribution system. The power electronic transformer (PET), as a future alternative low-frequency distribution transformer, also needs grounding. This paper studies PET operation with arc-suppression-coil (ASC) grounding in the Y-connected medium-voltage (MV) stage, focusing on the following two aspects. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dynamic ramp valley control in a current-mode adaptive on-time controller for the on-chip buck converter. It improves the system stability and reduces the output voltage under the load-dump. The proposed novel dynamic ramp valley control uses a sample and hold circuit, a comparator, and a ramp valley control to avoid the generation of an erroneous pulse signal while regulating the output voltage under the load-dump. Finally, a buck converter with 12 to 19 V input voltage range and 1.05 V output voltage with the novel dynamic ramp valley control is implemented in an integrated circuit. Based on the hardware experimental results, the output voltage under the load-dump with and without the proposed dynamic ramp valley control is 156 and 224 mV, respectively. Thus, the output voltage with the proposed dynamic ramp valley control is lower by 68 mV than that without the proposed dynamic ramp valley control, avoiding the potential damage of the output load, moreover, this performance has been verified with the SIMPLIS simulation and hardware experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a developed structure is proposed for high step-up nonisolated noncoupled inductor based multiport dc–dc converters. The voltage gain per number of devices of the proposed topology is higher than that of similar topologies. This means that, by using the same number of devices, the proposed topology can generate higher gains than other structures. In other words, the proposed topology utilizes less number of devices for producing the same voltage gain, which leads to less total cost, size, weight, and complexity. Despite high voltage gain, the normalized peak inverse voltage (NPIV) on switches/diodes is low. Higher number of input ports leads to higher gains and lower NPIVs on devices. The load energy can be absorbed and stored in first input unit. Modularity, simple structure, continuous input currents, and low input current ripple are the other profits of proposed topology. Low/medium power applications are suggested for the proposed structure. Proposed topology has been explained and operational modes along with steady-state analysis have been discussed. For better verification, the proposed topology has been compared with several multiport high gain converters. Comparison results confirm the advantages of the proposed topology. Finally, the proper performance of the proposed topology has been validated by experimental results. [ABSTRACT FROM AUTHOR]

Flyback converter has advantages of simple circuit configuration and easy control. However, it suffers two problems. One is the active switch is hard switching. The other is a very high voltage spike when the active switch is turned off. In order to solve these problems, this paper presents a novel dc-to-dc converter that mainly consists of two interleaved flyback converters. Both active switches can achieve zero-voltage switching on without the use of any active clamp circuit or snubber circuit. In addition, the leakage flux energy can be delivered to the output by using two added diodes. It helps to reduce the voltage spikes on the active switches and improve circuit efficiency. The steady-state analyses at different operation modes and the mathematical equations for parameters design are provided. Finally, a 200-W prototype circuit for driving high-brightness light-emitting diodes (LEDs) is built and tested to verify the feasibility of the proposed circuit. The LEDs are dimmed from 100% to 10% full power. Satisfactory performances are obtained from the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a dual-capacitor-inductor-transformer (CLT) (D-CLT) soft-switching dc–dc converter has been proposed. Combining the multiresonant technology, the converter employs two high-frequency transformers in the resonant tank and exhibits desirable characteristics. The fundamental and the third-order harmonics can be utilized to transfer active power simultaneously. The share of third harmonic is larger than first component. Thus, the converter can use the 100-kHz controlling signals to mainly transfer the 300-kHz active power, which makes it easier to realize high power density. Moreover, the available range for the third power delivery is expanded as well. A resonant zero point is introduced into the voltage gain curves. It ensures broadened voltage gain range (from zero to the maximum) and good protection for overcurrent issue. Then, improved soft-switching performances have been achieved: All the switches achieve the zero-voltage-switching (ZVS) turn-on, whereas all the diodes obtain the zero-current-switching (ZCS) turn-on and quasi-ZCS turn-off. Switching losses are constrained to the minimum. To verify the feasibility of the proposed converter, a 330-W prototype is established and tested. The results demonstrate the experiments match well with the theoretical analyses. The peak efficiency has reached 95.2%, although a high-loss diode bridge is adopted. [ABSTRACT FROM AUTHOR]

Three-phase dual active bridge (DAB) topology is a potential alternative for high-power applications when a compact and efficient converter with a bidirectional power transfer capability is desired. In a constructed prototype, high-power SiC modules with dedicated drivers are utilized to achieve high-efficiency and compact size. Each module has two interconnected switches with anti-parallel diodes resembling a converter leg. It is observed that the driver halts the module operation as a result of protective actions such as overcurrent, gate undervoltage, or gate overvoltage. In this frozen leg mode, the module operates as a leg with two diodes until an external hardware signal resets the driver. The converter continues operation but with a reduced performance. Analysis, simulation, and verification of a three-phase DAB converter under a frozen leg operation are considered in this paper. The converter with a frozen leg has two different behaviors at light loads and heavy loads. Consequently, two different analysis methods are developed to solve converter operation in different load conditions. Results show that the power transfer capability is reduced, but this fault mode is nondestructive. [ABSTRACT FROM AUTHOR]

This paper proposes a control for a single-phase grid-tied inverter operating in both continuous current mode (CCM) and discontinuous current mode (DCM) to minimize inductors without worsening a current total harmonic distortion (THD). In a conventional CCM/DCM control, an inductance is required in a DCM nonlinearity compensation; consequently, the control becomes inductance-dependent. In the proposed control, a duty ratio at a previous calculation period is utilized to compensate for the DCM nonlinearity and detect current modes independently from the inductance. A 4-kW 100-kHz prototype of the inverter with two designs of the inductor is realized to confirm the effectiveness of the proposed control. When the inductor impedance, which is normalized by an inverter impedance, is reduced from 1.8% to 0.5%, volume and material cost of the inductor are reduced by 51% and 62%, respectively, whereas the loss at a light load of 0.1 p.u. is reduced by 35%. However, due to this inductor minimization, the current THD at a rated load increases from 2.3% to 8.7% with the conventional control, violating the grid current harmonic constraint regulated by standard IEEE-1547. The proposed CCM/DCM control reduces the current THD from 8.7% to 2.1%, enabling the inductor minimization and satisfies the grid standard. [ABSTRACT FROM AUTHOR]

Due to the lack of electrical isolation, the leakage current is one of the most important issues for transformerless photovoltaic (PV) systems. In this paper, a new modulation strategy is proposed to reduce the leakage current for a Z-source four-leg transformerless PV inverter. First, the common-mode loop model is presented. And then the common mode voltage behavior and the effect of factors on the leakage current are discussed. A new modulation strategy is proposed to achieve the step-up function and constant common mode voltage. Therefore, the leakage current can be suppressed effectively. Finally, the proposed strategy is digitally implemented and tested on the TMS320F28335 DSP and XC3S400 FPGA controlled hardware platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

The LC resonance between the line inductor and the dc-link film capacitor is an important concern in the reduced dc-link capacitance interior permanent magnet synchronous motor drive system. In this paper, an active damping method based on the virtual damping resistor is applied to suppress the LC resonance and improve the drive system stability. The performance of the damping resistor is analyzed in a systematic level, and possible configurations have been analyzed to obtain the optimal solution, which is proved to be the inductor current feedback (ICF) damping method. In order to realize the equivalent damping effect, the dc-link voltage feedback is applied to emulate the ICF-based active damping method by a step-by-step approach. Meanwhile, the grid voltage distortion will stimulate additional harmonics of the grid current in the reduced dc-link capacitance motor drives. Hence a feedforward compensation method is applied to suppress the grid current distortion arising from the distorted grid voltage, which has not been investigated in the previous related researches. Harmonics of the grid current are reduced and requirements of EN61000-3-2 can be satisfied by applying the proposed method. Experiments on a compressor drive platform equipped with the reduced dc-link capacitance are performed to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Electromagnetic interference filters are broadly used in power electronic systems in order to respect electromagnetic compatibility normative constraints, which considerably increase overall cost and volume mainly because of the common-mode (CM) inductor. In this paper, a new method to calculate the optimal volume of the CM inductor is proposed. It takes into account core saturation issues that may greatly impact inductor volume and filter performances. Consequently, it is shown that in some cases, increasing the inductance value up to the best value can significantly reduce the filter volume in addition to further enhancing the filter attenuation. It is also shown that different nearly-best inductor geometrical parameters with different shape factors can be obtained, which provides an important degree of freedom to designers while introducing the filter in the energy conversion system. [ABSTRACT FROM AUTHOR]

This paper presents a new dc/ac inverter for low-power applications (i.e., high-voltage, low-current applications), which offers soft switching of the power semiconductors and low output current ripple. In the proposed power circuitry, a novel ripple steering approach is used that can provide soft switching for the power semiconductors and significantly attenuate the high-frequency current ripple of the inverter. The proposed ripple steering technique utilizes the switching frequency and the duty cycle in order to perform the aforementioned tasks. Basically, the ripple steering technique steers the energy of the ripple to the output capacitances of the power semiconductors in order to provide the soft-switching condition. Theoretical analysis, simulation results, and experimental results verify the feasibility of the proposed technique and demonstrate the superior performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

A split-core technique is proposed to mitigate the gap losses in high-frequency nanocrystalline cores, which enables significant size reductions in thermally limited designs. Finite element analysis is used to examine the gap loss dependence on core width D revealing a nonlinear relationship of the form loss ∝ $D^{\alpha }$. α is approximately constant for frequencies of 10–200 kHz over the range of core widths typically used in power electronics, but α increases with gap length. Splitting the core into a number of subcores can therefore provide significant reductions in gap loss, especially with larger gap lengths. The results from a 300-A (peak), 200-A (continuous) inductor show that with three subcores and a gap length of 4 mm, the gap losses are reduced by 50%, and the hot-spot temperature is reduced by 24.5 °C. Using the technique it is estimated that the original inductor weight could be reduced by 40% with four split cores, making a significant impact on converter power density. [ABSTRACT FROM AUTHOR]

This paper proposes a new bidirectional buck–boost converter, which is a key component in a photovoltaic and energy storage system (ESS). Conventional bidirectional buck–boost converters for ESSs operate in discontinuous conduction mode (DCM) to achieve zero-voltage switching turn-on for switches. However, operation in DCM causes high ripples in the output voltage and current, as well as low power-conversion efficiency. To improve the performance of the conventional converter, the proposed converter has a new combined structure of a cascaded buck–boost converter and an auxiliary capacitor. The combined structure of the proposed converter reduces the output current ripple by providing a current path and the efficiency is increased. A prototype was built and tested to verify the effectiveness of the converter. The proposed converter has a maximum efficiency of 98%, less than ${\text{5.14}}{\ \text{V}}_{{\text{p.p}}}$ of output voltage ripple, and less than ${\text{7.12}}{\ \text{A}}_{{\text{p.p}}}$ of output current ripple. These results were obtained at an input voltage of 160 V, switching frequency of 45 kHz, output voltage of 80–320 V, and output power of 16–160 W. The experimental results show that the proposed converter has improved performance compared to the conventional converter. [ABSTRACT FROM AUTHOR]

This paper presents a modular multilevel series/parallel converter (MMSPC) with intermodule switched-inductor power transfer. The switched-inductor voltage conversion feature allows controllable and efficient transfer of energy between modules with nonnegligible voltage difference, providing both step-down and step-up functionalities. Thus, this converter can accurately control and rapidly adjust the voltage of each module to generate an ac output voltage waveform with a controllable number of levels, increasing the quality of the output. Moreover, the intrinsic dc–dc conversion feature can generate a dc controllable output voltage and enable new applications. In this text, we specifically demonstrate how the flexibility of obtaining both ac and dc output with the same setup renders the topology promising for battery energy storage systems and dc microgrid applications. Experimental results validate the topology and concept of an MMSPC with intrinsic switched-inductor conversion. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

This paper presents a new interleaved active clamp forward converter for low and wide input, and high current output applications. In the proposed converter, the operating duty ratio can be extended over 0.5 due to the additional powering path resulting from additional series-connected secondary windings from each transformer. As a result, the proposed converter can be designed with large transformer turns ratio. Thus, since the proposed converter can reduce not only the primary RMS current but also switch turn-off current, it can achieve high efficiency. Moreover, since all secondary switches can operate without floating gate drivers, the proposed converter can maintain simple structure and low complexity of gate driving circuits in the secondary side. The validity of this proposed converter is verified by the experimental results from 36V–72 V input and 12 V/500 W output for the dc/dc prototype. [ABSTRACT FROM AUTHOR]

In the traditional energy storage systems consisting of series-connected energy storage cells such as electric double-layer capacitors (EDLCs), not only a bidirectional pulsewidth modulation (PWM) converter but also a cell voltage equalizer is required. The system is prone to complexity as two converters (i.e., the bidirectional converter and cell voltage equalizer) are separately necessary. This paper proposes the transformerless bidirectional PWM converter integrating the voltage multiplier-based cell voltage equalizer. An inductor in a conventional bidirectional PWM converter is replaced with series-connected inductors in the proposed converter in order to generate square-wave voltage with an arbitrary amplitude, by which the voltage multiplier is driven. The charge–discharge cycling test for nine EDLCs connected in series was performed using the proposed integrated converter from a voltage-imbalanced condition. The voltage imbalance was gradually eliminated during charge–discharge cycling, demonstrating the integrated functions. [ABSTRACT FROM AUTHOR]

This paper explores the use of the flying-capacitor multilevel (FCML) topology in high step-up conversion. Compared to the conventional two-level boost converter, the FCML topology utilizes high energy density capacitors to facilitate inductors with storing and transferring energy during the conversion process, which brings features, such as lower voltage stress on the switches, reduced voltage stress on the inductor, and high effective switching frequency at the switching node. As a result, the total volume of the passive components in the converter is greatly reduced while maintaining high efficiency at high voltage gain. To demonstrate the potential high power density and high efficiency, a hardware prototype that converts 100 V to 1 kV with 820-W maximum output power is built. Such specifications require careful optimizations in many aspects of the converter to ensure a high power density and efficiency design. The implemented solutions and associate design process are presented in detail, with comparison with other state-of-the-art solutions. The hardware prototype has successfully demonstrated a peak efficiency of 94.1%, and 329 W/in $^3$ (20 W/cm $^3$) overall power density. [ABSTRACT FROM AUTHOR]

Energy balancing of the alternate arm converter (AAC) is a major challenge and overlap period-based circulating current control methods are commonly used. Component parameter variation occurs due to tolerances, component aging, and internal faults leading to stored energy imbalances of modular voltage source converter (VSC) topologies. If not controlled, such variations can severely impact the operation of the AAC. Hence, component parameter variation is a key consideration for energy balancing of all sorts of modular VSC topologies, but has not been addressed in the existing literature for the AAC. This paper investigates the energy balancing capability of the AAC in high-voltage direct current (HVDC) applications under component parameter variations and proposes a compensation method to further improve its energy balancing performance. The effectiveness of the proposed method is verified in a real-time model of an AAC-HVDC transmission system from widely accepted existing CIGRE benchmark models. [ABSTRACT FROM AUTHOR]

In this paper, a nonisolated buck-boost single-inductor multiple-output (SIMO) dc–ac inverter for driving multiple independent high-frequency ac outputs of medium power is proposed. Compared with traditional bridge-type inverters, the proposed buck-boost SIMO inverter achieves 1) a smaller component count, 2) fully independent power control of its outputs, 3) better scalability in increasing the number of ac output channels, and 4) higher power efficiency. Operating in pseudo-continuous conduction mode, the rated power of each output channel of this inverter can be high while attaining zero cross regulation. The scalability factor of the proposed inverter is formally investigated and the theoretical maximum number of ac outputs is analytically derived. The targeted application of this SIMO-based inverter is for driving multiple transmitter coils to realize versatile multidevice medium-power wireless power transfer. A hardware prototype of a single-inductor three-output buck-boost inverter delivering a medium power of 8.4 W per output channel has been constructed. It is experimentally verified that precise and independent current regulation of individual transmitter coil is achievable with the proposed inverter. [ABSTRACT FROM AUTHOR]

The paper presents a new transformerless single-phase single-stage buck–boost grid-connected voltage source inverter (VSI) topology. The topology can achieve efficient power conversion with a wide input voltage range, number of magnetic devices reduction and low leakage current. The proposed VSI topology consists of high frequency semiconductors for shaping inductor currents, and low frequency semiconductors to form grid CL filter structure for different conditions. This CL filter uses the same buck–boost inductor, thus no additional line frequency inductor is required. Besides, common mode voltage, a main problem of transformerless grid-connected VSI, is mitigated, since the capacitor in the CL filter clamps the voltage between the grid and the bus terminal. The performance of the proposed VSI is experimentally verified. The results show that the proposed VSI guarantees sinusoidal output current and wide input voltage range, and has a good agreement with the theoretical findings. [ABSTRACT FROM AUTHOR]

This paper presents three nonisolated high voltage gain dc–dc converters with ripple-free input current. The proposed converters combine coupled inductors and voltage-doubler structure (VDS) to achieve high step-up of input voltage. An active clamp circuit is used to suppress voltage spike of the switch caused by of the leakage inductor of the coupled inductor. VDS is placed in the secondary winding of the coupled inductor that clamps the diodes voltage stress. Working principle and design methodology of the proposed converters are presented in detail. Experimental results for a 300 W laboratory prototype, 48 V input voltage, and regulated output voltage of 400 V, are shown to validate the operation of proposed converters. [ABSTRACT FROM AUTHOR]

A high-performance impedance-source converter utilizing switched inductor is proposed in this paper, which can be adopted in the applications demanding high-voltage conversion. The proposed converter not only retains the advantage of quasi-Z-source of sharing common ground between the input and output but also possesses the superiorities of enhanced boost ability and lower stresses as well as higher efficiency. Mathematical analysis of the converter and its performance comparison with other converters are presented in detail. Finally, a 100 W prototype is built and the experimental results are provided to verify the feasibility of the proposed converter. [ABSTRACT FROM AUTHOR]

The ultra-high voltage gain dc–dc converters are extremely required because of the low voltage level of many nonpolluting power resources. This paper proposes an ultra-high voltage gain converter based on an interleave technique and using three-winding coupled inductor and voltage multiplier cell. The interleave technique is useful for reducing the size of the filter components. In the proposed converter, high voltage gain is achieved without extreme duty cycle of solid-state switches. The voltage stress across the semiconductor devices can be reduced by increasing the turn ratio of the secondary of the coupled inductors. In addition, because of the implementation of the interleave structure, peak-to-peak variation of the main input current and switching losses are substantially reduced. The steady-state principles of the proposed converter in continuous conduction mode operation are given. Also, design equations are presented. Validity and performance of the proposed converter are surveyed by simulation and experimental results of a 120 W prototype. [ABSTRACT FROM AUTHOR]

DC fault current limitation is important for the low-voltage dc distribution network, because the existing dc selective protection cannot act fast enough. However, the typical dc fault current limiting method—installing dc reactors directly in the dc system—will lead to negative influence on the system normal operation and dc circuit breaker (DCCB) fast isolation. This paper proposed a novel solid-state circuit breaker (SSCB) with self-adapt fault current limiting capability, namely, no negative influence on the dc distribution network normal operation, swift fault current limiting response to the dc fault, and efficient cooperation between the fault current limitation and isolation. The hybrid configuration strategy of the proposed SSCB and mechanical DCCB for multiterminal dc distribution network is proposed to reduce the conducting power loss and investment from the scale of the whole system. Finally, the experiment tests and simulation cases are carried out to verify the working principle and superiorities of the proposed SSCB. [ABSTRACT FROM AUTHOR]

This paper proposes a high-frequency dc–dc converter with a synchronous rectifier (SR), which is suitable for the low-voltage output application. The proposed topology consisting of a Class Φ2 inverter and a synchronous Class E current-driven rectifier features low switch voltage stress, fast transient response, and high efficiency. First, the analysis and design method of the converter are presented. Concerning the coupling of amplitude and phase of the fundamental voltage and current in the rectifier stage, the duty cycle of the switch is considered in the proposed design method. For the design of the inverter stage, the impedance of the resonant tank across the main mosfet is utilized in the design process. Second, a self-oscillating resonant driver with dc bias voltage is proposed for the SR switch and features low component count and low driving power loss. A prototype with 12 V input and 5 V/10 W output was built to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Even though multipulse rectifiers (MRs) are a long established and well-known technology, still their behavior is not fully described in the literature when they are fed by three-phase balanced sinusoidal currents sources. To address the aforementioned gap, this paper presents the operation and properties of current-fed MRs. The undertaken aim is achieved by analyzing the examined topology through circuit analysis and then, the theoretical results are validated through comparisons with the simulated waveforms and experimental results. Furthermore, the expected harmonic content and the duality with traditional voltage-fed MRs (VFMRs) are presented. In the proposed structure, the transformer voltages present a multipulse waveform, instead of its primary currents as in VFMRs. This implies on limiting the voltage steps and its derivative, which might be beneficial to reduce cost and volume of insulation, particularly for MVDC and HVdc applications. Besides that, by actively controlling the primary currents, a possible copper loss reduction is shown in the transformer windings, differentiating the proposed structure from its voltage controlled counterpart. [ABSTRACT FROM AUTHOR]

This paper develops a 200-W wide-input-range (64–160-to-24-V) rail grade dc–dc converter based on gallium nitride devices. A two-stage configuration is proposed. The first regulated stage is a two-phase interleaved buck converter ($>$ 400 kHz), and the second unregulated stage is an LLC (2-MHz) dc transformer. In order to achieve high frequency and high efficiency, the critical-mode operation is applied for the buck converter, and the negative coupled inductors are used to reduce the frequency and the conduction losses. Then, a systematical methodology is proposed to optimize the planar-coupled inductors. For the unregulated LLC converter, it can always work at its most efficient point, and an analytical model is used to optimize the planar transformer. Finally, the proposed dc–dc converter, built in a quarter brick form factor, is demonstrated with a peak efficiency of 95.8% and a power density of 195 W/in $^3$. [ABSTRACT FROM AUTHOR]

In power electronics applications, where the switching frequency is below the audible frequency, the design of magnetic components considering acoustic noise and vibration is as important as designing for efficiency. For the case of the powder core, which is widely used in grid-connected inverters, much research has been conducted in terms of efficiency and core loss. However, there has been limited research dealing with the topic of acoustic noise and vibration. In this paper, Sendust (Fe–Si–Al), MegaFlux (Fe–Si), and HighFlux (Fe–Ni) powder core materials, which have low magnetostriction and low core loss, are analyzed in terms of acoustic noise induced by Maxwell force and magnetostriction. Three types of powder core materials having a rectangular shape are designed for a 4-kW grid-connected inverter. Various building structures, such as rectangular, toroidal, and oval-shaped, for a Sendust core are compared with sound pressure level and efficiency. The effects of the magnetic flux density, Maxwell force, and magnetostriction are analyzed using the finite element method and are verified experimentally. In addition, the experimental results of sound pressure and inductor efficiency are presented according to core materials and building structures. [ABSTRACT FROM AUTHOR]

In this paper, a cascaded H-bridge low-capacitance StatCom (LC-StatCom) with a modular inductive filter is introduced. Replacing the fixed-value filter inductors with thyristor-switched reactors, a well-developed member of the static VAR compensators family, reduces the overall energy storage capacity and voltage rating of the LC-StatCom without violating standard limits on current quality. The proposed modular inductive filter takes advantage of LC-StatCom's ability to synthesize high-quality ac voltage to reduce the overall energy storage requirement of the filter inductance. The proposed modular filter inductor concept adds an additional degree of freedom to control the maximum voltage drop on the filter inductor by changing the inductance value. This additional capability decreases the overall voltage rating of the converter. The effects of adding the modular inductor unit on the I–V characteristic of the LC-StatCom are evaluated. The effectiveness of the proposed solution is demonstrated by experimental results on a seven-level 0.7-kVA LC-StatCom. [ABSTRACT FROM AUTHOR]

Applications such as renewable energy generation, electric vehicles, and low-power UPS require single-phase ac/dc conversion. However, this conversion introduces a considerable amount of second-harmonic ripple on the dc link. If not filtered, this distortion hinders the converter's performance as well as the energy quality on both the ac and dc side. To mitigate this problem, a large electrolytic capacitor is usually the solution of choice, which mitigates the voltage ripple, but has drawbacks of its own, including the increased size and cost associated with the large capacitance and the limited lifespan of electrolytic capacitors. Alternative solutions to the problem include integration of an active filter circuit to the converter, which can utilize a storage element with the objective of mitigating power ripple. Such solutions have often been proposed alongside a control system, which is either highly complex or relies on open-loop feedforward techniques. This paper presents a control system, which adapts the single-input space vector concept for a single-phase application and leverages its simplicity and closed-loop architecture, allowing the controller to perform well in the presence of disturbances and parameter uncertainty. Experimental results are provided to elucidate the controller's performance on a single-phase grid-connected photovoltaic array application. [ABSTRACT FROM AUTHOR]

This paper presents a self-powered interface circuit to extract energy from ambient vibrations for powering up microelectronic devices. The circuit interfaces a piezoelectric energy harvesting micro electro-mechanical systems (MEMS) device to scavenge acoustic energy. Synchronous electric charge extraction (SECE) technique is deployed through the implementation of a novel multistage energy extraction (MSEE) circuit in 180 nm HV CMOS technology to harvest and store energy. The circuit is optimized to operate with minimum power losses when input power is limited, and adapts well to operating conditions with higher input power. The highly accurate peak detector was validated for a wide piezoelectric frequency range from 20 Hz to 4 kHz. A charging efficiency of about 84% has been achieved for 4.75 V open-circuit piezoelectric voltage excited at 390 Hz input vibration under nominal input power range of 30–80 μW. Power optimizations enable the circuit to maintain a conversion efficiency of 47% at input power level as low as 3.12 μW. MSEE provides up to 15% efficiency improvement compared to traditional SECE, and maintains power efficiency as high as possible for a wide input power range. [ABSTRACT FROM AUTHOR]