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The instantaneous output power of the two-stage single-phase grid-connected photovoltaic (PV) inverter pulsates at twice the line frequency ($2f_{{\text{o}}}$), generating second harmonic current (SHC) in the front-end dc–dc converter and PV panel, which will affect the maximum power point tracking operation and deteriorate the overall conversion efficiency. The generating mechanism of the SHC is analyzed in this paper and it is pointed that in order to eliminate the SHC in the front-end dc–dc converter and PV panel, the voltage loop gain of the front-end dc–dc converter should be high enough at $2f_{{\text{o}}}$. Since there is a −180° phase abrupt at the resonant frequency of the input side filter capacitor and the inductor, the system may be unstable. To cope with this problem, the inductor current feedback active-damping scheme (ADS) is adopted. For further improving the loop gain at $2f_{{\text{o}}}$ , proportional–integral–resonant regulator with ADS (PIR + ADS) is proposed in this paper. Besides, a step-by-step closed-loop parameters design method is presented. Finally, a 3-kW two-stage single-phase grid-connected PV inverter has been fabricated and tested, and the experimental results verify the feasibility of the proposed control schemes. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents a generalized power-decoupling control scheme using a multiport isolated bidirectional converter for a multilevel inverter, which has multiple dc links inside. In the proposed method, a single power-decoupling capacitor is needed for all the dc links in the multilevel inverter cell. First, a prototype of the power-decoupling concept of individual H-bridge cells in the multilevel inverter is proposed, using a separate power-decoupling circuit. Then, a more advanced one-step power-decoupling method is proposed. The lifetime and reliability of the multilevel inverter is improved as film capacitors replace the large capacitance electrolyte capacitors. A multi-input ports/single output voltage-fed dual half-bridge converter (MDHB) is used for the power-decoupling circuit. A steady-state analysis for the peak and root mean square of the MDHB current is carried out for the loss breakdown. The currents are functions of the switching frequency, phase shift, leakage inductance, turn ratio, and output voltage, which make the multiport transformer design complex. A design methodology is proposed, which takes into account the design of the copper and core losses as functions of the switching frequency and number of turns. Furthermore, a special winding method for the input port is illustrated to obtain identical leakage inductances for the uniform current distribution in the multiport transformer. The proposed MDHB employs a current-sensorless power-decoupling control that contributes to the spontaneous ripple rejection of all the dc links without individual link current information, as well as to the cost and size reduction. Hence, the ripple-rejection controller is independent of the control configuration of the multilevel inverter, and also available for universal applications of various inverter topologies. Since the primary-input ports of MDHB share a single magnetic core for interfacing the ripple power to the unified secondary ripple capacitor, the controller design becomes difficult in considering the dynamic interaction among the ports, along with the average-voltage control loop design. In this paper, the dynamic analysis and controller design procedure of the circuit is also presented. The power decoupling is achieved even when the ripple frequency is other than the double frequency of the inverter output, since the single-pole transfer function of the small-signal model of the MDHB allows sufficient phase margin, along with high bandwidth. The proposed power-decoupling method for the multilevel inverter is validated with the help of simulation and 1.2-kW hardware prototype experimental results. [ABSTRACT FROM AUTHOR]

This paper provides an experimental and theoretical discussion on dynamic braking for a medium-voltage induction motor fed by a modular multilevel double-star chopper-cell (DSCC) inverter. It is intended to apply the motor drive to large-capacity fans and compressors with a large moment of inertia. Each chopper cell consists of a bidirectional chopper and a braking chopper connecting a single small-rated braking resistor in series with a single IGBT. This configuration results in a “distributed” dynamic brake that provides a distinctive welcomed side effect of protecting all the bidirectional-chopper cells against sudden overvoltage. An experimental system rated at 400 V and 15 kW is designed, constructed, and tested to verify operating performance of the distributed dynamic brake. Experimental waveforms, along with simulated waveforms, confirm firmly that the distributed dynamic brake is feasible and effective in an induction motor fed by a medium-voltage high-power DSCC inverter for fans and compressors. Finally, this paper gives a design example of a distributed dynamic-braking resistor for the 11-kV, 12-MW induction motor driving a large-capacity fan equipped with a large moment of inertia. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

In this paper, a neutral point (NP) voltage balancing scheme suitable for three phase 5-level active NP clamped and T-type NP clamped (TNPC) inverters is discussed. Carrier-based pulsewidth modulation is used for the balancing of dc-link capacitors and floating capacitors (FC) in the inverter. The FC voltages are regulated with the help of redundant switching states of pole voltage levels and the dc-link capacitor voltages are controlled using zero-sequence voltage injection. Though the balancing approaches are different for dc-link capacitors and FCs, they are not decoupled from each other. This is due to the effect of certain redundant switching states used for FC balancing causing NP voltage variation. To address this issue, the redundant state time ratio is estimated online every sample and based on this dynamic time ratio, an optimal relationship between neutral current and zero-sequence voltage is established. It is found that the use of dynamic time ratio helps in achieving better transient performance than that of generally adopted fixed time ratio. Simulation and experimental results prove that the proposed balancing scheme works well under all operating conditions and exhibits fast and stable transient performance. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

In this paper, the application of an innovative transformer-less unified power flow controller (UPFC) for interconnecting two synchronous ac grids with large phase difference is presented. The proposed transformer-less UPFC is based on two cascaded multilevel inverters. As is well known, the real power flow between two generators is mainly determined by their phase difference. If two grids with large phase difference are initially separate from each other, once connected, there will be huge current flowing through the transmission line and will, thus, damage the generators or other supplementary equipments. Therefore, to connect two synchronous ac grids with each other without using an extra device is impossible. For decades, researchers have been investigating different approaches to this problem but still difficult to conquer, especially for real hardware implementation. An effective solution using the transformer-less UPFC is demonstrated in this paper. The transformer-less UPFC can realize grid interconnection, independent active and reactive power control, dc-link voltage balance control, etc. Furthermore, a 1-pu equipment can compensate system with phase difference as large as 30°. Experimental results based on the 13.8-kV/ 2-MVA transformer-less UPFC prototype are shown to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

Transformerless photovoltaic (PV) grid-connected inverters have become more and more popular in distributed PV power generation systems due to the advantages on high efficiency, low cost, and small size. However, common-mode (CM) current in the transformerless PV inverters can result in serious electromagnetic interference and insecurity, which will further reduce the reliability of the PV inverter systems. In this paper, an improved H5 topology, namely H5-D topology, is proposed, in which a clamping diode is added on the basis of H5 topology to eliminate the CM voltage fluctuation in H5 topology. Further, the PSIM simulation results of the H5-D topology and H5 topology are given and compared, especially, the performance of H5-D topology for CM current suppression is presented and analyzed concretely. Finally, the experimental prototypes of the H5-D topology and H5 topology are built and tested, and the experimental results validate the advantages of the H5-D topology. The proposed H5-D topology provides a new practical topology for distributed PV grid-connected power generation systems. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

A grid-connected inverter with critical loads should be able to supply a stable voltage to critical loads at the instant of a mode change as well as during clearing time while quickly detecting unintentional islanding. The indirect current control has been proposed to provide not only a stable voltage to critical loads during clearing time but also a seamless transfer of inverters at the instant of a mode change. However, the conventional islanding detection methods cannot be applied to the indirect current control based inverter since the magnitude and frequency of voltage do not vary when an islanding occurs. This paper proposes a reactive power P&O anti-islanding method for the indirect current control. The proposed islanding detection method generates a small reactive power perturbation at the output of the inverter and detects the islanding by observing reactive power mismatch during the islanding. Using the proposed method, the inverter can supply high quality power to critical loads without distorting the output current during the clearing time. The proposed anti-islanding method is validated through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

Model predictive control (MPC) for modular multilevel converter (MMC) systems has drawn attention among researchers in recent years due to its straightforward implementation, ability to control multiple objectives in a single cost function, and excellent dynamic response. Even though MPC seems promising for the MMC, it suffers from an excessive increase in computational complexity when the number of submodules (SMs) per arm (N) is increased. The computational load can be reduced by decoupling the SM capacitor voltage control from the cost function and balancing them in an external voltage sorting algorithm. In this paper, a further reduction of computations in the MPC is achieved by the preselection of control options that can satisfy the control objectives in the next sampling time. The preselection algorithm generates a greatly reduced number of control options to be computed by a straightforward MPC loop at each sampling time. In addition, the MPC together with the preselection algorithm can generate $2N+ 1$ output voltage levels in the MMC while maintaining a low $dv/ dt$ in the output voltage and suppressing the circulating currents in MMCs with considerable number of SMs. The steady-state and dynamic performance of the MMC operating with the proposed method is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

With increasingly prominent role of rail transit in the entire urban transport system, an auxiliary inverter is used increasingly. The complicated and fluctuating load condition of the auxiliary inverter implies special designs about structure and control strategy are necessary. For this purpose, a comprehensive control strategy is proposed. First of all, this paper proposes a structure that is capable of suppressing unbalanced voltage. Second, the control strategy based on the resonant controller is proposed, which can balance split capacitors voltage, is capable of suppressing the effect of unbalanced load and nonlinear load. This paper introduces the design method of the control system in detail. Then, this paper simulates the proposed comprehensive control strategy in MATLAB. Finally, experimental results are presented, which fully demonstrate the excellent performance of the comprehensive control strategy. [ABSTRACT FROM PUBLISHER]

In this paper, a modulation and control method for the new transformerless unified power flow controller (UPFC) is presented. As is well known, the conventional UPFC that consists of two back-to-back inverters requires bulky and often complicated zigzag transformers for isolation and reaching high power rating with desired voltage waveforms. To overcome this problem, a completely transformerless UPFC based on an innovative configuration of two cascade multilevel inverters has been proposed. The new UPFC offers several advantages over the traditional technology, such as transformerless, light weight, high efficiency, low cost and fast dynamic response. This paper focuses on the modulation and control for this new transformerless UPFC, including optimized fundamental frequency modulation for low total harmonic distortion and high efficiency, independent active and reactive power control over the transmission line, dc-link voltage balance control, etc. The new UPFC with proposed control method is verified by experiments based on 4160-V test setup. Both the steady-state and dynamic-response results will be shown in this paper. [ABSTRACT FROM PUBLISHER]

In order to solve the neutral-point voltage unbalancing problem for three-level inverters, this paper proposes a method to balance the neutral-point voltage for three-level inverters with variable modulation wave offset sinusoidal pulse-width modulation (SPWM) control. Based on the mathematical expressions of neutral-point voltage unbalancing, the factors are studied, which affect the fluctuation of neutral-point voltage. Theoretically the mathematical expressions of the neutral-point voltage with the proposed method are derived, and the mathematical relationship between the fluctuation of neutral-point voltage and the adjusting offset of modulation wave is studied. This proposed method realizes controlling the neutral-point voltage balance by dynamically calculating the offset superimposed to the modulation wave based on SPWM (DCOSPWM). This DCOSPWM method is very simple, which has good steady-state performance and is easy for digital implementation. The simulation results verify the correctness of the theoretical analysis in this paper, and the feasibility and effectiveness of this method is verified by the experiments in the experimental platform of neutral point clamped three-level inverters based on digital signal processor (DSP)-complex programmable logic device (CPLD). [ABSTRACT FROM AUTHOR]

Two-stage single-phase inverters have been widely used as they can achieve voltage matching and galvanic isolation between the input and output. Due to the pulsating output power of the downstream inverter, an ac current at twice the output frequency, which is called second harmonic current (SHC), arises in the input side of the downstream inverter. This SHC will penetrate to the front-end dc-dc converter, leading to reduced conversion efficiency. This paper first analyzes the propagation mechanism of the SHC and load transient response of two-stage single-phase inverters from the viewpoint of output impedance. Then, based on the current mode control and load current feed forward, two control methods to achieve low SHC in the front-end dc-dc converter and fast dynamic performance during load transient are proposed in this paper. Finally, a 2-kW two-stage single-phase inverter prototype has been constructed and tested, and the experimental results are provided to verify the effectiveness of the proposed control methods. [ABSTRACT FROM AUTHOR]

Model-predictive power control (MPPC) takes the switching nonlinearity of power converters and system constraints into consideration. It is a promising control technique for three-phase four-switch rectifiers (TPFSRs) because capacitor-voltage-balancing control and instantaneous power control can be simultaneously designed for this type of power converters. However, since only one switching vector is allowed in each control interval, conventional MPPC (C-MPPC) may lead to significant output power ripples that can severely degrade system power quality. This is particularly true for TPFSRs due to the limited number of switching states as well as the constraint imposed by the capacitor-voltage-balancing control. To improve the performance of TPFSRs, this paper proposes a multiple-vector MPPC scheme, which can minimize active power and reactive power ripples and achieve capacitor voltage balancing with a constant switching frequency. An equivalent zero-voltage vector model and a capacitor-voltage-balancing model are derived to implement the proposed control scheme. Comparative experimental results are presented to demonstrate the superiority of the proposed control scheme over the C-MPPC. [ABSTRACT FROM PUBLISHER]

A single-switch quadratic buck–boost converter with continuous input port current and continuous output port current is proposed in this paper. Compared with the traditional buck-boost converter, the proposed converter can obtain a wider range of the voltage conversion ratio with the same duty cycle. Moreover, the proposed converter can operate with continuous input port current and continuous output port current compared to the existing counterparts with inherently discontinuous input port current and discontinuous output port current. The operating principle and steady-state performance of the proposed converter under continuous inductor current mode is analyzed in detail. Then, the comparison between the proposed converter and the existing quadratic buck–boost converters has been conducted to demonstrate the unique features of the proposed one. Finally, experimental results from a prototype built in the lab are recorded to verify the effectiveness and validity of the proposed quadratic buck–boost converter. [ABSTRACT FROM PUBLISHER]

The simple boost control (SBC) method is usually used to control the shoot-through state in a single-phase single-stage quasi-switched boost inverter (qSBI). This paper proposes a new pulse-width modulation (PWM) control scheme to improve the modulation index for the qSBI. The advantages of the proposed method for the qSBI over the conventional SBC method are as follows: 1) the modulation index is larger; 2) the voltage stress on the capacitor, diodes, and switches is reduced significantly; 3) the high-frequency peak-to-peak inductor current and capacitor voltage ripples are smaller; 4) the shoot-through current is lower; and 5) the efficiency is higher. The operating principles and circuit analysis for the proposed PWM control scheme are shown. To verify the performance of the proposed PWM control method, a 400W prototype was built with a 110 V/50 Hz output voltage. The experimental results matched those of the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Four-level nested neutral-point clamped (NNPC) inverters experience severe voltage balancing problems under low output-frequency conditions when the conventional four-level space vector modulation (4L-SVM) technique is applied, which limits their wider application. In order to get a complete control of the flying-capacitor voltages, and to alleviate the calculation burden of conventional 4L-SVM, a simplified but effective 4L-SVM technique along with the voltage balance control (VBC) function is proposed in this paper. For low modulation indexes, zero and small vectors are selectively utilized and distributed to force the average charging and discharging time of flying capacitors to be equal to each other during every switching period, so that voltage ripples are greatly reduced to be within an acceptable level under low output-frequency conditions. For high modulation indexes, the simplification of conventional 4L-SVM for NNPC inverters into two-level SVM is proposed to reduce the computation complexity. Principles of the proposed 4L-SVM and VBC are elaborated in detail. The steady-state, transient-state, and VBC performances are investigated and compared with the case where the conventional 4L-SVM is applied. Simulation results of a 5 MVA inverter system and experimental results of a scaled-down 5 kVA inverter system are presented to validate the proposed method. [ABSTRACT FROM PUBLISHER]

In this paper, the properties and operation of the virtual-space-vector pulse-width modulation (PWM) for a three-level neutral-point-clamped inverter with unbalanced dc-links are studied. By quantitatively analyzing the characteristics of the revised space-vector diagram (SVD) with unbalanced dc-links, the defined virtual SVD (VSVD) for the unbalanced case is theoretically proven identical to the VSVD of the conventional virtual-space-vector PWM (VSVPWM) strategy with balanced dc-links. The well-developed and fast-processing methods to calculate the durations of the nearest three virtual vectors for the conventional VSVPWM can be directly utilized. In addition, a control strategy to realize the asymmetric control of the dc-link voltages with VSVPWM is also studied, and this method can adjust the unbalancing degree with a high accuracy for any modulation indexes and load power factors. Simulated and experimental results are given to validate the effectiveness. [ABSTRACT FROM PUBLISHER]

DC-link electrolytic capacitor critically affects the lifetime of the motor drive system. This paper proposes an inverter power control strategy based on dc-link voltage regulation for the electrolytic capacitor-less interior permanent magnet synchronous motor drive system. The dc-link electrolytic capacitor is replaced by a small film capacitor and the power factor correction circuit is also eliminated. Hence, the inverter power should be regulated effectively to achieve high input power factor and low grid current harmonics. The inverter power control loop based on proportional resonant (PR) controller is established to regulate the inverter power into sinusoidal wave. The PR controller can be designed to achieve a high gain at the desired frequency and the parameters are easy to design due to the simple structure. In addition, a power compensation method based on the dc-link voltage regulation is used to diminish the error of inverter power control, which does not depend on the precise calculation and is easy to realize. The effectiveness of the proposed method is demonstrated by the experimental results on an air conditioner. The input power factor can reach 0.992 and the harmonics of grid current are considerably lower than the requirement of EN61000-3-2 standard. [ABSTRACT FROM PUBLISHER]

In this paper, a dc to ac converter with the ability of voltage increasing is presented. This inverter is designed in a way that just one dc source is used. Also, by using power storage technique and with combining charged capacitors and dc source in series form, output voltage levels can be increased. This inverter is in a modular structure and has the ability of capacitor's voltage self-balancing. H-bridge inverter was not used at the end of the proposed converter and all elements tolerate a voltage stress equal to the amount of input dc source. This leads to remarkable decrease of total standing voltage and peak inverse voltage. Other advantage of the proposed inverter is its potentiality of performance in high-frequency applications. The modular form of the proposed inverter provides the potentiality of extension to higher voltage levels and eases the maintenance. Moreover, considering to the fact that the stress of all components of the suggested inverter is equal to the input source, the performance in high voltage is added to the characteristics of the proposed inverter. The nine-level structure of the proposed inverter is simulated and laboratory test is carried out for the verification of its performance. [ABSTRACT FROM PUBLISHER]

Z-source inverter provides a competitive single-stage dc–ac power conversion with the capability of both buck and boost voltage regulation. In order to maximize voltage gain and to increase efficiency, this paper proposes an improved pulse-width modulation (PWM) strategy. By adjusting the shoot-through duty ratio of one-phase leg, it regulates the average value of intermediate dc-link voltage, which is the same as the instantaneous maximum of three-phase line voltage in one switching time period (Ts) . And the other two-phase legs maintain the fixed switching states. Thus, the equivalent switching frequency of power devices in the inverter bridge is reduced to 1/ 3fs (fs is the frequency corresponding to Ts). The operating principles and closed-loop controller design are analyzed and verified by simulation and experiments. Compared with the existing PWM strategies, the improved PWM (IPWM) strategy demonstrates higher efficiency under full operation range of low voltage gain (1.27-2) application. However, with the IPWM strategy, the inductor current and capacitor voltage contain six-time-line-frequency ripples, which consequently require large size of the passive components when the output frequency is very low. Thus, it is also suitable for 400–800-Hz medium frequency aircraft and vessel power supply system due to a relatively high output line frequency. Furthermore, the idea of IPWM strategy can be extended to other kinds of three-phase impedance network-based inverters. [ABSTRACT FROM PUBLISHER]

This paper presents a steady-state model of MMC for the second-order phase voltage ripple prediction under unbalanced conditions, taking the impact of negative-sequence current control into account. From the steady-state model, a circular relationship is found among current and voltage quantities, which can be used to evaluate the magnitudes and initial phase angles of different circulating current components. Moreover, in order to calculate the circulating current in a point-to-point MMC-based HVdc system under unbalanced grid conditions, the derivation of equivalent dc impedance of an MMC is discussed as well. According to the dc impedance model, an MMC inverter can be represented as a series connected R–L–C branch, with its equivalent resistance and capacitance directly related to the circulating current control parameters. Experimental results from a scaled-down three-phase MMC system under an emulated single-line-to-ground fault are provided to support the theoretical analysis and derived model. This new models provides an insight into the impact of different control schemes on the fault characteristics and improves the understanding of the operation of MMC under unbalanced conditions. [ABSTRACT FROM PUBLISHER]

In signal injection sensorless drives, the injection voltage cannot be reduced under a certain value. The lower limit of the injection voltage is mainly enforced by the inverter nonlinearity that causes distortion of the injection voltage and degradation of the position estimation performance. After analyzing the inverter nonlinearity during the voltage injection, it is revealed that parasitic capacitances of insulated-gate bipolar transistors have positive effects on inverter output linearity and sensorless control. Based on this analysis, this paper proposes a method to reduce the injection voltage by connecting additional capacitors to the output terminals of the inverter. Simulation and experimental results are provided to verify the effectiveness of the proposed idea. In the experiments, using the capacitor-integrated inverter, it is shown that the injection voltage can be reduced by more than half without degrading the position estimation performance. [ABSTRACT FROM AUTHOR]

Indirect matrix converter (IMC) is an alternative for ac/ac energy conversion, usually operated with a voltage stepped-down gain of only 0.866. For applications like distribution generation where voltage-boost functionality is required, the traditional style of operating the IMC is therefore not appropriate. Like most power converters, the operation of the IMC can surely be reversed to produce a boosted gain, but so far its relevant control principles have not been discussed. These challenges are now addressed in this paper with distributed generation suggested as a potential application. Simulation and experimental results for validating various performance aspects of the proposed control schemes can be found in a later section of this paper. [ABSTRACT FROM AUTHOR]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

The quasi-Z-source inverter (qZSI) has attracted much attention for motor drives and renewable energy applications due to its capability to boost or buck in a single converter stage. However, this capability is associated with different challenges related to the closed-loop control of currents, control the dc capacitor voltage, produce three-phase ac output current with high dynamic performance, and obtain continuous and low ripple input current. This paper presents a predictive control strategy for a three-phase qZSI that fulfills these requirements without adding any additional layers of control loops. The proposed controller implements a discrete-time model of the qZSI to predict the future behavior of the circuit variables for each switching state, along with a set of multiobjective control variables all in one cost function. The quasi-impedance network and the ac load are considered together when designing the controller in order to obtain stability of the impedance network with a step change in the output reference. A detailed comparative investigation between the proposed controller and the conventional proportional-integral (PI) controller is presented to prove the superiority of the proposed method over the conventional control method. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Diode-assisted buck–boost voltage-source inverter achieves high voltage gain by introducing a switch-capacitor based high step-up dc–dc circuit between the dc source and inverter bridge. As for the unique structure, various pulse width modulation (PWM) strategies are developed with regard to the chopped intermediate dc-link voltage. In order to maximize voltage gain and increase efficiency, this paper proposes a novel PWM strategy. It regulates the average value of intermediate dc-link voltage in one switching time period ( Ts) the same as the instantaneous maximum value of three-phase line voltage by controlling the front boost circuit. Then, the equivalent switching frequency of power devices in the inverter bridge can be reduced to 1/3fs (fs = 1/Ts). The operating principle and closed-loop controller design are analyzed and verified by simulations and experiments. Compared with existing PWM strategies, the new control strategy demonstrates less power device requirement and higher efficiency in high voltage gain applications. It is a more competitive topology for wide range dc/ac voltage regulation in renewable energy applications. Furthermore, with new control strategy, the dc-side inductor current and capacitor voltage contains six-time line-frequency ripples. To overcome the undesired influence of low frequency ripples, it is also suitable for 400–800 Hz medium frequency aircraft and vessel power supply system. [ABSTRACT FROM PUBLISHER]

This paper investigates the problem of fluctuation of the neutral-point potential (NPP) in a three-level NPC inverter with a capacitor-voltage loop. The phase pulse width duty cycle disturbance pulse width modulation (PWM) method is proposed to suppress the NPP fluctuation efficiently. Based on the basic carrier-based phase-disposition PWM method, the average pulse neutral-point current model is established. Then, the frequency, amplitude, and equivalent initial phase of the NPP fluctuation are analyzed based on the current model. According to the alternating error of the dc-link capacitor voltages, a capacitor-voltage loop with a quasi-proportional resonant (PR) controller is presented. The control variable, which varies with the modulation index, phase current, load power factor, etc., can be obtained from the quasi-PR controller. Finally, an experimental three-level NPC inverter is described and the validity and feasibility of the proposed method are verified by experimental results. [ABSTRACT FROM AUTHOR]

Switching sequences of multilevel inverters have to be properly chosen based on the desired control criteria such as dc-link voltage regulation, common mode voltage reduction, and other application dependent criteria. Control of a converter to satisfy a desired criterion is challenging, especially in high voltage level converters. This paper proposes a simple control method for multilevel inverters with high modularity such as flying capacitor multilevel inverters, H-bridge multilevel inverters, and modular multilevel inverters. It is shown that the method considerably simplifies generation of the switching sequences and fulfills the desired criteria with a reasonable computational cost. The proposed method is computationally efficient in the sense that its implementation for high voltage level inverters requires the same effort as required for a multilevel inverter with a low number of cells. Other prominent advantages of the proposed control method, compared to earlier methods, include its applicability for multiphase multilevel converters and converters with asymmetrical structure and/or unevenly distributed dc voltages, independence from the level number and structure of the converter, and not requiring a lookup table. These advantages make the proposed scheme well suited for high cell-number converters, mainly utilized in FACTS, HVDC, and power quality applications. Simulation and experimental results are presented which verify the performance of the proposed method. [ABSTRACT FROM AUTHOR]

Differential-mode buck-boost inverters have merits such as reduced switch number, ability to provide voltages higher or lower than the input voltage magnitude, improved efficiency, reduced cost and size, and increased power density, especially in low-power applications. There are five buck-boost inverters that can provide flexible output voltage without the need of a large electrolytic input side capacitor, which degrades the reliability of inverters. The continuous input current of these inverters is appropriate for maximum power point tracking operation in photovoltaic and fuel cells applications. Three of the five inverters can be isolated with high-frequency-link transformers where the common-mode leakage current can be mitigated. However, the performance and control of such converters have not been discussed in detail. In this paper, the five possible single-stage three-phase differential-mode buck-boost inverters with continuous input current are investigated and compared in terms of total losses, maximum ripple current, total harmonic distortion, and device and passive element ratings. In addition, the possible methods are presented for eliminating the input third-order harmonic current, resulting from the stored energy in the passive elements, as well as the output second-order harmonic currents. The ability for isolating the input and output sides of the inverters with a small–high frequency transformers is discussed. A changeable-terminal 2.5-kW bidirectional inverter is used to validate the design flexibility of the inverter topologies, when digital signal processor-controlled. [ABSTRACT FROM AUTHOR]

A large amount of ripple at twice the output frequency will emerge in the input current due to the pulsating output power in a two-stage single-phase inverter. To reduce the low-frequency input current ripple, a control strategy is presented in this paper based on the front-end dc–dc converter load current feedforward. It intends to control the dc bus voltage to swing properly at twice the output frequency, making the dc bus capacitor supply nearly all the pulsating power. The implementation method is illustrated, and the operation performance analysis as well as the key parameter design principle is provided. Introducing the proposed feedforward path is able to significantly suppress the input current ripple with little impacts on the original system stability, steady-state tracking accuracy, and dynamic response. Finally, experimental results performed on a buck-type stand-alone two-stage single-phase inverter prototype verify the validity of proposed method and the correctness of analysis. [ABSTRACT FROM PUBLISHER]

In this paper, a new cascaded nonlinear controller has been designed and implemented on the packed U-cell (PUC) seven-level inverter. The proposed controller has been designed based on a simplified model of PUC inverter and consists of a voltage controller as an outer loop and a current controller as an inner loop. The outer loop regulates the PUC inverter capacitor voltage as the second dc bus. The inner loop is in charge of controlling the flowing current, which is also used to charge and discharge that capacitor. The main goal of the whole system is to keep the dc capacitor voltage at a certain level results in generating a smooth and quasi-sine-wave seven-level voltage waveform at the output of the inverter with low switching frequency. The proposed controller performance is verified through experimental tests. Practical results prove the good dynamic performance of the controller in fixing the PUC capacitor voltage for various and variable load conditions and yet generating low-harmonic seven-level voltage waveform to deliver power to the loads. Operation as an uninterruptible power supply (UPS) or ac loads interface for photovoltaic energy conversion applications is targeted. [ABSTRACT FROM AUTHOR]

This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results. [ABSTRACT FROM PUBLISHER]

The purpose of neutral-point voltage balancing algorithms in the three-level neutral-point clamped (3L-NPC) topology is to eliminate the voltage unbalance of top- and bottom-side dc-link voltages (neutral-point voltage). These algorithms are divided into dc unbalance and ac unbalance compensation methods. The dc unbalance causes distortion of output currents; therefore, this problem has to be solved. The ac unbalance implies that there is an ac ripple in the top- and bottom-side dc-link voltages. In applications using 3L-NPC topology, a large dc-link capacitor value is required to mitigate this ac unbalance problem. As a result, the size and the cost of applications become large and expensive. In this paper, a compensation method for mitigating the ac unbalance of the neutral-point voltage is proposed, which causes the dc-link capacitor value to be small, when a carrier-based pulse width modulation method is applied. The proposed method compensates the ac unbalance of the neutral-point voltage by adding an optimal compensation value to the reference duty signals. This compensation value is calculated simply by currents and reference duty signals. The calculation process of the optimal compensation value is discussed, and the effectiveness of the proposed method is verified with simulations and experiments. [ABSTRACT FROM PUBLISHER]

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment. [ABSTRACT FROM PUBLISHER]

In single-phase photovoltaic (PV) system, there is double-frequency power mismatch existed between the dc input and ac output. The double-frequency ripple (DFR) energy needs to be buffered by passive network. Otherwise, the ripple energy will flow into the input side and adversely affect the PV energy harvest. In a conventional PV system, electrolytic capacitors are usually used for this purpose due to their high capacitance. However, electrolytic capacitors are considered to be one of the most failure prone components in a PV inverter. In this paper, a capacitance reduction control strategy is proposed to buffer the DFR energy in single-phase Z-source/quasi-Z-source inverter applications. Without using any extra hardware components, the proposed control strategy can significantly reduce the capacitance requirement and achieve low input voltage DFR. Consequently, highly reliable film capacitors can be used. The increased switching device voltage stress and power loss due to the proposed control strategy will also be discussed. A 1-kW quasi-Z-source PV inverter using gallium nitride (GaN) devices is built in the lab. Experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM PUBLISHER]

Single-phase inverters must include an energy storage device, typically a high-voltage bus capacitor, to match the inverter constant input power to its pulsating output power. Because of its increased cost, the size of this bus capacitor must be minimized. However, when the bus capacitor is small, the bus voltage includes a high ripple at the ac line second harmonic frequency, which causes harmonic distortion. The bus voltage controller must filter this ripple, while regulating the bus voltage efficiently during transients, and must therefore balance a tradeoff between two conflicting constraints, low-harmonic distortion and high bandwidth. This paper analyzes this tradeoff, and proposes a new control method for solving it without using addition hardware. Instead of reducing the distortion by lowering the loop gain, the new controller employs a digital FIR filter that samples the bus voltage at an integer multiple of the second harmonic frequency. The filter presents a notch that removes the second harmonic ripple, enabling a design that operates with zero distortion and high bandwidth simultaneously, and is suitable for inverters with small bus capacitors. The proposed controller is tested on a microinverter prototype with a 300-W photovoltaic panel and a 20-μF bus capacitor. [ABSTRACT FROM PUBLISHER]

Two stage-cascaded converters are widely used in dc–ac hybrid systems to achieve the bidirectional power transmission. The topology of dual active bridge cascaded with inverter (DABCI) is commonly used in this application. This paper proposes a coordinative control method for DABCI and it is able to reduce the dc-link voltage fluctuation between the DAB and inverter, then reduce the stress on the switching devices, as well as improve the system dynamic performance. In the proposed control method, the DAB and inverter are coordinated to control the dc-link voltage and the power, and this responsibility sharing control can effectively suppress the impact of the power variation on the dc-link voltage, without sacrificing stability. The proposed control method is also effective for DABCI in unidirectional power transmission. The effectiveness of the propose control has been validated by both simulations and experiments. [ABSTRACT FROM AUTHOR]