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This paper presents a novel seven-level inverter topology for medium-voltage high-power applications. It consists of eight active switches and two inner flying capacitor (FC) units forming a similar structure as in a conventional active neutral-point-clamped (ANPC) inverter. This unique arrangement reduces the number of active and passive components. A simple modulation technique reduces cost and complexity in the control system design without compromising reactive power capability. In addition, compared to major conventional seven-level inverter topologies, such as the neutral point clamped, FC, cascaded H-bridge, and ANPC topologies, the new topology reduces the dc-link voltage requirement by 50%. This recued dc-link voltage makes the new topology appealing for various industrial applications. Experimental results from a 2.2-kVA prototype are presented to support the theoretical analysis presented in this paper. The prototype demonstrates a conversion efficiency of around 97.2% ± 1% for a wide load range. [ABSTRACT FROM AUTHOR]

This paper describes a dc-link voltage control method of a single-phase back-to-back cascaded H-bridge inverter (SBCI) for a medium-voltage motor drive system. The main advantage of the SBCI topology over the conventional regenerative cascaded H-bridge topology with a three-phase active front-end (AFE) is a simple system structure, which is composed of an input transformer, a power cell, a current sensor, etc. However, the challenging points of the SBCI are larger voltage ripple in the dc-link capacitor and imbalance of dc-link voltages of each phase. The asymmetric dc-link voltage of each power cells could cause unstable operation such as over-modulation due to the lack of the dc-link voltage of a particular phase and result in over-voltage or under-voltage faults. In this paper, the control strategy of the dc-link voltage for the SBCI that uses the negative-sequence voltage of the converter is described. The proposed control method is verified with a computer simulation whose target is a 6.6-kV–1.25-MW medium-voltage drive system. Also, through the experimental setup with the prototype SBCI whose power rating is 16.2 kVA, the dc-link voltage of each AFE has been controlled within a 0.5% error of its reference value at the full load. [ABSTRACT FROM AUTHOR]

This paper presents a practical strategy for utilizing the submodule (SM) redundancy of a modular multilevel converter (MMC) for its fault tolerance. This strategy provides a systematic framework for balancing the tradeoff between two conventional methods for using the active redundancy and, thus, achieves operational flexibility. One of the existing methods improves SM reliability owing to less voltage stress on the SM components by employing all of the SMs to form the ac or dc voltages (voltage-sharing mode). The other avoids transients by keeping the average SM voltage constant at the cost of slightly increased stress on the SM components (fixed-level mode), which, however, can be controlled to provide the grid-adaptive operation by reserving the energy of the SMs not in service. We, thus, develop a new redundancy management scheme by integrating these two methods and exploiting their technical benefits to meet the PQ requirements and MMC control performance. This research provides a theoretical basis and a technical guide to determining the number of SMs, which can further increase the voltage steps as per the MMC and grid conditions. This paper also connects the remaining PQ capability of the MMC at a particular operating point with the SM redundancy concept by defining a potential redundancy, especially useful when the physical redundancy is exhausted. The theoretical findings and efficacy of the proposed strategy are validated through PSCAD/EMTDC time-domain simulations followed by experiments using a nine-level single-phase MMC system. [ABSTRACT FROM AUTHOR]

Power management integrated circuits (PMICs) with on-chip compensation are widely used to power multiple loads in mobile devices with increased power density. However, there are two issues for on-chip compensated PMICs. First, on-chip compensation reconfigurability is required to obtain the appropriate response in various passive components. Second, a converter for a processor requires adaptive voltage positioning (AVP) to reduce the output capacitor size. In this paper, a novel reconfigurable on-chip compensated current-mode buck converter with AVP is proposed to solve the aforementioned issues without requiring high-speed and high-resolution analog-to-digital converter (ADC). A reconfigurable accurate load line control scheme and on-chip compensation are proposed to achieve an accurate load line and AVP in various load lines and passive components. The control scheme, small-signal model, and circuit implementation are illustrated in this paper. The proposed buck converter was implemented into an integrated circuit to verify the analysis. [ABSTRACT FROM AUTHOR]

Power converters and electric motor drives when tightly regulated behave as constant power loads. These loads are different from resistive loads and have destabilizing negative impedance characteristics, which impact a system's stability. A boost converter is intrinsically nonlinear and is a nonminimum phase system at the output voltage with respect to the control input. The linear approximation of this boost converter loaded with a constant power load has a zero and poles in the right half of the $s$ -plane, making the system unstable and very difficult to control. Control techniques that employ some form of system inversion cannot be implemented for a nonminimum phase system. This paper describes a technique to modify the nonminimum phase boost converter to a minimum phase for a constant power load, further implementing the input–output linearization technique to stabilize the system. This paper also provides a methodological analysis of the problem followed by the proposed solution. Furthermore, it verifies the analysis of the proposed solution through simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a split-capacitor four-wire current source inverter, which is the dual of the split-capacitor four-wire voltage source inverter. Since the midpoint of the dc link is tied to the neutral point of ac filter capacitors, the common-mode voltage (CMV) is reduced significantly. Consequently, the leakage current issue is effectively addressed. The proposed circuit is cost-effective as no extra switch is added. This paper, first, establishes the equivalent common-mode circuit of the proposed inverter. The impact of the neutral line inductance on CMV is also analyzed. Then, a specific modulation is introduced to balance the dc-link voltages/currents. To achieve good input/output performance, a nonlinear control method is developed based on time-domain models. Finally, all the proposed methods and related theoretical analysis are verified by simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper documents a new three-switch, isolated boost dc–dc converter. The major features of the proposed converter are as follows: 1) continuous input current; 2) reduced one active switch, one additional diode, and one additional capacitor; 3) unchanged primary and secondary voltage waveforms of the transformer when the duty cycle is changed; and 4) removal of the snubber circuit. This paper presents the operating principles, analysis, parameter design guidelines, and simulation results for the proposed converter. To verify the performance of the proposed converter, a 400 W prototype was constructed with a 40–60 V dc input. A PID controller was used to maintain the dc output voltage at 400 V. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

DC/DC converters connected in series or parallel allow low power devices to be used in high power conversions. The input series output series (ISOS) connection is suitable for situations where both the input and output sides are high voltage fields. To ensure that each module shares voltage with the other, this paper proposes an active output voltage sharing (AOVS) control scheme. The scheme introduces sharing control in the output side so that the isolation is not needed between the input and output sides in the control loop. The AOVS control scheme, consisting of a common output voltage loop and individual output voltage sharing loop, has a master–slave structure. To improve the reliability and realize a hot-plug, this paper also provides an automatic master–slave form of the AVOS control scheme. A simulation of the frequency and time domains is used to verify the accuracy of the small signal model, and an ISOS-connected prototype consisting of three forward converters is made to test the steady and dynamic characteristics of the proposed scheme. [ABSTRACT FROM AUTHOR]

This paper presents an intensive discussion on a high-voltage direct-current (HVDC) long-distance transmission system combining two modular multilevel double-star chopper-cells (DSCC) converters with dc power cables. Hereinafter, each converter is referred to simply as a DSCC converter, or just as a DSCC for more simplicity. Such an HVDC transmission system is required to provide low-voltage-ride-through (LVRT) capability to enhance system availability. This paper proposes a practical LVRT control characterized by the use of power-line communications between the two DSCC converters. The validity and effectiveness of the LVRT control is verified not only by simulated waveforms obtained from the software package “PSCAD/EMTDC” but also by experimental waveforms from a three-phase 200-V, 400-Vdc, 10-kW, 50-Hz downscaled system with 300-m-long dc power cables. [ABSTRACT FROM AUTHOR]

An isolated bidirectional dc–dc converter, which combines parallel-connected two-level converters (TLCs) on the medium-voltage side and a modular multilevel converter (MMC) on the high-voltage side, namely a TLC-MMC converter, is a promising candidate for the interconnection of medium-voltage direct current (MVDC) and HVdc grids. Different from typical phase-shift controlled isolated bidirectional dc–dc converters, transformer currents of a TLC-MMC converter are regulated by the MMC in a closed-loop manner in order to achieve extremely low switching losses and low total device rating of power-semiconductor devices in TLCs. This paper addresses the dedicated operation technique and the voltage-balancing control of the TLC-MMC converter. The MMC in the TLC-MMC converter operates with six-step phase voltages and sinusoidal phase currents. Such an operation makes the MMC present remarkable differences to ac–dc applications. The direct-modulation technique, which is the most-used technique performed to MMCs in line-frequency ac–dc power conversion, has been concluded not applicable to the MMC in a TLC-MMC converter due to the significant sixth-order oscillation resulted in the dc-link voltage. Thus, the indirect-modulation technique is employed, and consequently a closed-loop voltage-balancing control is mandatory for the MMC. Possible measures for voltage balancing have been explored, and effective voltage-balancing control with a simplified implementation is proposed. Validity and effectiveness of the proposed control strategy have been verified by both simulations and experiment using a downscale prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a constrained modulated model-predictive control (M $^{2}$ PC) scheme for an LC-filtered voltage-source converter (VSC). To tackle the coupling effects of the state variables in a second-order LC filter, a dual-objective cost function (CF) is used to explicitly track both capacitor voltage and inductor current references, which can achieve an improved voltage quality. To handle the state and control input constraints of VSCs, a constrained M $^{2}$ PC scheme is proposed with an “online post-correction” constraint-handling technique. First, the unconstrained optimal voltage vector (OVV) is derived. It is generated by seeking the minimum analytical solution of the CF offline, simplifying the online implementation. Then, an “online post-correction” strategy is employed by reconsidering the constraints to correct the precalculated OVV online, which guarantees the future states within the allowed range. Finally, the corrected OVV is synthesized by the space vector modulation, resulting in a fixed switching frequency and low harmonics. Compared with the typical constrained model-predictive control, the presented scheme has the advantages of improved steady-state performance, flexible constraint-handling ability, and lower computational cost. Additionally, design procedures for weighting factor selection in the CF are given. Comparative experiments are investigated to verify the presented control strategy. [ABSTRACT FROM AUTHOR]

In the no-load condition, LLC converter usually fails to regulate its output voltage although it operates at a high switching frequency. Till now, it is hard to obtain the exact relationship between design parameters and the maximum switching frequency for no-load regulation capability. In this paper, a specific criterion for no-load regulation of LLC converter is provided, without using active components or other modulation schemes. By analyzing the macroscopic switching period and microscopic switching transition in the no-load condition, it is shown that not only the peaking resonant current during the switching transition, but also the resonant tank design affect the no-load regulation of the LLC converter, which affects the no-load regulation capability. Furthermore, the relationship among design parameters is analyzed and the design guideline is also provided to achieve no-load regulation at the specified maximum switching frequency. To verify the effectiveness of the proposed design, 400 V input and 50 V/200 W output prototype is built and tested. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a neutral point (NP) voltage balancing scheme suitable for three phase 5-level active NP clamped and T-type NP clamped (TNPC) inverters is discussed. Carrier-based pulsewidth modulation is used for the balancing of dc-link capacitors and floating capacitors (FC) in the inverter. The FC voltages are regulated with the help of redundant switching states of pole voltage levels and the dc-link capacitor voltages are controlled using zero-sequence voltage injection. Though the balancing approaches are different for dc-link capacitors and FCs, they are not decoupled from each other. This is due to the effect of certain redundant switching states used for FC balancing causing NP voltage variation. To address this issue, the redundant state time ratio is estimated online every sample and based on this dynamic time ratio, an optimal relationship between neutral current and zero-sequence voltage is established. It is found that the use of dynamic time ratio helps in achieving better transient performance than that of generally adopted fixed time ratio. Simulation and experimental results prove that the proposed balancing scheme works well under all operating conditions and exhibits fast and stable transient performance. [ABSTRACT FROM AUTHOR]

Without active control, the voltage fluctuations of the dc-link and flying capacitors in a 4-level hybrid-clamped converter (4L-HCC) become excessively large in low-frequency operation. This paper studies the switching state redundancy inherent in a 4L-HCC and proposes a new capacitor voltage balancing and stabilizing method to minimize the dc-link and flying capacitor voltage fluctuations. A straightforward algorithm is developed based on a logic table to select the suitable switching states. Verified by simulation and experimental testing results, the new method and algorithm virtually eliminate all the big voltage fluctuations of capacitors at low and zero frequencies, greatly enhancing the robustness and reliability of a 4L-HCC. The capacitor size can be reduced by more than 80% compared with the conventional method. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

A hybrid modular multilevel converter (MMC) consists of both half-bridge submodule (HBSM) and full-bridge submodule (FBSM) in each arm. It has several advantages over other MMC topologies, such as low system loss, reduced cost of the system, but still maintains fault ride-through capability against a solid dc-side fault. However, the hybrid MMC may have a difficulty of submodule (SM) voltage balancing under variation of its dc-bus voltage. Since the voltage unbalance of SMs results in SM capacitor overvoltage and low reliability of the system, the voltage of SMs, which can be also represented as energy of SMs, should be balanced at all time. In this paper, to extend the narrow adjustable range of dc-bus voltage due to the voltage/energy unbalance, new feedback and feedforward energy balancing controllers with revised sorting algorithm are proposed. The feedback control ensures the zero steady-state error, while the feedforward control provides fast dynamic response in the energy balancing control. By applying the proposed control scheme, the hybrid MMC can keep the voltage balance between HBSMs and FBSMs in wider range of dc-bus voltage. The full-scale computer simulation results and down-scale experimental results demonstrate the validity of the proposed control scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a method for fault-tolerant operation of medium voltage modular multilevel converters (MMCs) with phase-shifted carrier (PSC) modulation. The existing methods need to recalculate and reconfigure all the carriers every time a submodule (SM) fails. However, the proposed method combines the sorting voltage balancing control and the PSC modulation to avoid breaking the symmetry and balance of the carriers. Therefore, the modulation stage in the proposed method can be kept the same and the output voltage of the MMC can remain unchanged without causing voltage mismatch. Moreover, considering the modulation margin and the physical redundancy configuration, two fault SM replacing strategies, i.e., optimal dynamic performance and optimal electrical stress are proposed as well as their respective control structures. Compared with the normal operation of the MMC, the proposed fault-tolerant operation method has only slightly changed the control system and thus the added calculation burden and control complexity can be ignored, which is extremely beneficial for the practical implementation. The effectiveness and performance of the proposed operation method are carefully verified by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

This paper presents a modified negator-based switched-capacitor (NSC) dc–dc converter to achieve fine-grained voltage conversion ratios. Based on a concept of reconfiguring several 2:1 switched-capacitor (SC) converters in series and parallel at the last stage, the proposed asymmetrical shunt SC (ASSC) converter provides more controllable variables of forward gain and feedback gain to decide different power path interconnections and increase the available conversion ratios, with a little sacrifice of its slow switching limit output impedance. The switching loss of the bottom-plate parasitic capacitance in the ASSC converter is less than the switching loss of the NSC topology because the two moderate voltages instead of the power rail are fed to the last stage 2:1 SC unit and reduce the voltage swing. The bottom-plate swapping prototype further reduces the parasitic loss at high conversion ratios. To handle a large number of conversion ratios in closed-loop regulation, the ASSC converter uses the fast optimum ratio searching (FORS) technique, which evaluates the transient voltage drop to quickly search for target ratios and reduce the transient recovery time. A three-stage ASSC converter achieving 187 conversion ratios is fully integrated in the test chip, which is fabricated in 0.25-μm CMOS process with an active area of 7.14 mm2. Furthermore, 2389 conversion ratios can be derived in theory for a four-stage ASSC converter. The proposed reconfigurable SC converter provides an output voltage range of 0.4 to 2.8 V under no load conditions, and greater than 80% power efficiency at an output voltage level of 0.9 to 1.5 V over a load range of 3 to 9.5 mA. Due to the FORS technique, the measured transient recovery time is reduced from 7 to 1.5 μs in case of load current step of 7 mA. [ABSTRACT FROM AUTHOR]

In recent years, dc distribution grids have become increasingly popular because of the interest in the diffusion of distributed renewable energy. In this scenario, dc distribution grids are also favored because of the increased use of batteries and power electronic loads. The main limit to the spread of dc grids is their protection devices, which still present several problems. At present, protection devices are represented by traditional mechanical breakers or static electronic components. The first, which interrupt dc currents, have good reliability but need maintenance and have long intervention periods. In contrast, electronic switches are fast and reliable, but they reduce the efficiency because of their voltage drop. In this scenario, some hybrid breakers have been proposed to obtain the advantages of both devices. The previous solutions of hybrid breakers still suffer several critical issues and, usually, are not capable of protecting a system from short circuits without significantly reducing their lifetime. In this paper, a new low-voltage hybrid circuit breaker topology is proposed. The procedure to dimension all of the active and passive components in the device is analyzed, and the effectiveness of the proposed solution is proven by means of experimental results obtained using a prototype. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

In high-voltage applications, the magnitude of total semiconductor losses (on-state and switching) determines the viability of modular-type multilevel converters. Therefore, this paper presents a new cell arrangement that aims to lower total semiconductor loss of the modular multilevel converter (MMC) to less than that of the half-bridge modular multilevel converter (HB-MMC). Additional attributes of the proposed cell are: it eliminates the protective thyristors used in conventional half-bridge cells that deviate part of the dc-fault current away from the antiparallel diode of the main switch when the converter is blocked during a dc short-circuit fault, and it can facilitate continued operation of the MMC during cell failures without the need for a mechanical bypass switch. Thus, the MMC that uses the proposed cell retains all advantages of the HB-MMC such as full modularity of the power circuit and internal fault management. The claimed attributes of the proposed cell are verified using illustrative simulations and reduced scale experimentations. Additionally, this paper provides brief and critical discussions that highlight the attributes and limitations of popular MMC control methods and different MMC cells structures proposed in the literature, considering the power electronic system perspective. [ABSTRACT FROM AUTHOR]

This paper extends the voltage-doubler concept to the single-phase SEPIC rectifier in discontinuous conduction mode and, as a consequence, novel rectifiers are proposed. A comparison with the classic SEPIC rectifier shows that the proposed converters can either provide reduced voltage stress on the semiconductors for the same output voltage level or supply double the gain of the output voltage with the same voltage stress. The proposed voltage-doubler SEPIC rectifiers provide a high power factor with no current control and they can be applied in order to improve the static gain of the structure, which can make the SEPIC rectifier suitable for applications that require a high voltage level. In this paper, the generic structure based on a three-state switch, four different implementations of the proposed concept (including bridgeless structures), steady-state analysis, a dynamic model, system control, and experimental results are presented. The proposed rectifiers were verified by experimental results obtained with a prototype built with the following specifications: 1000 W output power, 220 V input voltage, 400 V output voltage, and 50 kHz switching frequency. Peak efficiency of 95.84%, THD of 2%, and power factor of 0.9997 were obtained and, most importantly, double the gain of the output voltage was verified. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless bipolar multistring dc–dc converter based on series-connected submodules. It is intended for converting dc voltage and managing power flow for medium-voltage high-power dc networks. This new converter has a flexible structure of multistrings and each string consists of four valves with their middle points crossly connected through two cost-effect dc capacitors to form power balancing channels between valves. Its transformerless solution and single-stage configuration greatly reduce the converter volume, weight, cost, and power loss. In this paper, voltage ratio range and its influence on submodule design are analyzed. Moreover, a control strategy with focus on current sharing control and submodule capacitor voltage control is proposed. A simulation model rated at ±10 kV 2 MW verifies the feasibility of the proposed dc–dc converter. Experimental results obtained from a 100-V 1.5-kW laboratory setup also confirm the validation of the proposal. [ABSTRACT FROM PUBLISHER]

A family of bidirectional switched-capacitor (SC) converters with high-gain ratio of any positive integer is proposed in this paper for distributed energy resources applications. As compared with other existing SC converters achieving a same conversion gain, the main advantages of the proposed converters are that they require a relatively lower number of switches and capacitors, have a relatively lower switch's and capacitor's stress, and that their associated driver circuits are simpler to realize. Importantly, with the achievable conversion ratio being flexible and that the input and output of the proposed converters are of common ground, the proposed converters are widely suitable for many applications. Moreover, as the proposed converters do not possess magnetic component or any component that can severely degrade the converters’ performance at high temperature, they are especially useful for high-temperature applications. Besides, the proposed converters are capable of delivering bidirectional power, which is a key requirement for emerging applications with battery storages. Different aspects of the proposed converters, including a simple auxiliary power supply circuit for the MOSFETs’ drivers, will be discussed in this paper. A nine-time SC converter prototype that operates with 20-V input voltage, 100-W output, and at 75 kHz, is constructed and tested. Experiment results show that the maximum efficiency achievable with this prototype is over 98% (without driver's loss) and the efficiency over the entire load range between 25 and 100 W is over 95.5% including the driver's loss. The output voltage ripple of the SC converter is less than 1%. When the SC converter is open-loop controlled, the load voltage regulation is relatively well kept at less than 5% between full load and no load conditions. [ABSTRACT FROM PUBLISHER]

In this paper, the Z-source converter is introduced to power factor correction (PFC) applications. The concept is demonstrated through a wireless power transfer (WPT) system for electric vehicle battery charging, namely Z-source resonant converter (ZSRC). Due to the Z-source network (ZSN), the ZSRC inherently performs PFC and regulate the system output voltage simultaneously, without adding extra semiconductor devices and control circuitry to the conventional WPT system such as conventional PFC converters do. In other words, the ZSN can be categorized as a family of the single-stage PFC converters. In addition, the ZSN is suitable for high-power applications since it is immune to shoot-through states, which increases reliability and adds a boost feature to the system. The ZSRC-based WPT system operating principle is described and analyzed in this paper. Simulations and experimental results based on a 1-kW prototype with 20-cm air gap between the system primary and secondary sides are presented to validate the analysis and demonstrate the effectiveness of the ZSN in the PFC of the WPT system. [ABSTRACT FROM PUBLISHER]

This paper proposes a new control method of three-phase active power filters for reducing the dc capacitor voltage fluctuations in transient load change. The proposed control method introduces a new \boldsymbolk-step compensator, which maintains the mean active power flowing into the dc capacitor at zero every \boldsymbol1/(k-1) ac line period. Therefore, the compensator can suppress the transient voltage fluctuations across the dc capacitor even when a quick load change occurs. This paper theoretically reveals the relationship between the step number \boldsymbolk and the reduction effect of the dc voltage fluctuations. The experimental setup introducing the proposed seven-step compensator exhibits a good suppression effect of the dc voltage fluctuations and makes it possible to reduce the required capacitance value of the dc capacitor by a factor of seven. [ABSTRACT FROM AUTHOR]

A decentralized control method for power module (PM) capacitor voltage and switching frequency balancing in modular multilevel converter is presented in this paper. The proposed method is composed of a central controller, six arm controllers, and several group controllers. The group controller is only in charge of the PM capacitor voltage balancing within a corresponding group, and the arm controller is in charge of the PM capacitor voltage balancing and PM switching frequency balancing among groups within an arm. A control method based on a PI controller using the average PM capacitor voltage of each group to keep voltage balancing among groups is proposed. A dynamically adjusted extra exchange number strategy based on the voltage difference of each group is also developed to balance the PM switching frequency among groups. The key advantages of the proposed method are the reduction in the number of the PM capacitor voltages that need to be transmitted and sorted in each group controller as well as the reduction of the communication burden between the group and arm controllers. The proposed method is also highly effective under PM faults. The voltage ripple factor and the PM switching frequency of the proposed method are almost identical to the conventional centralized methods. The RT-LAB-based real-time control hardware in the loop test results of a ±350 kV/1000 MW MMC system verify the correctness and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are increasingly being considered or used for various medium voltage applications. Multiple control methods have been proposed for the control of the direct to three-phase modular multilevel converter. They differ one from another in the way the capacitor voltage ripples are handled, i.e., either neglected, estimated, reconstructed by filtering or measured. This has implications on the performance level that can be obtained. This paper provides insights on the advantages and drawbacks of each control method, in inverter and rectifier mode, with a fair and thorough assessment supported by extensive simulations, with converter ratings that are realistic for medium voltage applications. Finally, this works highlights the impact of the higher dynamics for medium voltage direct current (dc) applications compared to high voltage dc ones on the choice of the control method. [ABSTRACT FROM AUTHOR]

An LLC resonant converter would have light-load voltage regulation problems due to the effect of parasitic capacitances in a high-frequency range. In this paper, an energy feedback control method is proposed to improve the light-load regulation capacity by using synchronous rectifiers (SRs). The SR bridges are controlled ahead of the primary inverter bridges to deliver the energy from load to source, reducing the output voltage independent of the load. Then the desired voltage can be achieved even in no-load conditions by regulating the operation time of the energy feedback mode. The gain, voltage ripple, and efficiency performances of the proposed control method are discussed based on the precise analysis and an accurate model of the converter. Moreover, the light-load operations of the LLC resonant converter are analyzed deriving the critical load condition. Finally, the proposed control method is verified by the experiments of a 12 V/8 A LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

This paper describes a control algorithm based on modified enhanced phase-locked loop (MEPLL) in dynamic voltage restorer (DVR). It compensates distortions and unbalances in the supply voltage along with voltage sag/swell. Three-phase MEPLL extracts the fundamental positive-, negative-, and zero-sequence components from the distorted/unbalanced signals. Further fundamental positive-sequence components are used in the reference load voltage calculations. In addition to track the angle of the input signals similar to the conventional PLLs, the proposed algorithm (MEPLL) offers features of getting fundamental and sequential components in case of distorted or unbalanced grid voltage for all the three phases simultaneously. Optimization approach named as autonomous groups particle swarm optimization, a variant of PSO is used for the calculation of PI-controller gains. The integrated time square error is used as a cost function for optimization of an error between the reference and actual values. This approach of tuning PI gains improves the performance by eliminating the manual process. The proposed control algorithm is implemented in DVR system using MATLAB software and validated in a laboratory environment. The performance shows that the proposed control algorithm gives time effective and satisfactory solution for the unpredictable issues mentioned. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

In this paper, a family of step-up resonant switched-capacitor converters (RSCs) with a continuously adjustable conversion ratio is proposed based on the Cuk dual-resonance core (DRC) featuring two resonant paths. By adopting the on-time fixed frequency modulation, the two resonant paths can conduct simultaneously and satisfy the charge balance of the flying capacitor during the overlapping period. As a result, the conversion ratio—upper bounded by two determined by the circuit configuration—can vary continuously and efficiently even at the light load condition (1/10 of the rated power). A comprehensive analysis—the operation principle, voltage-gain curve, and voltage/current stresses—about the DRC is given. In addition, the Cuk DRC was extended to the series–parallel switched-capacitor converter (SCC), Fibonacci SCC, and voltage doubler to form a family of step-up RSCs, whose voltage-gain curves of different topologies are derived. Moreover, a characteristic comparison between the Cuk DRC and the traditional “direct” and “indirect” resonant core is given. Then, a 48 to 62–94.6 V resonant core with peak efficiency 97.8% and maximum power 120 W under the open loop condition was built. The analyses were verified by both experimental and simulation results. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

Small dc-link drive systems, built with film capacitors in the dc-link, present a new trend in many industrial applications and are obtaining increasing interests. It has the advantages of longer lifetime and the possibility to achieve a more compact design of the capacitor bank, especially at medium and high power rates. However, it could exhibit instability problems, mainly in the form of oscillations. The unexpected oscillation may result in overvoltage and shorten the lifetime of the power devices and the dc-link capacitors; increase the total harmonic distortion and also the partially weighted harmonic distortion of the grid supply current. Therefore, active damping methods are usually needed in order to stabilize such drive systems. This paper first analyzes the system characteristics and the principles of existing active damping methods. Then, a new voltage modulation based method named as “virtual positive impedance” method is introduced to guarantee the dc-link stability. This new approach is simple to apply and its implementation does not require the knowledge of system parameters and machine operating conditions. The proposed method is analyzed in details and verified by experiments. [ABSTRACT FROM AUTHOR]

In a dc pulsed power supply (PPS), its instantaneous output power is pulsed, and its input power is required to be constant. In order to balance the instantaneous power difference, a storage capacitor is usually connected to the output terminal of the PPS. However, the storage capacitor is extremely large when the pulse repetition frequency (PRF) is relatively low. In this paper, an active capacitor converter (ACC) is adopted in place of the storage capacitor. In the ACC, the storage capacitor is greatly reduced by intentionally increasing its voltage ripple. To improve the tracking ability of the terminal current of the ACC, a current reference feedforward control scheme is proposed, and it is further simplified for avoiding the use of the reciprocal and square root circuits. In order to improve the dynamic response of the PPS when the pulsed load is triggered on and terminated, several methods are proposed. The methods of imposing a negative dc bias on the current reference and peak voltage control for the ACC storage capacitor are aiming for reducing the undershoot and overshoot of the output voltage, and two fast voltage loops are incorporated for limiting the maximum and minimum voltage of the storage capacitor in the ACC. Finally, a prototype with the output peak power of 2 kW, the output average power of 300 W, and the PRF of 150–300 Hz is fabricated and tested to verify the validity of the proposed PPS and control schemes. [ABSTRACT FROM AUTHOR]

In this paper, a new pulse width modulation (PWM) scheme and commutation method is presented for one phase loss operation of three-phase isolated buck matrix-type rectifier. With the proposed PWM scheme, the maximum allowable voltage gain for one phase loss operation can be achieved, which permits the continuous operation of the converter to deliver two-third of the rated power and regulate the output voltage with maximum output voltage drop less than 5% of nominal output voltage. In addition, with the proposed commutation method, a safe transition from one phase loss operation to normal operation and vice versa can occur with minimum commutation steps (two-step) under zero-voltage switching condition. The performance of the proposed PWM scheme and commutation schemes with one phase loss operation is evaluated and verified by simulations and experiments on a 5 kW prototype. [ABSTRACT FROM AUTHOR]

The neutral-point potential fluctuation in single-phase three-level rectifiers leads to coupling between the line current regulation and dc-link capacitor voltage balancing, deteriorating waveform quality of the line current. For addressing this issue, this paper proposes a low-complexity model predictive current control (MPCC) with constant switching frequency, which achieves a decoupling control of the line current and the neutral-point potential under the unbalanced load condition. The switching frequency is fixed by combining the MPCC scheme with predefined switching sequences. The boundary of the durations for voltage vectors in switching sequences is presented to balance the capacitor voltage without worsening the line current quality. The optimal switching sequence and the corresponding optimal durations of voltage vectors in the switching sequence are readily derived without the assessment of the cost function, which dramatically simplifies the complexity of the MPCC scheme. Finally, simulations and experimental results are conducted to verify the effectiveness of the proposed MPCC scheme. [ABSTRACT FROM AUTHOR]

High-frequency (HF) switching and ac-side unbalanced loads challenge smart transformer (ST)-fed hybrid grids (both ac and dc), causing common-mode (CM) voltage variations and dc-link oscillation. The HF switching introduces an HF CM voltage and the ac grid unbalanced loads introduce a fundamental frequency CM voltage in hybrid grids. The CM voltage in ST-fed distributed grids degrades the power quality, threatens the safety of the connected devices, and potentially constitutes a health risk for the operators of such devices. Therefore, this paper systematically analyzes the root causes of the ST CM voltage variations and the impacts on hybrid grids. Based on the two typical configurations (three- and four-leg converters), the performance and requirements of CM inductor filter and bypass CM filter on HF CM voltage suppression are studied in detail. By considering the CM voltage suppression and dc capacitor lifetime, a four-leg converter with improved modulation strategy and small dc bypass film capacitor is proposed. The simulation and experimental results clearly verify the feasibility and correctness of the proposed strategies. [ABSTRACT FROM AUTHOR]

In this paper, a modular control approach has been proposed for a single- and three-phase differential-mode Ćuk inverter (DMCI) operating with a recently proposed discontinuous-modulation scheme that offers tangible performance benefits over conventional continuous modulation scheme. The modular control scheme uses a combination of a transformation and adaptive control law to meet tracking requirements in the presence of converter nonlinearity. Experimental results for the single- and three-phase DMCI are provided for startup, steady state, load transition, and total harmonic distortion using different types of loads, which validate the efficacy of the implemented modular tracking controller. Further, detailed stability of the closed-loop DMCI module is provided. [ABSTRACT FROM AUTHOR]

This paper proposes a new control technique, which only employs the primary-side controller and load identification approach to adjust charging voltage/current for series–series (SS) and series–parallel (SP) compensated wireless power transfer (WPT) systems. The advantages are that dual-side wireless communication for real-time charging current/voltage adjustment is avoided as well as it is suitable for different charging modes, e.g., constant voltage (CV) and constant current (CC) charging defined by the battery charging profile. The load identification approach, which utilizes reflected impedance theory and quadrature transformation algorithm for calculating the active power, is proposed to estimate the equivalent load resistance of battery. Then, the CV/CC charging for both SS and SP compensation are achieved by the PI-controlled phase-shift H-bridge inverter. The simulation and experimental results validate the feasibility of proposed control method. During the CC charging, 3.01 and 3.03 A for SS and SP compensation with the error of 1.2% and 1.4% are achieved. During the CV charging, 25.8 and 25.7 V for SS and SP compensation with the error of 1.1% and 1.3% are realized. The proposed method improves the performance of both SS- and SP-compensated WPT systems to be more suitable for the applications that require compact and lightweight receiver. [ABSTRACT FROM AUTHOR]

This paper proposes a circuit structure that can improve the power-conversion efficiency \eta e of an AC–DC boost converter. The circuit uses a 1:1 transformer and a voltage boost circuit composed of an inductor, a capacitor, and a diode. The transformer forces the converter to operate in continuous conduction mode for input current, and thereby reduces input ripple. The voltage boost circuit enables the switch to operate in critical conduction mode, so the power loss due to turn-on of switch and reverse recovery of diode is minimized. The proposed converter has high \eta e over a wide range of AC input voltage $V_{{\rm{ac}}}:\,\eta _{e}= 92.9\% $ at $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}} and \eta e= 97.4\% at V{\rm{ac}}= {\text{265}}\,{\text{V}}, when the converter was operated at DC output voltage of 400 V and output power of 500 W. The temperature of the switch stabilized at ∼84 °C for $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}}$ , at ∼70 °C for $V_{{\rm{ac}}}= {\text{110}}\,{\text{V}}$, and at ∼42 °C for $V_{{\rm{ac}}}= {\text{220}}\,{\text{V}}$, whereas that in other AC–DC converters either failed or stabilized at much higher levels. The proposed converter is well suited to systems that require an input voltage range of 85–265 V in root-mean-square value. [ABSTRACT FROM AUTHOR]

This paper introduces a hybrid modular multilevel converter (MMC) with the full-bridge submodules (FBSMs) inserted in the ac side. It is intended for redistributing arm powers of the MMC system to reduce the submodule (SM) capacitor voltage fluctuation by injecting high-frequency powers in upper and lower arms without disturbing the output voltage. New power distribution of the hybrid MMC system can be realized by controlling the SMs and FBSMs working under the high-frequency powers. The proposed FBSMs in the hybrid MMC system also perform as the harmonic power generator to eliminate the common-mode voltages in the ac side. Since the FBSMs locate in the ac side of the hybrid MMC system, the traditional MMC control method can be directly applied in arm control of the hybrid MMC system. Meanwhile, relationship between the arm powers and SM capacitor voltage has been analyzed in detail to reduce the SM capacitor voltage ripples by redistributing the frequency spectrum of arm powers. Simulation and experimental results have also verified the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]