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Electrolytic capacitorless vector-controlled interior permanent-magnet synchronous motor (IPMSM) drives have many advantages, such as higher reliability, longer lifetime, and lower cost. However, the dc-link may suffer from the overvoltage during motor transient process due to the use of slim film capacitors in the diode rectifier front end. The conventional antiovervoltage method by controlling the quadrature axis current will lead to energy control error, which causes large dc-link voltage control error. In this paper, a novel antiovervoltage control scheme with coefficient autoregulation is proposed based on the concept of system loss. A dual antiovervoltage controller is designed to enhance the voltage control performance by controlling both the direct and quadrature axis currents to achieve more effective active braking. The coefficients of the dc-link voltage controller are autoregulated to maintain the enough stability margin during the regenerative braking. By using the proposed method, the dc-link overvoltage phenomenon can be avoided while guaranteeing the maximum copper loss during the braking process. The proposed algorithm is ultimately verified on an electrolytic capacitorless IPMSM drive. [ABSTRACT FROM AUTHOR]

In this paper, a family of new step-up series–parallel dual resonant switched-capacitor converters (SP-DRSCs) is proposed to extend the conversion ratio for high step-up applications. The converters feature a wide gain range, continuously adjustable, and enhanced light-load voltage regulation. All flying capacitors operate in resonance, eliminating high transient current spikes and charge sharing losses. Thus, zero-current-switching (ZCS) turn-on for all transistors and ZCS turn-off for all diodes are achieved. A comprehensive analysis of the operation principle, voltage-gain curves, stable regulation range, and voltage and current stress is given. An analytical method to quantify the passive component volume for the group of step-up dual resonance switched-capacitor converters is presented. Further design considerations to optimize the passive component volume of the proposed SP-DRSC and the effect of bulky bypass capacitors on the volume are discussed. [ABSTRACT FROM AUTHOR]

An isolated bidirectional dc–dc converter, which combines parallel-connected two-level converters (TLCs) on the medium-voltage side and a modular multilevel converter (MMC) on the high-voltage side, namely a TLC-MMC converter, is a promising candidate for the interconnection of medium-voltage direct current (MVDC) and HVdc grids. Different from typical phase-shift controlled isolated bidirectional dc–dc converters, transformer currents of a TLC-MMC converter are regulated by the MMC in a closed-loop manner in order to achieve extremely low switching losses and low total device rating of power-semiconductor devices in TLCs. This paper addresses the dedicated operation technique and the voltage-balancing control of the TLC-MMC converter. The MMC in the TLC-MMC converter operates with six-step phase voltages and sinusoidal phase currents. Such an operation makes the MMC present remarkable differences to ac–dc applications. The direct-modulation technique, which is the most-used technique performed to MMCs in line-frequency ac–dc power conversion, has been concluded not applicable to the MMC in a TLC-MMC converter due to the significant sixth-order oscillation resulted in the dc-link voltage. Thus, the indirect-modulation technique is employed, and consequently a closed-loop voltage-balancing control is mandatory for the MMC. Possible measures for voltage balancing have been explored, and effective voltage-balancing control with a simplified implementation is proposed. Validity and effectiveness of the proposed control strategy have been verified by both simulations and experiment using a downscale prototype. [ABSTRACT FROM AUTHOR]

Compared with the well-known modular multilevel cascaded converter with single-star bridge-cells (MMCC-SSBC), the hybrid cascaded converter (HCC) has the advantage of the lower component count of power transistors and dc capacitors. Thereby, this paper explores the HCC in grid applications and proposes a hierarchical control scheme, which allows the HCC to operate under unbalanced grid conditions and power imbalances among all cells. The HCC is further compared with the MMCC-SSBC under these unbalanced conditions to evaluate its performance. The laboratory test results are provided to verify the proposed control scheme and the comparison. The operational flexibility and reliability of the HCC are also discussed. [ABSTRACT FROM AUTHOR]

This paper introduces the high-frequency link concept into the modular multilevel converter (MMC) topology, which can totally reduce the individual dc-link capacitors at the high-voltage side. The proposed converter, called isolated MMC, has basic triple ports of medium-voltage ac, medium-voltage dc, and low-voltage dc. Thus, it is especially suitable for hybrid dc and ac applications in power generation and transmission, such as solid-state transformer. The fundamental principle and applied control scheme of phase-shift pulsewidth modulation are presented in detail. The design of the voltage clamping circuit and analysis of duty loss are carried out. The experimental results are given to illustrate the efficient operation characteristics. [ABSTRACT FROM AUTHOR]

This paper proposes the design of gray wolf optimizer (GWO) algorithm-based fractional order proportional integral (FOPI) controller for power factor correction (PFC) using interleaved dc–dc single ended primary inductance converter converter with improved performance characteristics such as speed, accuracy, and stability. The detailed analysis and modeling of the proposed converter are presented. The optimal parameters of FOPI controller are obtained using GWO algorithm to improve the speed of response of the system. FOPI controller provides better performance in terms of robustness and stability since it has one more adjustable parameter than the conventional proportional integral (PI) controller. The cascade control strategy is implemented for the proposed converter with GWO-based FOPI controller as inner current and outer voltage controllers for PFC and load voltage regulation. The performance characteristics of the proposed system are analyzed and compared with conventional and other optimization techniques using MATLAB/Simulink software. A prototype of the proposed converter controlled by TMS320C2000 microcontroller for an output power of 200 W is tested and validated with the simulation results. The proposed system is used for powering devices like robots in critical applications such as military, space craft, etc., where stability, speed, and accuracy are major concerns. [ABSTRACT FROM AUTHOR]

A novel nine-level inverter topology for low-voltage applications is proposed in this paper. Each phase of the inverter is composed of a T-type three‐level cell and an active neutral point clamp three‐level cell. The operation principles and current conduction paths are analyzed in detail and phase-disposition sinusoidal pulsewidth modulation is used to balance voltages of flying capacitors and neutral point. The mathematical relationship between the capacitance and the desired ripple in the inverter output is established to select the intermediate capacitance value. Compared with other nine-level inverters suitable for low-voltage applications, the proposed inverter has advantages in a number of gate drivers, a number of dc sources, and efficiency. Simulation and experimental results under different settings of modulation index, power factor, output frequency, and load are presented to verify the effectiveness and performances of the proposed inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a constrained modulated model-predictive control (M $^{2}$ PC) scheme for an LC-filtered voltage-source converter (VSC). To tackle the coupling effects of the state variables in a second-order LC filter, a dual-objective cost function (CF) is used to explicitly track both capacitor voltage and inductor current references, which can achieve an improved voltage quality. To handle the state and control input constraints of VSCs, a constrained M $^{2}$ PC scheme is proposed with an “online post-correction” constraint-handling technique. First, the unconstrained optimal voltage vector (OVV) is derived. It is generated by seeking the minimum analytical solution of the CF offline, simplifying the online implementation. Then, an “online post-correction” strategy is employed by reconsidering the constraints to correct the precalculated OVV online, which guarantees the future states within the allowed range. Finally, the corrected OVV is synthesized by the space vector modulation, resulting in a fixed switching frequency and low harmonics. Compared with the typical constrained model-predictive control, the presented scheme has the advantages of improved steady-state performance, flexible constraint-handling ability, and lower computational cost. Additionally, design procedures for weighting factor selection in the CF are given. Comparative experiments are investigated to verify the presented control strategy. [ABSTRACT FROM AUTHOR]

A single-phase ac–dc converter with dual-output rectifier (DOR) and dual-input dc transformer (DI-DCX) is proposed in this paper. A voltage-split/sigma principle is adopted, that is, the grid voltage is split into two variable dc bus voltages first by the front-stage DOR, and then the two bus voltages are combined into an adjustable output voltage by the downstream DI-DCX. DC output voltage is directly regulated by the front-end rectifier. Therefore, no voltage regulation is required for the dc–dc stage, and a DI-DCX with optimized operation condition is employed to improve the overall efficiency of the ac–dc converter. Moreover, since the DOR has two different output voltages, three-level characteristic is achieved naturally to reduce switching losses of the converter. Zero voltage switching of all the active switches in the DI-DCX is realized as well. Detailed operation principles, control and modulation strategies, and characteristics of the proposed ac–dc converter are analyzed in detail. Experimental results of a 1.5-kW prototype are provided to verify the effectiveness of the proposed converter. [ABSTRACT FROM AUTHOR]

A typical finite-set model predictive control (FS-MPC) scheme for LC-filtered voltage source inverters (VSIs) requires measurements of capacitor voltage and inductor current as well as load current measurement or estimation, which increases the system complexity and cost. To reduce the number of sensors in typical FS-MPC, this paper proposes a new current-sensorless FS-MPC scheme for LC-filtered VSIs. First, based on the inner relationship of the predictive matrices, the predictive model is exactly simplified with the capacitor voltage and its current as the state variables, making it suitable for current-sensorless control. Then, to eliminate the current sensors for cost reduction and reliability enhancement, the dynamic model is reconstructed and an easily implemented capacitor current estimator is designed, which can achieve a comparable performance with typical FS-MPC scheme. Considering the inevitable control delay in digital implementation, the delay compensation is inherently obtained by using the proposed estimator. In addition, the proposed control scheme is flexible to various cost functions and can also reduce the computational cost. The feasibility of the presented control scheme under load variations and model mismatches are verified by the comparative simulation and experimental results with typical FS-MPC. [ABSTRACT FROM AUTHOR]

In the no-load condition, LLC converter usually fails to regulate its output voltage although it operates at a high switching frequency. Till now, it is hard to obtain the exact relationship between design parameters and the maximum switching frequency for no-load regulation capability. In this paper, a specific criterion for no-load regulation of LLC converter is provided, without using active components or other modulation schemes. By analyzing the macroscopic switching period and microscopic switching transition in the no-load condition, it is shown that not only the peaking resonant current during the switching transition, but also the resonant tank design affect the no-load regulation of the LLC converter, which affects the no-load regulation capability. Furthermore, the relationship among design parameters is analyzed and the design guideline is also provided to achieve no-load regulation at the specified maximum switching frequency. To verify the effectiveness of the proposed design, 400 V input and 50 V/200 W output prototype is built and tested. [ABSTRACT FROM AUTHOR]

The low-frequency fluctuation over the capacitor voltages seriously limits the development of medium-voltage variable-speed drives with a modular multilevel converter (MMC). Therefore, this paper presents an effective strategy of the low-speed and start-up operation for an MMC-based motor drive. The proposed strategy properly coordinates the improved injection and the reduced average capacitor voltage with high applicability. The specific interactions between the control parameters and the system metrics are analyzed to give the detailed steps of the parameters designing. Hence, based on the derivations, the proposed method enables the low-frequency operation under the nominal load torque with decreased injected components and reduced peak capacitor voltages. What is more, two start-up strategies that, respectively, aim at different objectives for the coordinated strategy are proposed, indicating satisfying control performances for the practical applications. The injected common-mode voltage and circulating current in the proposed method are designed to have a great reduction. Thus, the unfavorable risks for the motor are evidently decreased for better stability. The reduced peak current also lessens the high stress on switching devices with desirable reliability. The simulation and experiment results of an MMC-based motor drive prototype prove the effectiveness and superiority of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a model predictive current control (MPCC) for three-phase four-switch converters (TPFSC) connected to surface permanent magnet synchronous generators (SPMSGs) in oscillating water column (OWC) wave energy plants, that brings some benefits over the existing control methods used in this type of plants. The proposed MPCC for TPFSC follows the current references with great accuracy, whereas the switching frequency of the insulated-gate bipolar transistor (IGBTs) is fixed and low. This method minimizes the current reference tracking error, and its fast response makes it suitable for the power take-off systems present in wave energy converters. Furthermore, the system features a fast capacitor voltage offset suppression control. The dynamic performance and the voltage offset control of the proposed strategy for TPFSC feeding a SPMSG is evaluated in the Simulink environment. Later, experimental studies are carried out on an 8.7 kW laboratory SPMSG prototype. Finally, the capability of the proposed method to harvest the maximum energy from irregular waves is assessed using an OWC power plant emulator. [ABSTRACT FROM AUTHOR]

The three-level full-bridge (TLFB) dc−dc converter has been widely used in high-voltage, high-power applications. In the experimental test, the neutral-point voltage deviation appears; moreover, it has also been found out that if the flying capacitors are introduced, the input capacitor voltages could realize self-balance even if no active balancing solutions are adopted. In the previous publications, the role of flying capacitors is generally considered to extend the range of soft switching; however, the self-balance ability has not been mentioned or investigated in any publications thus far. In order to fill this gap, this paper provides the detailed mode operation analysis of the TLFB converter and reveals the cause of the imbalance. In addition, the mechanism of the self-balance ability provided by the flying capacitors is explained in detail, which gives a deep insight into the converter. At last, the influence factor of the voltage error in steady state has been analyzed, and the specific expression of the voltage error is also derived. The feasibility of the theoretical analysis is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a neutral point (NP) voltage balancing scheme suitable for three phase 5-level active NP clamped and T-type NP clamped (TNPC) inverters is discussed. Carrier-based pulsewidth modulation is used for the balancing of dc-link capacitors and floating capacitors (FC) in the inverter. The FC voltages are regulated with the help of redundant switching states of pole voltage levels and the dc-link capacitor voltages are controlled using zero-sequence voltage injection. Though the balancing approaches are different for dc-link capacitors and FCs, they are not decoupled from each other. This is due to the effect of certain redundant switching states used for FC balancing causing NP voltage variation. To address this issue, the redundant state time ratio is estimated online every sample and based on this dynamic time ratio, an optimal relationship between neutral current and zero-sequence voltage is established. It is found that the use of dynamic time ratio helps in achieving better transient performance than that of generally adopted fixed time ratio. Simulation and experimental results prove that the proposed balancing scheme works well under all operating conditions and exhibits fast and stable transient performance. [ABSTRACT FROM AUTHOR]

Without active control, the voltage fluctuations of the dc-link and flying capacitors in a 4-level hybrid-clamped converter (4L-HCC) become excessively large in low-frequency operation. This paper studies the switching state redundancy inherent in a 4L-HCC and proposes a new capacitor voltage balancing and stabilizing method to minimize the dc-link and flying capacitor voltage fluctuations. A straightforward algorithm is developed based on a logic table to select the suitable switching states. Verified by simulation and experimental testing results, the new method and algorithm virtually eliminate all the big voltage fluctuations of capacitors at low and zero frequencies, greatly enhancing the robustness and reliability of a 4L-HCC. The capacitor size can be reduced by more than 80% compared with the conventional method. [ABSTRACT FROM AUTHOR]

Despite several studies and approaches, the design of current controllers for grid-connected converters via LCL filters is still a challenging task. This is mainly due to the parametric uncertainties and the grid background voltage distortions to which the system is submitted. In order to overcome these inherent system challenges, this paper proposes a multiloop control framework that simplifies the system dynamics of the overall circuit by splitting it in two equivalent sub-circuits. An inner loop is implemented as a fast sliding mode controller that controls the filter capacitor voltage in a fast and robust way. As a result, the plant, viewed by the outer loop, yields a voltage-controlled voltage source connected to the grid through an L filter. Thus, multiple resonant controllers are included in the state-space representation of this simplified system, allowing the design of a state-feedback controller in the outer loop for asymptotic tracking of the grid current with disturbance rejection of the grid background voltage. Here, a discrete linear quadratic regulator algorithm is used for designing the state-feedback gains. A simple design procedure is presented, as well as simulations and experimental results, to show the good performance of the proposed control scheme even under significant uncertainties and disturbances of the system. [ABSTRACT FROM AUTHOR]

In this paper, a comprehensive sliding mode control (SMC) loop design for a CLLC resonant converter is proposed. The major objectives of the proposed SMC are to improve the converter dynamics and to achieve a tight output voltage regulation with respect to any parameter variations and external disturbances. The sliding surface coefficients are selected to ensure both large- and small-signal stability for the robustness of the converter under different operating conditions. Furthermore, system dynamic performances considering the error dynamics and overshoots are investigated. To validate the proposed algorithm, a hardware prototype of a bi-directional CLLC resonant converter for plug-in electric vehicle applications is developed and tested up to 1 kW, and the effectiveness of the proposed control solution is verified by the load transients and start-up tests. At a 100% step-change in load power, the SMC achieves 1 ms settling time, which is approximately 0.9 ms faster than the conventional proportional integral control strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase, five-level, non-regenerative pulsewidth modulated rectifier using only two active switches (minimum required) per phase, which drastically reduces gate driver requirement and hardware complexity. It draws sinusoidal input current at close to unity power factor. All the semiconductor devices are rated at only one fourth of the dc-link voltage, and none of them requires any transient voltage balancing snubber. A total of 8 out of the 14 diodes per phase undergo soft switching transition under all operating conditions, which increases its efficiency. No extra hardware circuitry for balancing the flying capacitors (FCs) or the dc-link mid-point voltage are required, which further reduces hardware complexity and increases the conversion efficiency. The proposed topology does not need any sophisticated startup procedure for charging the FCs either, which solves the problem of semiconductor overvoltage during starting. A 3-kW laboratory prototype is built to experimentally verify the proposed topology. The maximum efficiency obtained from the prototype is 98.7%, and it is always more than 96% for the load range from 15% to its rated. [ABSTRACT FROM AUTHOR]

In order to overcome the limitations of the existing classical and solid-state Marx pulse generators, this paper proposes a new modular multilevel voltage-boosting Marx pulse generator (BMPG). The proposed BMPG has hardware features that allow modularity, redundancy, and scalability as well as operational features that alleviate the need of series-connected switches and allows generation of a wide range of pulse waveforms. In the BMPG, a controllable, low-voltage input boost converter supplies, via directing/blocking (D/B) diodes, two arms of a series modular multilevel converter half-bridge sub-modules (HB-SMs). At start up, all the arm's SM capacitors are resonantly charged in parallel from 0 V, simultaneously via directing diodes, to a voltage in excess of the source voltage. After the first pulse delivery, the energy of the SM capacitors decreases due to the generated pulse. Then, for continuous operation without fully discharging the SM capacitors or having a large voltage droop as in the available Marx generators, the SM capacitors are continuously recharged in parallel, to the desired boosted voltage level. Because all SMs are parallelly connected, the boost converter duty ratio is controlled by a single voltage measurement at the output terminals of the boost converter. Due to the proposed SMs structure and the utilization of D/B diodes, each SM capacitor is effectively controlled individually without requiring a voltage sensor across each SM capacitor. Generation of the commonly used pulse waveforms in electroporation applications is possible, while assuring balanced capacitors, hence SM voltages. The proposed BMPG has several topological variations such as utilizing a buck–boost converter at the input stage and replacing the HB-SM with full-bridge SMs. The proposed BMPG topology is assessed by simulation and scaled-down proof-of-concept experimentation to explore its viability for electroporation applications. [ABSTRACT FROM AUTHOR]

Distributed power generators in islanded microgrid usually adopt droop control strategy or virtual synchronous generator (VSG) control strategy to simulate Q–U droop characteristic of synchronous generators for voltage support ability enhancement and reliability improvement. However, because the distributed power generators’ capacities and locations are random, they cannot share reactive load proportional to their rated capacity, resulting in overload protection, and even system instability. In order to improve reactive power sharing precision, voltage control precision, and system stability simultaneously, an improved reactive power sharing algorithm combining virtual impedance and virtual capacitor is proposed in this paper. First, the three existing open-loop reactive power sharing strategies are summarized and the effect of their parameters on reactive power sharing error, steady-state voltage deviation, and system stability are analyzed. Afterwards, based on the analysis results, a reasonable configuration of virtual impedance and virtual capacitor values are put forward to realize the control targets of reducing steady-state reactive power sharing error, improving voltage control precision and system stability meanwhile. Finally, simulation and experimental platforms are built to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

During the lifespan of a polymer electrolyte membrane fuel cell (PEMFC) system, some heterogeneities between the cells constituting the stack can appear. The voltage of one particular cell in a stack may decrease because of specific aging or local malfunctioning such as drying. As a result, more heat is generated in this cell leading to an increase in its temperature and, thus, an additional voltage loss. This snowball effect can result in the failure of the cell. Therefore, the lifetime of a PEMFC stack can be increased by applying energy management to its cells. Note that the output voltage of a cell is lower than a stack. Hence, a high conversion ratio converter is necessary to implement such energy management. An efficient way to increase the output voltage is to connect the output capacitors of the converters such as the boosts in series. Ensuring the converters’ controllability is a key point to implement energy management. In this paper, an equalizer system is proposed to ensure the controllability of the boost converters. The balancing speed and the low number of switches are the main advantages of this system. The validity of the proposed system is verified through simulation and experiments. [ABSTRACT FROM AUTHOR]

In this paper, instantaneous pulse power compensator (IPPC) method is proposed to achieve power pulsation decoupling function for single-phase inverter applications. A smaller capacitor is placed in series with the traditional dc-link capacitor, and this smaller capacitor voltage is controlled using pulse currents to cancel out the dc-link voltage ripple. Unlike twice-line-frequency power decoupling method, the proposed IPPC method can compensate the pulsating power with all the orders harmonics on the dc-link line, not only the second-order component. Both modeling and simulation results show that IPPC method can achieve nearly zero voltage ripple for the dc-link capacitor since the pulse current is fully compensated. Whereas twice-line-frequency power decoupling method has limit in voltage ripple reduction, especially in small dc-link capacitance conditions. The experimental results based on a full-bridge topology decoupling circuit and a single-phase inverter application show consistent results with simulation results. A 16% reduction of the prototype size, i.e., 16% higher power density with only ∼1% efficiency penalty can be achieved by the proposed IPPC method when compared to the second-order power decoupling method. [ABSTRACT FROM AUTHOR]

This paper presents a new five-level T-type nested neutral point clamped (T-NNPC) converter. The proposed five-level T-NNPC topology is very attractive for medium-voltage applications as it can work in a wide range of voltages without the need of devices in series, and fewer components compared to the other five-level topologies. A model predictive control (MPC) strategy is also developed for the proposed converter to control the output currents at different output frequencies, and control flying capacitor voltages. A discrete-time model of the converter is developed and the control objectives that are the output currents and flying capacitor voltages are defined regarding switching states. A cost function is defined to minimize the deviation of the predicted values of the control objectives from their desired values. During each sampling time, the best switching state is selected and applied to the converter. The performance of the proposed five-level T-NNPC and the developed MPC strategy is studied in the MATLAB/Simulink environment, and the feasibility of the converter is evaluated experimentally. [ABSTRACT FROM AUTHOR]

In a hybrid ac–dc microgrid, stiff voltage sources may appear in either the dc or ac subgrids, which gives rise to multiple operation modes as power dispatch changes. This creates a challenge for designing the interlink converter between the ac and dc subgrids, since the different modes require different interlink controls. To solve this problem, this paper proposes the concept of a transfverter inspired by how transformers link ac grids. Like a transformer, a transfverter can react to the presence of stiff voltage sources on either the dc or ac side and reflect the “stiffness” and voltage stabilizing capability to the other side. A back-to-back converter with droop control is used as the underlying technology to implement this concept. A novel optimization method called model bank synthesis is proposed to find control parameters for the interlink converter that offer the best controller performance across the different microgrid modes without requiring mode changing of the controller. The effectiveness of the proposed solution is validated through both simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a bridgeless dual-mode single power-conversion ac–dc converter that can achieve a high conversion efficiency. By adopting a bidirectional switch, we remove a full-bridge diode rectifier from the grid side of the proposed converter, and thereby, reduce the number of components and the primary-side conduction loss. To adapt the converter to 1-kW power applications with a bidirectional switch, we used a series-resonant circuit in the output voltage doubler on the secondary side. The series-resonant circuit also provides zero-current switching turn-off at the output diode, and thereby, reduces the reverse-recovery loss. To attain medium–high power capability with an appropriate transformer, the proposed converter operates in both discontinuous conduction mode and continuous conduction mode. The operation principle of the converter is presented and analyzed. By using the dual-mode control algorithm, the proposed converter achieves a high power factor of 0.994 and maximum efficiency of 97.3 $\%$. Experimental results for a prototype 1-kW ac–dc converter verify these characteristics. [ABSTRACT FROM AUTHOR]

A hybrid modular multilevel converter (MMC) consists of both half-bridge submodule (HBSM) and full-bridge submodule (FBSM) in each arm. It has several advantages over other MMC topologies, such as low system loss, reduced cost of the system, but still maintains fault ride-through capability against a solid dc-side fault. However, the hybrid MMC may have a difficulty of submodule (SM) voltage balancing under variation of its dc-bus voltage. Since the voltage unbalance of SMs results in SM capacitor overvoltage and low reliability of the system, the voltage of SMs, which can be also represented as energy of SMs, should be balanced at all time. In this paper, to extend the narrow adjustable range of dc-bus voltage due to the voltage/energy unbalance, new feedback and feedforward energy balancing controllers with revised sorting algorithm are proposed. The feedback control ensures the zero steady-state error, while the feedforward control provides fast dynamic response in the energy balancing control. By applying the proposed control scheme, the hybrid MMC can keep the voltage balance between HBSMs and FBSMs in wider range of dc-bus voltage. The full-scale computer simulation results and down-scale experimental results demonstrate the validity of the proposed control scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a new and robust control strategy for distributed energy resource (DER) units operating in parallel with a three-phase ac grid that could have unbalance voltages. It is well known that the grid imbalance imposes double-frequency ripples on the dc-side capacitor and low-order harmonics on the ac side of a voltage source converter widely used to interface the DERs with the grid. The proposed controller is able to overcome both problems. This not only improves the power quality and stability aspects of the DER and overall system, but will also help reduce the size of the dc-side capacitor. The proposed controller belongs to the family of current controllers and can in principle be added as an upgrade to the existing current controllers. Mathematical analysis and optimal control design aspects are presented and then the performance of the proposed controller is evaluated by various simulation scenarios and hardware-in-the-loop experiments. [ABSTRACT FROM AUTHOR]

The instantaneous input and output power of two-stage single-phase converter are imbalanced, resulting in the second harmonic current (SHC) in the dc–dc converter, dc source, or dc load. This paper revisits the SHC reduction control schemes from the dc-bus port-impedance perspective. The dc–dc converters in two-stage single-phase converters are categorized into two types, namely, bus-voltage-controlled converter (BVCC) and bus-current-controlled converter (BCCC). The dc-bus port impedance of the BVCC is revealed to be approximately inversely proportional to the voltage loop gain. Thus, for reducing the SHC in the BVCC, advanced control schemes are required for increasing the dc-bus port impedance. The dc-bus port impedance of the BCCC is proved to be a negative resistor within the control bandwidth. Hence, for reducing the SHC in the BCCC, the dc-bus voltage ripple should be limited. From the dc-bus port-impedance perspective, the SHC reduction control schemes are reclassified into closed-loop-design-based, virtual-impedance-based, and power-decoupling-based approaches, based on which, different SHC reduction control schemes are carefully reviewed and compared. Finally, potential challenges and issues are discussed. [ABSTRACT FROM AUTHOR]

A two-terminal active capacitor concept has been proposed recently based on an active power electronic circuit with a voltage control method and self-power scheme. It retains the convenience of use as a passive capacitor with two power terminals only without any additional required connections and has the potential to either increase power density or reduce design cost depending on the applications. Based on the previously proof-of-concept study, this paper addresses the design constraints, impedance modeling, and start-up solutions of two-terminal active capacitors. A design method for functionality, efficiency, lifetime, and cost-constraint applications is applied to size the active components and passive elements. A voltage feedforward control scheme is implemented to improve its dynamic response. Two start-up solutions are proposed to overcome the issues brought by the self-power scheme. A case study of an active capacitor for the dc link of a single-phase full-bridge rectifier is presented to demonstrate the theoretical analyses. [ABSTRACT FROM AUTHOR]

With the development of portable electronic products, the requirement for chargers is also getting higher. In this paper, a high-accuracy constant output current/constant output voltage (CC/CV) ac–dc flyback converter is proposed and a novel cable compensation method without external capacitor is put forward. The converter adopts primary-side regulation (PSR) scheme, detecting the output voltage through the auxiliary winding, and adjusting switching frequency to achieve output voltage constant in CV mode. Compared to conventional cable compensation module, the proposed circuit applies a method of pre-filtering, averaging, and re-filtering, to obtain the compensation voltage. This method eliminates the need of external capacitor, reducing cost and increasing reliability of the converter. In CC mode, the switching period is adjusted to be fixed multiple of the demagnetization time, thereby realizing the constant current output. The control chip was implemented in NEC 1 μm HVCMOS process, and a 5-V/1-A prototype has been built to verify its feasibility. Experimental results show that the deviations of output voltage and current are within ±0.9% and ±3% under different inputs and loads, while maximum conversion efficiency can reach a level of 78.2%. [ABSTRACT FROM AUTHOR]

In this paper, a two-stage transformerless multiple-output converter is proposed for applications requiring a high voltage step-down ratio. The proposed circuit transfers power via a current interface and the use of current-source-mode (CSM) converters, resulting in low voltage stress and drastically simplified control. The first stage of this configuration is regulated to provide a constant current to the second stage. The second stage consists of series-connected CSM boost converters. The high step-down ratio of the proposed configuration reduces the voltage stress in the switches of the second stage. The series-connected CSM converters are inherently independent of each other, leading to a very simple control scheme without the need for decoupling of the input voltage of the interconnected converters. Input voltage variation to the system will not affect the input voltage of the second stage. Load variation in one output will not affect the other outputs. If one or more CSM converters are shorted, there is no impact on other converters. These advantages enable a high scalability. Besides, the first stage of the proposed configuration can operate both in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) with the same control strategy. This feature leads to a low control complexity and elimination of inductors. The performance of the proposed converter is illustrated with a laboratory prototype driving light emitting diodes (LEDs). [ABSTRACT FROM AUTHOR]

This paper introduces a novel H-bridge structured ac–ac pulsewidth modulation (PWM) converter topology based on two-level non-differential ac chopper legs, which can work at the non-inverting and inverting modes for the utility voltage compensation. Compared to the traditional bipolar-type H-bridge ac–ac converter, no bidirectional switches are switched in a complementary manner to overcome the commutation problem due to the delayed response of electronic circuits and semiconductor switching devices. The detailed PWM control signals and operational principles are presented to regulate the output voltage in a bipolar manner. Especially the main advantage is that the proposed ac–ac converter has the same buck/boost operation process for non-inverting and inverting modes, which ensures the continuously average current supply to the low-voltage output side without a high-value capacitor to support power. Additionally, due to the common sharing ground of the input and output, the feature that output can reverse or maintain phase angle with input is supported well. Then, the detailed analysis, design conditions, and experimental verification based on a 1 kW experimental prototype are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a method for fault-tolerant operation of medium voltage modular multilevel converters (MMCs) with phase-shifted carrier (PSC) modulation. The existing methods need to recalculate and reconfigure all the carriers every time a submodule (SM) fails. However, the proposed method combines the sorting voltage balancing control and the PSC modulation to avoid breaking the symmetry and balance of the carriers. Therefore, the modulation stage in the proposed method can be kept the same and the output voltage of the MMC can remain unchanged without causing voltage mismatch. Moreover, considering the modulation margin and the physical redundancy configuration, two fault SM replacing strategies, i.e., optimal dynamic performance and optimal electrical stress are proposed as well as their respective control structures. Compared with the normal operation of the MMC, the proposed fault-tolerant operation method has only slightly changed the control system and thus the added calculation burden and control complexity can be ignored, which is extremely beneficial for the practical implementation. The effectiveness and performance of the proposed operation method are carefully verified by both simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new 7-level inverter topology for induction motor drives. It is a hybrid topology formed by cascading a 5-level active neutral-point-clamped inverter with a 3-level T-type converter. It is obtained using low-voltage semiconductor devices with voltage blocking capability of Vdc/3 and Vdc/6. The topology uses three floating capacitors per phase, which are balanced within a pulsewidth modulation (PWM) switching duration using switching-state redundancies for each pole-voltage level. Topology forms two stacks at the front-end, which requires individual symmetrical dc source. The analysis of switching loss and conduction loss is performed and compared with some of the existing 7-level multi-level inverters reported in various literatures to show the advantages of the proposed topology. Furthermore, the single dc source operation with two stacked capacitors and closed-loop control of neutral-point voltage using symmetrical six-phase induction motor is proposed. The voltage-control algorithms for floating capacitors and dc-link stacked capacitors are proposed, which are independent of load power factor and modulation index. Open-loop V/f and closed-loop rotor field oriented control are performed, and various results at steady and transient states are presented to validate the aforementioned claims. [ABSTRACT FROM AUTHOR]

This paper proposes a generalized design framework for three-phase Vienna rectifiers to handle the neutral point voltage balance issue. On the basis of the design framework, it is convenient to construct various neutral point voltage balancing methods with the guarantee of stability. As demonstration, three representative neutral point voltage balance approaches are presented by choosing different zero-sequence voltages. A comprehensive comparison among the three approaches is given in the aspects of input current quality, capacitor voltage fluctuation, and system efficiency. The comparison results provide guidance for constructing the most appropriate approach based on the specific requirement. Finally, simulation and experimental results verify the correctness and effectiveness of the presented approaches and the related performance analysis. [ABSTRACT FROM AUTHOR]

This paper presents a modified negator-based switched-capacitor (NSC) dc–dc converter to achieve fine-grained voltage conversion ratios. Based on a concept of reconfiguring several 2:1 switched-capacitor (SC) converters in series and parallel at the last stage, the proposed asymmetrical shunt SC (ASSC) converter provides more controllable variables of forward gain and feedback gain to decide different power path interconnections and increase the available conversion ratios, with a little sacrifice of its slow switching limit output impedance. The switching loss of the bottom-plate parasitic capacitance in the ASSC converter is less than the switching loss of the NSC topology because the two moderate voltages instead of the power rail are fed to the last stage 2:1 SC unit and reduce the voltage swing. The bottom-plate swapping prototype further reduces the parasitic loss at high conversion ratios. To handle a large number of conversion ratios in closed-loop regulation, the ASSC converter uses the fast optimum ratio searching (FORS) technique, which evaluates the transient voltage drop to quickly search for target ratios and reduce the transient recovery time. A three-stage ASSC converter achieving 187 conversion ratios is fully integrated in the test chip, which is fabricated in 0.25-μm CMOS process with an active area of 7.14 mm2. Furthermore, 2389 conversion ratios can be derived in theory for a four-stage ASSC converter. The proposed reconfigurable SC converter provides an output voltage range of 0.4 to 2.8 V under no load conditions, and greater than 80% power efficiency at an output voltage level of 0.9 to 1.5 V over a load range of 3 to 9.5 mA. Due to the FORS technique, the measured transient recovery time is reduced from 7 to 1.5 μs in case of load current step of 7 mA. [ABSTRACT FROM AUTHOR]

This paper presents an adaptive power management circuit, which maximizes the energy transfer from the energy harvester to wireless sensor nodes in real-world applications. Low power consumption techniques were adopted in the power management circuit to maximize the delivery of the harvested energy to the load instead of being consumed by the circuit. The presented circuit incorporates an analogue control circuit (ACC) for maximum power transfer from the energy harvester to the storage capacitor and an energy-aware interface (EAI) for controlling the energy flow from the storage capacitor to the load. To evaluate the performance of the presented circuit, piezoelectric energy harvesting was used as a studied case. The piezoelectric energy harvester (PEH) was mechanically excited at different strain loadings and frequencies. The experimental results show the circuit can self-start and powered directly by the PEH since the EAI and ACC have low power consumption in the range of microwatts. The circuit is adaptive to energy harvesters of varying output and various electrical loads, with a peak efficiency of 76.18% in transferring the harvested energy from the PEH to the storage capacitor. More than 96% of the energy released from the storage capacitor is effectively transferred to the electrical load. [ABSTRACT FROM AUTHOR]

Fault diagnosis is indispensable for the reliable operation of modular multilevel converters (MMCs). This paper presents a submodule voltage similarity-based, real-time, and fast open-circuit fault diagnosis method for MMCs. The proposed fault detection and location (FDL) method is derived based on the similarity analysis of capacitor voltages under both normal and fault conditions. Due to the absence of the discharging current path caused by the open-circuit fault, capacitor voltage of the submodule with the faulty switch will differ from those with healthy switches. This characteristic can be extracted by designing the correlation coefficients of the capacitor voltages at the same arm. With the help of correlation coefficients, the open-circuit fault can be located at the early stage before the capacitor voltage is charged very high. All the data required for the proposed FDL method can be obtained by the available sampled data for the control scheme of MMCs. No extra measurement or hardware is required. Experimental results validate that the proposed FDL method can detect and locate the open-circuit fault rapidly and accurately within one fundamental period. [ABSTRACT FROM AUTHOR]

In order to produce more voltage levels and meet the requirement of the motor drive in electric vehicles (EVs), a hybrid cascaded multilevel converter based on three-level (TL) cells is proposed in this paper. In each unit, there is a battery and two series-connected capacitors, which hold a half of the battery voltage, respectively. Each TL cell is controlled to be connected or bypassed by a converter unit because of the modular structure. Three voltage levels can be produced when the TL cell is connected. All TL cells are cascaded to produce a staircase dc voltage, and an H-bridge is utilized to alternate the direction of it to form the ac output voltage. Compared to similar converter based on half-bridge arms, the proposed topology is able to produce more voltage levels with same number of battery modules. Voltage balances among TL cells and between two capacitors in each TL cell are both realized by a proposed overall control strategy. Experiments are provided to show the validity of the analysis. [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

It is considerable to reduce the computation load while keeping a good total harmonic distortion (THD) performance for the modular multilevel converter (MMC) with model predictive control (MPC). In this paper, the discrete-time mathematical model of the MMC is derived and the output voltage ripples of the cascaded submodules (SMs) are analyzed in detail. Accordingly, a modified increased-level MPC method A (IL-MPC-A) is proposed with 2N + 1 ac-side output voltage levels. The computation load is significantly reduced without losing the harmonic circulating currents suppression and capacitor voltage ripples compensation capabilities. In this method, the cost function minimization step and capacitor voltage sorting algorithm are combined to determine the optimal control option. In addition, to avoid the selection of weighting factors and further reduce the computation load as the increasing of the SM number, another modified IL-MPC-B is proposed by directly calculating the optimal ac-side output voltage level and arm summation voltage according to the discrete-time mathematical model. As a result, the ac-side output current and circulating current controls are decoupled. Furthermore, the capacitor voltages are balanced with a proposed control scheme by adjusting the circulating current reference. The effectiveness of the proposed MPC methods is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

A multiphase-interleaved non-isolated high step-up dc/dc resonant converter for high-current applications with wide load range is proposed in this paper. The converter consists of an inverter stage with multiple resonant inverters in parallel interleaving operation that is cascaded to a common diode–capacitor rectifier stage. The topology of the inverter stage is a variation of class E inverter, which is designed for voltage boosting and of which the voltage gain is insensitive to load change. The rectifier stage comprises multiple pairs (correlated to the number of inverters in parallel) of diodes in parallel and a small output capacitor, which makes it simple to implement and of low cost. Together, the voltage gain variance of the converter can be confined within a small value and zero voltage switching operation can be maintained over a wide load range. A detailed mathematical analysis of the proposed converter is conducted for systematizing its design. A prototype of the proposed converter with an input voltage of 23.6 V, a rated output voltage of 190 V, and a rated output power of 80 W at 486 kHz is constructed for verification. A frequency controller is implemented to achieve fine regulation of the output voltage. [ABSTRACT FROM AUTHOR]

Reduced dc-link capacitance interior permanent magnet synchronous motor (IPMSM) drives have many advantages, such as longer lifetime, reduced cost, and higher power density. However, due to the dc-link voltage fluctuation, the dc-link voltage utilization rate and the torque ripples are two major issues in flux-weakening operation region. It is important to consider these two issues comprehensively when a flux-weakening control method is adopted. In this paper, the IPMSM torque ripples caused by the dc-link voltage fluctuation and the overmodulation are analyzed in depth. In order to reduce the torque ripples and increase the utilization rate of the dc-link voltage, a novel adjustable maximum voltage based voltage closed-loop flux-weakening method is proposed. By switching between the minimum dc-link voltage control mode and the extended dc-link voltage control mode, the torque ripples can be reduced effectively and a nearly maximum utilization of the dc-link voltage can be realized. The proposed flux-weakening control method only depends on the dc-link voltage and the stator current vector reference. Experimental results on a 2.2-kW IPMSM drive platform are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In recent years, dc distribution grids have become increasingly popular because of the interest in the diffusion of distributed renewable energy. In this scenario, dc distribution grids are also favored because of the increased use of batteries and power electronic loads. The main limit to the spread of dc grids is their protection devices, which still present several problems. At present, protection devices are represented by traditional mechanical breakers or static electronic components. The first, which interrupt dc currents, have good reliability but need maintenance and have long intervention periods. In contrast, electronic switches are fast and reliable, but they reduce the efficiency because of their voltage drop. In this scenario, some hybrid breakers have been proposed to obtain the advantages of both devices. The previous solutions of hybrid breakers still suffer several critical issues and, usually, are not capable of protecting a system from short circuits without significantly reducing their lifetime. In this paper, a new low-voltage hybrid circuit breaker topology is proposed. The procedure to dimension all of the active and passive components in the device is analyzed, and the effectiveness of the proposed solution is proven by means of experimental results obtained using a prototype. [ABSTRACT FROM AUTHOR]

In this paper, a new space vector pulse width modulation method to extend the linear modulation range of a cascaded five level inverter topology with a single dc supply is presented. Using this method, the inverter can be controlled linearly and the peak phase fundamental output voltage of the inverter can be increased from 0.577 to 0.637 V\text{dc} without increasing the dc bus voltage and without exceeding the induction motor voltage rating. This new technique makes use of cascaded inverter pole voltage redundancy and property of the space vector structure for its operation. Using this, the induction motor drive can be operated till the full speed range (0–50 Hz) with the elimination of lower order harmonics in the phase voltage and phase current. The five-level topology presented in this paper is realized by cascading a two-level inverter and two full bridge modules with floating capacitors. The inverter topology and its operation for extending the modulation range is analyzed extensively. Simulation and experimental results for both steady-state and dynamic operating conditions are presented in this paper. [ABSTRACT FROM AUTHOR]

This paper analyzes the possibility of controlling the output voltage of a standalone single-phase inverter by directly controlling the output filter capacitor current without using a dedicated output voltage sensor. The plant modeling and controller design are presented. The proposed method depends on having the value of the output filter capacitance. A method to estimate the output filter capacitance is also presented. Rigorous analysis is done to show that the proposed sensorless scheme is largely insensitive to parameter variations and ensure that the output voltage is within specified regulations at utility level. It is also demonstrated in this paper that compared to the conventional voltage control scheme the proposed control scheme ensures an improved total harmonic distortion of the output voltage waveform. Experimental results presented validate the proposed scheme. [ABSTRACT FROM AUTHOR]

In high-voltage applications, the magnitude of total semiconductor losses (on-state and switching) determines the viability of modular-type multilevel converters. Therefore, this paper presents a new cell arrangement that aims to lower total semiconductor loss of the modular multilevel converter (MMC) to less than that of the half-bridge modular multilevel converter (HB-MMC). Additional attributes of the proposed cell are: it eliminates the protective thyristors used in conventional half-bridge cells that deviate part of the dc-fault current away from the antiparallel diode of the main switch when the converter is blocked during a dc short-circuit fault, and it can facilitate continued operation of the MMC during cell failures without the need for a mechanical bypass switch. Thus, the MMC that uses the proposed cell retains all advantages of the HB-MMC such as full modularity of the power circuit and internal fault management. The claimed attributes of the proposed cell are verified using illustrative simulations and reduced scale experimentations. Additionally, this paper provides brief and critical discussions that highlight the attributes and limitations of popular MMC control methods and different MMC cells structures proposed in the literature, considering the power electronic system perspective. [ABSTRACT FROM AUTHOR]

This paper extends the voltage-doubler concept to the single-phase SEPIC rectifier in discontinuous conduction mode and, as a consequence, novel rectifiers are proposed. A comparison with the classic SEPIC rectifier shows that the proposed converters can either provide reduced voltage stress on the semiconductors for the same output voltage level or supply double the gain of the output voltage with the same voltage stress. The proposed voltage-doubler SEPIC rectifiers provide a high power factor with no current control and they can be applied in order to improve the static gain of the structure, which can make the SEPIC rectifier suitable for applications that require a high voltage level. In this paper, the generic structure based on a three-state switch, four different implementations of the proposed concept (including bridgeless structures), steady-state analysis, a dynamic model, system control, and experimental results are presented. The proposed rectifiers were verified by experimental results obtained with a prototype built with the following specifications: 1000 W output power, 220 V input voltage, 400 V output voltage, and 50 kHz switching frequency. Peak efficiency of 95.84%, THD of 2%, and power factor of 0.9997 were obtained and, most importantly, double the gain of the output voltage was verified. [ABSTRACT FROM AUTHOR]

The matrix converter (MC) is a direct ac–ac power converter without an intermediate dc link. It has several attractive features, such as high power density, four-quadrant operation, and bidirectional power flow. However, the application of MCs in high-voltage and high-power systems is still limited by the device voltage levels. It is well known that the multilevel power converter technology can be a solution to enhance the voltage rating and improve harmonic performance in many applications. Therefore, an application of a multilevel topology based on a direct ac–ac power converter is proposed in this paper. This paper first introduce the topology structure, the switching pattern grouping method, and the proposed output voltage modulation method for a five-level capacitor clamped multilevel matrix converter (5LMC). Amplitude coefficient adjustment is also introduced as a part of modulation procedure to simplify the duty cycles calculation. Simulation from MATLAB/Simulink is given to demonstrate the theoretical work. Experimental results from a five-level matrix converter prototype are presented to validate the theoretical findings. [ABSTRACT FROM AUTHOR]