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Two-dimensional surface electric field in the drift region of RESURF LDMOS is modeled in the off-state and on-state. Numerical results are shown to support the analytical results. Based on these results, 3-D Kirk effect is modeled. The reason inducing high electric field near the drain is demonstrated and methods to lower the high electric field are proposed.

The trade-off between the breakdown performance and the Kirk effect has been evaluated and compared among conventional bipolar transistors and resurfed lateral bipolar transistors. It was demonstrated that the traditional conflict of differing requirements on W c and N c by the breakdown performance and the Kirk effect can be eased by incorporating the resurf principle. Comparative studies have been carried out between the optimized devices with breakdown voltages from 20 to 40 V. It is shown that for an identical breakdown voltage, the high-current-level performance of the resurfed devices can be significantly improved by incorporating a gradually doped collector region. This further leads to a significant increase in the cut-off frequency without degrading the breakdown performance.

The interaction between transferred-electron effect and base widening under transient conditions in III–V heterojunction bipolar transistors is considered. Modification of the collector field profile with an n + doping spike is shown to cause a time delay for the onset of Kirk effect creating conditions for the inception of charge instabilities. Numerical simulations suggest the possibility of sustainable intrinsic current oscillations in properly engineered bipolar transistor structures.

There are usually two explanations for the physical reasons of the high injection effects in silicon bipolar transistors: one is the effective base widening effect proposed by Kirk, the other is the base conductivity modulation effect proposed by Webster, the emitter current crowding effect intensifies these two effects. In this paper, low temperature characteristics of these three important effects are analyzed and the dominant physical mechanism which determines the high injection effects at low temperatures is presented. The obtained calculate results are in agreement with the experiments.

The Kirk effect in GaAs BJTs has been compared with that of Si BJTs using a PISCES-IIB simulator. The simulation results have shown that, due to the high electron mobility and velocity overshoot effect of GaAs, the Kirk current density of GaAs BJTs is about two times larger than that of comparable Si BJTs. It is shown that the saturation velocity model of the Kirk effect is very accurate for Si BJTs, but not for GaAs BJTs. A modified structure GaAs BJT with n + − n − collector layer, which is generally believed to have a higher Kirk current, was also studied. We have found for that case that a retarding field is formed at the n + − n − interface and that the Kirk current does not increase at all.

Using a perturbation theory focused on injected electron concentrations, we derived analytical models for collector current density, J n , and base transit time, τ B , for arbitrarily doped bases. These models are valid in all injection regions before the onset of the Kirk effect, include existing models as special cases, and agree well with numerical results. Our model predicts that τ B for the Gaussian-doped base is still smaller than that of a base with a uniform profile, a box-doped base, even in high-injection regions.

A d.c. intrinsic base resistance ( rb in ) model which incorporates base resistivity modulation is presented. The model shows a significant reduction in rb in for a typical high-speed bipolar transistor (a 21% drop at J c = 5 × 10 4 A/cm 2 , and a 34% drop just prior to the onset of the Kirk effect). The model has no empirically determined parameters, accommodates all base dopant profiles, and is suitable for current biases within practical high-injection. Although we assume that the injected carrier concentration profile is identical to that for low injection regions, and is scaled with injection level, this approximation is shown to contribute negligible error for a typical transistor. Further, a characterization of current crowding dependence on pertinent physical parameters is presented. It is shown that for both present day and future high-speed bipolar transistors, d.c. current crowding is insignificant, and hence, its exclusion from our model is justified.