Search

The 2021 release of Reimagining Our Futures Together: A New Social Contract for Education by the United Nations Educational, Scientific, and Cultural Organization was a reaction to a number of serious problems discovered in worldwide educational reforms. It sought to establish a new social compact for education to fulfill its unmet promise in the face of many educational crises and to combat future uncertainty. Using the methods of 271 Education Group as a case study, this article examines China's efforts to transform basic education in response to widespread educational issues and how they have represented the major principles espoused by the UNESCO report. The article elaborates on the coping strategies of 271 Education Group, such as incorporating eco-civilization education into basic schooling, constructing life-based curricula that are built on knowledge commons, introducing pedagogy rooted in cooperation and solidarity, and promoting teacher professional development through collaborative educational research.

Ga2O3 is a wide-band gap semiconductor of emergent importance for applications in electronics and optoelectronics. However, vital information of the properties of complex coexisting Ga2O3 polymorphs and low-symmetry disordered structures is missing. We develop two types of machine-learning Gaussian approximation potentials (ML-GAPs) for Ga2O3 with high accuracy for β/κ/α/δ/γ polymorphs and generality for disordered stoichiometric structures. We release two versions of interatomic potentials in parallel, namely soapGAP and tabGAP, for high accuracy and exceeding speedup, respectively. Both potentials can reproduce the structural properties of all the five polymorphs in an exceptional agreement with ab initio results, meanwhile boost the computational efficiency with 5 × 102 and 2 × 105 computing speed increases compared to density functional theory, respectively. Moreover, the Ga2O3 liquid-solid phase transition proceeds in three different stages. This experimentally unrevealed complex dynamics can be understood in terms of distinctly different mobilities of O and Ga sublattices in the interfacial layer. [ABSTRACT FROM AUTHOR]

In this article, the impacts of the off-state gate bias (VGS,OFF) on dynamic on-resistance (RON) are systematically investigated in commercial Schottky-type p-GaN Gate high-electron-mobility transistors. Double-pulse tester and pulsed I–V system are adopted to evaluate the dynamic RON with various off-state gate and drain bias (VDS,OFF) under hard- and soft-switching conditions. More negative VGS,OFF can aggravate the dynamic RON degradation under both soft- and hard-switching, especially when switching with a high VDS,OFF. The impacts of VGS,OFF on switching transients and off-state stress are investigated separately to reveal the underlying mechanisms, which are found to be associated with the generation and movements of holes. The off-state gate bias of the voltage-driving scheme needs to be carefully considered according to the identified mechanisms in terms of dynamic on-resistance degradation. [ABSTRACT FROM AUTHOR]

We conducted reliability characterization under reverse-bias stress (i.e., stress at OFF-state with high VDS) on the E-mode GaN metal–insulator–semiconductor field-effect-transistors (MIS-FETs) with various substrate terminations. The MIS-FETs with floating substrate (FS) show worse threshold voltage (VTH) stability than that with a grounded substrate. A non monotonic dependence of VTH shifts and OFF-state time-to-breakdown (tbd) on the positive substrate bias (Vsub) was also observed. The underlying mechanisms are the different impacts of positive Vsub on the drift of electrons and holes during the long-term stress. An important indication is that positive-biased and FS terminations should be restricted at OFF-state in order to obtain good VTH stability in applications of the GaN MIS-FET. [ABSTRACT FROM AUTHOR]

In this paper, systematic characterization and the corresponding suppression strategies of dynamic OFF-state leakage current (${I}_{ \mathrm{\scriptscriptstyle OFF}}$) in Schottky-type p-GaN gate high-electron-mobility transistors (HEMTs) are presented based on fast pulsed ${I}$ – ${V}$ measurement and consecutive switching measurement. It is found that the high ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ under dynamic pulse mode without hole injection is a result of the reduced voltage blocking capabilities (both lateral and vertical) with weaker trapping effect in the buffer, and the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ induced by ON-state hole injection is caused by further increased lateral conductivity through the buffer from source to drain. The corresponding behaviors under continuous waveforms with different switching conditions are analyzed to identify effective approaches for the suppression of dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ in practical switching operations. A higher temperature is shown to be beneficial to the reduction of the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ induced by ON-state hole injection. To completely eliminate the dynamic ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ caused by ON-state hole injection and minimize the OFF-state power consumption in practical power switching applications, a sufficiently large negative OFF-state gate bias (e.g., ${V}_{\text {GS}, \mathrm{\scriptscriptstyle OFF}}\le -{3}$ V) is recommended in the gate driver turn-off voltage design for the Schottky-type p-GaN gate HEMTs. [ABSTRACT FROM AUTHOR]

Low-loss reverse-conducting normally- OFF double-channel AlGaN/GaN power transistor with the built-in Schottky barrier diode (SBD) has been systematically studied. This device features the MOS-gate section and SBD-anode section paralleled to an interdigital layout along the gate width direction. A common access region that conducts current at both forward and reverse ON-states is employed, which is beneficial to reduce the conduction loss. With a MOS-HEMT/SBD finger width of ${4}~\mu \text{m}/2~\mu \text{m}$ and a total width ratio of 2:1, the device exhibits a threshold voltage of +0.8 V at a drain current of ${10}~\mu \text{A}$ /mm and a low forward ON-resistance of $12.1~\Omega \cdot \text {mm}$. The Schottky metal contacts 2-DEG directly, which results in a low reverse turn-on voltage of −0.6 V (at −1 mA/mm) and low reverse ON-state voltage of −1.7 V (at −50 mA/mm). A leakage suppression MOS field plate (FP) is applied to shield the Schottky contact from the strong electric field, leading to a low OFF-state leakage current of 14 nA/mm at +100-V drain bias and a high breakdown voltage (BV) of +698 V. The finger width and the number of fingers should be optimized. A narrow finger width benefits the current sharing at the access region, while the increasing number of fingers introduces more Schottky depletion regions along the gate width direction that degrade ${R}_{ \mathrm{\scriptscriptstyle ON}}$. [ABSTRACT FROM AUTHOR]

Under reverse-bias stress (i.e., OFF-state stress with ${V} _{\text {GS}} < {V}_{\text {TH}}$) with high drain voltage, ultraviolet (UV) illumination and larger negative gate bias are found to accelerate the positive shift in threshold voltage (${V}_{\text {TH}}$) of enhancement-mode GaN MIS-FETs with fully recessed gate. These results suggest a hole-induced degradation mechanism. In the absence of UV illumination, holes could be generated by impact ionization in the high electric-field region, which is initiated by electrons injected from the source through the buffer layer. With a larger negative gate bias, more holes will flow to the gate side and pass through the silicon nitride (SiNx) gate dielectric, as SiNx does not present any energy barrier to holes. The enhanced hole transport through the dielectric under large negative gate bias could accelerate new defects generation and therefore result in the larger positive threshold voltage shifts. [ABSTRACT FROM AUTHOR]

In this paper, we carried out a systematic comparison between the enhancement-mode GaN-based fully recessed metal-insulator-semiconductor field-effect transistors (MIS-FETs) and partially recessed MIS-high-electron-mobility transistors (MIS-HEMTs) with the same gate dielectric stack (LPCVD-SiNx/PECVD-SiNx) that has delivered promising long-term reliability and stability. Despite a moderately larger on-resistance (${R}_{ \mathrm{ON}}$), the MIS-FETs deliver superior ${V}_{\text {TH}}$ uniformity and thermal stability. Under long-term gate bias stress, both the MIS-HEMT and MIS-FET deliver similar small positive-bias temperature instability, while the negative-bias temperature instability of the MIS-HEMT is much larger than that of MIS-FET. The MIS-FET also delivers a higher ${V}_{\text {TH}}$ stability than the MIS-HEMT under dynamic gate bias stress. It is suggested that the differences in ${V}_{\text {TH}}$ stability mainly originate from the different spatial separation between the trap states and the conducting channel, with it being larger in MIS-HEMT than in MIS-FET. [ABSTRACT FROM AUTHOR]

In this paper, we report a systematic study of the nitridation effects on GaN surface by first-principles calculations and X-ray/ultraviolet photoemission spectroscopy (XPS/UPS). According to the calculated electronic structures, two surface bands (i.e., the upper band and the lower band) can be seen within the bandgap for the typical surface configurations that may occur in the experimental condition as a result of surface reconstruction. By the deployment of sufficient nitridation, the energy positions of the lower band are modified toward the valence band by ~1 eV, resulting in the overlapping of the lower surface band with the valence band. Meanwhile, the upper surface band is also modified toward the valence band, but by a smaller amount. The modification to the positions of the surface bands is furthermore manifested by XPS/UPS spectra characterization performed on GaN sample that underwent surface treatment with low-energy remote N2 plasma. The theoretical and experimental results insightfully proclaim the nitridation effects on material properties at atomic level, and support a surface-state ionization model for the GaN band-edge (3.4 eV) emission in metal-AlGaN/GaN Schottky-on-heterojunction diode under forward bias. [ABSTRACT FROM PUBLISHER]

In this paper, we systematically investigated the leakage and breakdown mechanisms of the low-pressure chemical vapor deposition (LPCVD) silicon nitride thin film deposited on AlGaN/GaN heterostructures. The LPCVD-SiNx gate dielectric exhibits low leakage and high breakdown electric field. The dominant mechanism of the leakage current through LPCVD-SiNx gate dielectric is identified to be Poole–Frenkel emission at low electric field and Fowler–Nordheim tunneling at high electric field. Both electric-field-accelerated and temperature-accelerated time-dependent dielectric breakdown of the LPCVD-SiNx gate dielectric were also investigated. [ABSTRACT FROM PUBLISHER]

P-grid is a typical feature in power devices to block high off-state voltage. In power devices, the p-grid is routinely coupled to an external electrode with an Ohmic contact, but Schottky contact to the p-grid is also proposed/adopted for certain purposes. This work investigates the role of contact to p-grid in power devices based on the commonly adopted technology computer-aided design (TCAD) device simulations, with the silicon carbide (SiC) junction barrier Schottky (JBS) diode as a case study. The static characteristics of the JBS diode is independent of the nature of the contact to p-grid, including the forward voltage drop (VF) and the breakdown voltage (BV). However, during the switching process, a Schottky contact would cause storage of negative charges in the p-grid, which leads to an increased VF during switching operation. On the contrary, an Ohmic contact provides an effective discharging path for the stored negative charges in the p-grid, which eliminates the dynamic degradation issues. Therefore, the necessity of an Ohmic contact to p-grid in power devices is clarified. [ABSTRACT FROM AUTHOR]

Transistors based on MoS2 and other TMDs have been widely studied. The dangling-bond free surface of MoS2 has made the deposition of high-quality high-k dielectrics on MoS2 a challenge. The resulted transistors often suffer from the threshold voltage instability induced by the high density traps near MoS2/dielectric interface or inside the gate dielectric, which is detrimental for the practical applications of MoS2 metal-oxide-semiconductor field-effect transistor (MOSFET). In this work, by using AlN deposited by plasma enhanced atomic layer deposition (PEALD) as an interfacial layer, top-gate dielectrics as thin as 6 nm for single-layer MoS2 transistors are demonstrated. The AlN interfacial layer not only promotes the conformal deposition of high-quality Al2O3 on the dangling-bond free MoS2, but also greatly enhances the electrical stability of the MoS2 transistors. Very small hysteresis (ΔVth) is observed even at large gate biases and high temperatures. The transistor also exhibits a low level of flicker noise, which clearly originates from the Hooge mobility fluctuation instead of the carrier number fluctuation. The observed superior electrical stability of MoS2 transistor is attributed to the low border trap density of the AlN interfacial layer, as well as the small gate leakage and high dielectric strength of AlN/Al2O3 dielectric stack.