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High-performance integrated tin monoxide bottom-gate staggered p-channel thin-film transistors (TFTs) are realized and reported. The active layer has been formed by thermal vacuum evaporation and rapid thermal annealing under a continuous nitrogen flow, resulting in field-effect mobilities up to 1.6 cm²/(V · s) and contact resistances of around 148Ω · cm. The integration of these TFTs in elementary building blocks for digital circuit applications such as inverters and ring-oscillators is demonstrated, resulting in stage delays down to 300 ns. Furthermore, a unipolar p-type-only 8-bit radio frequency identification code generator is realized, achieving 12.2 kb/s and comprising 294 tin monoxide TFTs. [ABSTRACT FROM AUTHOR]

Applied Materials' static PVD array coater using rotary targets has been developed to provide less in-film particle, high target utilization performance by novel rotary target technology and uniform layer deposition by unique magnet motion in display industry. It has been optimized to provide highly stable and uniform thin metal oxide layer to reach uniform TFT performance for large area substrate (2500x2200mm glass size). [ABSTRACT FROM AUTHOR]

In this study, we have compared the performance of self-aligned a-IGZO thin-film transistors (TFTs) whereby the source/drain (S/D) region's conductivity enhanced in three different ways, that is, using SiNx interlayer plasma (hydrogen diffusion), using calcium (Ca as reducing metal) and using argon plasma (changing the atomic ratio). All these TFTs show comparable characteristics such as field-effect mobility (μFE) of over 10.0 cm²/(V.s), sub-threshold slope (SS-1) of 0.5 V/decade, and current ratio (ION/ IOFF) over 108. However, under negative-bias-illumination-stress (NBIS), all these TFTs showed strong degradation. We attributed this NBIS stability issue to the exposed S/D regions and changes in the conductivity of S/D contact regions. The hydrogen plasma-treated TFTs showed the worst NBIS characteristics. This is linked to increased hydrogen diffusion from the S/D contact regions to the channel. [ABSTRACT FROM AUTHOR]

In this work we present the impact of buffer layers deposited by various techniques such as plasma enhanced chemical deposition (PECVD), physical vapor deposition (PVD) and atomic layer deposition (ALD) techniques on self-aligned (SA) top gate amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) TFT characteristics. Finally an optimized layer was integrated in TFT backplane on polyimide (PI) foil and a QQVGA AMOLED display is demonstrated. [ABSTRACT FROM AUTHOR]

We present a QVGA (320x240 with 3 sub-pixel) top-emitting AMOLED display with 250ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil with full barrier. The back plane process flow is based on a 7 layer photolithography process. The aperture ratio of the top-emitting OLEDs is approx. 80%. An integrated gate driver is shown that can be driven at operation speed equivalent to a 4k2k display at 100Hz. [ABSTRACT FROM AUTHOR]

The Internet of Things is driving extensive efforts to develop intelligent everyday objects. This requires seamless integration of relatively simple electronics, for example through 'stick-on' electronics labels. We believe the future evolution of this technology will be governed by Wright's Law, which was first proposed in 1936 and states that the cost of a product decreases with cumulative production. This implies that a generic electronic device that can be tailored for application-specific requirements during downstream integration would be a cornerstone in the development of the Internet of Things. We present an 8-bit thin-film microprocessor with a write-once, read-many(WORM)instruction generator that can be programmed after manufacture via inkjet printing. The processor combines organic p-type and soluble oxide n-type thin-film transistors in a new flavor of the familiar complementary transistor technology with the potential to be manufactured on a very thin polyimide film, enabling low-cost flexible electronics. It operates at 6.5 V and reaches clock frequencies up to 2.1 kHz. An instruction set of 16 code lines, each line providing a 9 bit instruction, is defined by means of inkjet printing of conductive silver inks. [ABSTRACT FROM AUTHOR]

A process to make self-aligned top-gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field-effect mobility of 12.0 cm2/(V.s), sub-threshold slope of 0.5 V/decade, and current ratio ( I ON/ OFF) of >107. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (−1.0 MV/cm) bias direction after extended stressing time of 104 s. We achieve a stage-delay of ~19.6 ns at VDD = 20 V measured in a 41-stage ring oscillator. A top-emitting quarter-quarter-video-graphics-array active-matrix organic light-emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage ( VDD), the brightness of the display exceeds 150 cd/m2. [ABSTRACT FROM AUTHOR]

We investigate the relationship between charge concentration, exciton concentration, and photocurrent generation in fullerene-containing heterojunction diodes. Impedance measurements on C60 diodes reveal a charge buildup at the C60/bathocuproine (BCP) interface that can be swept out under reverse bias. In solar cell structures, a similar charge buildup is observed in dark conditions, and increases as a function of incident light intensity. Photoluminescence measurements reveal that the C60 exciton concentration is voltage dependent, explained via the process of exciton-polaron annihilation. This process has a negative impact on the generated photocurrent of the solar cells and thereby decreases the fill factor. A combination of electroabsorption, photoluminescence, and impedance measurements reveal a decrease in charge buildup and the associated exciton-polaron annihilation through the use of a BCP/3,4,9,10-perylenetetracarboxylic bis-benzimidazole/Ag cathode. [ABSTRACT FROM AUTHOR]

In this work, we compared the thin-film transistor (TFT) characteristics of amorphous InGaZnO TFTs with six different source-drain (S/D) metals (MoCr, TiW, Ni, Mo, Al, and Ti/Au) fabricated in bottom-gate bottom-contact (BGBC) and bottom-gate top-contact (BGTC) configurations. In the BGTC configuration, nearly every metal can be injected nicely into the a-IGZO leading to nice TFT characteristics; however, in the BGBC configuration, only Ti/Au is injected nicely and shows comparable TFT characteristics. We attribute this to the metal-containing deposits in the channel and the contact oxidation during a-IGZO layer sputtering in the presence of S/D metal. In bias-stress stability, TFTs with Ti/Au S/D metal showed good results in both configurations; however, in the BGTC configuration, not all the TFTs showed as good bias results as Ti/Au S/D metal TFTs. We attribute this to backchannel interface change, which happened because of the metal-containing deposits at the backchannel during the final the SiO2 passivation. [ABSTRACT FROM AUTHOR]

We present a QQVGA (160times120 with 3 sub-pixel) top-emitting AMOLED display with 85ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil. The back plane process flow is based on a 5 layer photolithography process. The aperture ratio of the top-emitting OLEDs is approx. 25%. For operation at 6 V supply voltage (VDD), the brightness of the display exceeds 150cd/m2. On the same substrate a 160 stage gate-driver was measured at FHD rate. [ABSTRACT FROM AUTHOR]

The first direct measurement is reported of the bulk density of deep states in amorphous IGZO (indium-gallium-zinc oxide) semiconductor by means of deep-level transient spectroscopy (DLTS). The device under test is a Schottky diode of amorphous IGZO semiconductor on a palladium (Pd) Schottky-barrier electrode and with a molybdenum (Mo) Ohmic contact at the top. The DLTS technique allows to independently measure the energy and spatial distribution of subgap states in the IGZO thin film. The subgap trap concentration has a double exponential distribution as a function energy, with a value of ~1019 cm-3 eV-1 at the conduction band edge and a value of ~1017 cm-3 eV-1 at an energy of 0.55 eV below the conduction band. Such spectral distribution, however, is not uniform through the semiconductor film. The spatial distribution of subgap states correlates well with the background doping density distribution in the semiconductor, which increases towards the Ohmic Mo contact, suggesting that these two properties share the same physical origin. [ABSTRACT FROM AUTHOR]

In this work, we report on high-performance bottom-gate top-contact (BGTC) amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with SiO2 as an etch-stop-layer (ESL) deposited by medium frequency physical vapor deposition (mf-PVD). The TFTs show field-effect mobility (μFE) of 16.0 cm2/(V.s), sub-threshold slope (SS−1) of 0.23 V/decade and off-currents (IOFF) < 1.0 pA. The TFTs with mf-PVD SiO2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma-enhanced chemical vapor deposition (PECVD) SiO2 ESL deposited at 300 °C and at 200 °C. The TFTs with different ESLs showed a comparable performance regarding μFE, SS−1, and IOFF, however, significant differences were measured in gate bias-stress stability when stressed under a gate field of +/−1 MV/cm for duration of 104 s. The TFTs with mf-PVD SiO2 ESL showed lower threshold-voltage (VTH) shifts compared with TFTs with 300 °C PECVD SiO2 ESL and TFTs with 200 °C PECVD SiO2 ESL. We associate the improved bias-stress stability of the mf-PVD SiO2 ESL TFTs to the low hydrogen content of the mf-PVD SiO2 layer, which has been verified by Rutherford-Back-Scattering-Elastic-Recoil-Detection technique. [ABSTRACT FROM AUTHOR]

We present vertical Schottky diodes based on amorphous IGZO with an unprecedented cutoff frequency of 1.8 GHz at 0 V bias. These diodes have a rectification ratio of up to 10^8 at \pm1~V and a current density of 800 A/cm^2 at +1~V. The diodes' high performance is achieved by understanding and modeling of the two contacts, a Schottky contact using Pd at the bottom and an ohmic contact formed at the top. In particular, the choice of the latter top contact combined with an optimized IGZO layer thickness proves to be crucial: we show how the semiconductor layer thickness and the nature of the top metal modify the doping concentration profile of the IGZO film, which we fully measure and characterize, and how that affects the performance and optimization of the diodes. We measure our diodes in rectifiers, which operate up to 1.1 GHz. Finally, we show that these rectifiers can be fully modeled in SPICE using diode parameters extracted from electrical measurements. [ABSTRACT FROM AUTHOR]

Abstract: In this study, the authors report high‐quality amorphous Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) thin film transistors (TFTs) fabricated using a new back‐channel‐etch (BCE) process flow on Polyethylene Naphthalate (PEN) foil. The BCE flow allows a better scalability of TFTs for high‐resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165oC in order to ensure good overlay accuracy (< 1µm) on foil. The presented process flow differs from to previously reported by defining the Mo S/D contacts by dry etch prior to a‐IGZO patterning. The TFTs show good electrical performance, including field‐effect mobilities in the range of 15.0cm2/(V.s), sub‐threshold slopes of 0.3V/decade and off‐currents <1.0pA on foil. Finally, the applicability of this new BCE process flow was demonstrated for TFT backplane driving a 32 x 32 active‐matrix organic light‐emitting diode (AMOLED) display. [ABSTRACT FROM AUTHOR]

In this study, we report high-quality amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) fabricated on a polyethylene naphthalate foil using a new back-channel-etch (BCE) process flow. The BCE flow allows a better scalability of TFTs for high-resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 °C in order to ensure good overlay accuracy (<1 µm) on foil. The presented process flow differs from the previously reported flow as we define the Mo source and drain contacts by dry etch prior to a-IGZO patterning. The TFTs show good electrical performance, including field-effect mobilities in the range of 15.0 cm2/(V·s), subthreshold slopes of 0.3 V/decade, and off-currents <1.0 pA on foil. The threshold voltage shifts of the TFTs measured were less than 1.0 V after a stressing time of 104 s in both positive (+1.0 MV/cm) and negative (−1.0 MV/cm) bias directions. The applicability of this new BCE process flow is demonstrated in a 19-stage ring oscillator, demonstrated to operate at a supply voltage of 10 V with a stage delay time of 1.35 µs, and in a TFT backplane driving a 32 × 32 active-matrix organic light-emitting diode display. [ABSTRACT FROM AUTHOR]

We present amorphous indium–gallium-zinc oxide Schottky diodes with unprecedented current densities of 10^4 and 10^5~A/cm^2 at forward biases of 1.5 and 5 V, respectively. The diode presents a high rectification ratio of 10^10 at \pm2~V , which is essential for suppressing the sneak current of not-selected cells in the memory array. In addition, we show that the diode complies with the demanding performance of memory applications. The device degradation, given by a 30% reduction of its forward current after 10^4~s of continuous bias stress or 10^9 pulses cycles, was studied via I-V and C-V measurements and can be attributed to trapping of electrons at deep acceptor levels, which increases the diode built-in potential. Finally, we show that the device is stable upon thermal stress at 300 ^\circC for 1 h, which opens the possibility of further processing and integration with the memory cell. [ABSTRACT FROM AUTHOR]

AMOLED backplanes were fabricated on both rigid glass and flexible plastic substrates using a solution processed oxide semiconductor processed at temperatures <250C with mobilities greater than 2 cm2/Vs. The backplanes were integrated onto a thin film moisture barrier and QQVGA AMOLED displays were successfully fabricated. [ABSTRACT FROM AUTHOR]

In this work, we present the impact of S/D contact formation, that is, by SiN plasma doping (hydrogen incorporation), metallic reduction (by calcium) and by argon plasma (compositional change) on NBIS instabilities of self-aligned a-IGZO TFTs. [ABSTRACT FROM AUTHOR]

We validate a model which is a combination of multiple trapping and release and percolation model for describing the conduction mechanism in amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFT). We show that using just multiple trapping and release or percolation model is insufficient to explain TFT behavior as a function of temperature. We also show the intrinsic mobility is dependent on temperature due to scattering by ionic impurities or lattice. In solving the Poisson equation to find the surface potential and back potential as a function of gate voltage, we explicitly allow for the back surface to be floating, as is the case for a-IGZO transistors. The parameters for gap states, percolation barriers and intrinsic mobility at room temperature that we extract with this comprehensive model are in good agreement with those extracted in literature with partially-complete models. [ABSTRACT FROM AUTHOR]

We report on the impact of source/drain (S/D) metal (molybdenum) etch and the final passivation (SiO2) layer on the bias-stress stability of back-channel-etch (BCE) configuration based amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs). It is observed that the BCE configurations TFTs suffer poor bias-stability in comparison to etch-stop-layer (ESL) TFTs. By analysis with transmission electron microscopy (TEM) and energy dispersive spectroscopy (EDS), as well as by a comparative analysis of contacts formed by other metals, we infer that this poor bias-stability for BCE transistors having Mo S/D contacts is associated with contamination of the back channel interface, which occurs by Mo-containing deposits on the back channel during the final plasma process of the physical vapor deposited SiO2 passivation. [ABSTRACT FROM AUTHOR]

We suggest an analytic theory based on the effective medium approximation (EMA) which is able to describe charge-carrier transport in a disordered semiconductor with a significant degree of degeneration realized at high carrier concentrations, especially relevant in some thin-film transistors (TFTs), when the Fermi level is very close to the conduction-band edge. The EMA model is based on special averaging of the Fermi-Dirac carrier distributions using a suitably normalized cumulative density-of-state distribution that includes both delocalized states and the localized states. The principal advantage of the present model is its ability to describe universally effective drift and Hall mobility in heterogeneous materials as a function of disorder, temperature, and carrier concentration within the same theoretical formalism. It also bridges a gap between hopping and bandlike transport in an energetically heterogeneous system. The key assumption of the model is that the charge carriers move through delocalized states and that, in addition to the tail of the localized states, the disorder can give rise to spatial energy variation of the transport-band edge being described by a Gaussian distribution. It can explain a puzzling observation of activated and carrier-concentration-dependent Hall mobility in a disordered system featuring an ideal Hall effect. The present model has been successfully applied to describe experimental results on the charge transport measured in an amorphous oxide semiconductor, In-Ga-Zn-O (a-IGZO). In particular, the model reproduces well both the conventional Meyer-Neldel (MN) compensation behavior for the charge-carrier mobility and inverse-MN effect for the conductivity observed in the same a-IGZO TFT. The model was further supported by ab initio calculations revealing that the amorphization of IGZO gives rise to variation of the conduction-band edge rather than to the creation of localized states. The obtained changes agree with the one we used to describe the charge transport. We found that the band-edge variation dominates the charge transport in high-quality a-IGZO TFTs in the above-threshold voltage region, whereas the localized states need not to be invoked to account for the experimental results in this material. [ABSTRACT FROM AUTHOR]