156 results on '"Kuroda, Tadahiro"'
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2. Micron-to-Submicron Cu electroplating in view of Agile-X LSI Chips Fabrication using Open Facility
3. Wearable sensor-based human activity recognition from environmental background sounds
4. Proximity Wireless Communication Technologies: An Overview and Design Guidelines.
5. A bonding-less 5 GHz RFID module using inductive coupling between IC and antenna.
6. A 6-Gb/s Inductively-Powered Non-Contact Connector With Rotatable Transmission Line Coupler and Interface Bridge IC.
7. Threshold-Volgage control schemes through substrate-bias for low-power high-speed CMOS LSI design
8. Low-Power and ppm-Level Multimolecule Detection by Integration of Self-Heated Metal Nanosheet Sensors.
9. A 96-MB 3D-Stacked SRAM Using Inductive Coupling With 0.4-V Transmitter, Termination Scheme and 12:1 SerDes in 40-nm CMOS.
10. Wireless proximity interfaces with a pulse-based inductive coupling technique
11. Architecture design of versatile recognition processor for sensornet applications
12. QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3-D SRAM Using Inductive Coupling Technology in 40-nm CMOS.
13. Hydrophilic Bonding of SiO2/SiO2 and Cu/Cu using Sequential Plasma Activation.
14. BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W.
15. Analytical thruchip inductive coupling channel design optimization.
16. Basic study of non-contact connector for high-speed space cable transmission: Space fibre, short paper.
17. Low-energy algorithm for self-controlled Wireless Sensor Nodes.
18. A 6 Gb/s 6 pJ/b 5 mm-Distance Non-Contact Interface for Modular Smartphones Using Two-Fold Transmission Line Coupler and High EMC Tolerant Pulse Transceiver.
19. An Inductively Powered Wireless Solid-State Drive System With Merged Error Correction of High-Speed Wireless Data Links and NAND Flash Memories.
20. Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces.
21. Low-latency wireless 3D NoCs via randomized shortcut chips.
22. Crosstalk Rejection in 3-D-Stacked Interchip Communication With Blind Source Separation.
23. An 8 bit 0.3–0.8 V 0.2–40 MS/s 2-bit/Step SAR ADC With Successively Activated Threshold Configuring Comparators in 40 nm CMOS.
24. Hardware-oriented stereo vision algorithm based on 1-D guided filtering and its FPGA implementation.
25. Adaptive window search using semantic texton forests for real-time object detection.
26. A 0.7V intermittently operating LNA with optimal on-time controller for pulse-based inductive-coupling transceiver.
27. A 1.26mW/Gbps 8 locking cycles versatile all-digital CDR with TDC combined DLL.
28. A case for wireless 3D NoCs for CMPs.
29. A 40nm CMOS full asynchronous nano-watt SAR ADC with 98% leakage power reduction by boosted self power gating.
30. A 0.5V 10MHz-to-100MHz 0.47μz power scalable AD-PLL in 40nm CMOS.
31. A 12.5Gb/s/link non-contact multi drop bus system with impedance-matched transmission line couplers and Dicode partial-response channel transceivers.
32. A 100Mb/s 13.7pJ/bit DC-960MHz band plesiochronous IR-UWB receiver with costas-loop based synchronization scheme in 65nm CMOS.
33. A 9-bit 100MS/s tri-level charge redistribution SAR ADC with asymmetric CDAC array.
34. A 0.7V 4.1mW 850Mbps/ch inductive-coupling transceiver with adaptive pulse width controller in 65nm CMOS.
35. Vertical Link On/Off Control Methods for Wireless 3-D NoCs.
36. CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect.
37. An 8bit 0.35–0.8V 0.5–30MS/s 2bit/step SAR ADC with wide range threshold configuring comparator.
38. A vertical bubble flow network using inductive-coupling for 3-D CMPs.
39. Proximity IOs using inductive coupling.
40. 3-D NoC on Inductive Wireless Interconnect.
41. Inductive Coupled Communications.
42. Practical methodology of post-layout gate sizing for 15% more power saving.
43. Optimization and control of VDD and VTH for low-power, high-speed CMOS design.
44. A 280 Mb/s In-Vehicle LAN System Using Electromagnetic Clip Connector and High-EMC Transceiver.
45. 3D NoC with Inductive-Coupling Links for Building-Block SiPs.
46. Highlights of the ISSCC 2013 Processors and High Performance Digital Sessions.
47. A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler.
48. A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface.
49. A 0.5-V 5.2-fJ/Conversion-Step Full Asynchronous SAR ADC With Leakage Power Reduction Down to 650 pW by Boosted Self-Power Gating in 40-nm CMOS.
50. 3D integration using inductive coupling and coupled resonator (Invited).
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