12 results on '"Su, Hung-Der"'
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2. A floating well method for exact capacitance-voltage measurement of nano technology
3. Demonstration of a HV BCD technology with LV CMOS process.
4. Ultralow Capacitance Transient Voltage Suppressor Design.
5. Using LV process to design high voltage DDDMOSFET and LDMOSFET with 3-D profile structure.
6. Semiself-Protection Scheme for Gigahertz High-Frequency Output ESD Protection.
7. 0.18um BCD technology with best-in-class LDMOS from 6 V to 45 V.
8. Improving the Electrostatic Discharge Robustness of a Junction Barrier Schottky Diode Using an Embedded p-n-p BJT.
9. Failure mechanism for input buffer under CDM test.
10. Simple scheme to increase hold voltage for silicon‐controlled rectifier.
11. Enhanced CDM-robustness for the packaged IC with the extra bonding wire to the die-attach plate.
12. Robust ESD self-protected LDNMOSFET by an enhanced displacement-current triggering.
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