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We have achieved the monolithic integration of two III-nitride device structures through the use of etching and regrowth by molecular beam epitaxy (MBE). Using this regrowth technique, we integrated enhancement-mode (E-mode) and depletion-mode (D-mode) AlN/GaN/AlGaN double-heterojunction field-effect transistors (DHFETs) on a single SiC substrate, wherein the E-mode devices had a 2-nm-thick AlN barrier layer and the D-mode devices had a 3.5-nm-thick AlN barrier layer. The direct-current and radio-frequency (RF) performance of the resulting DHFETs was equivalent to devices fabricated using our baseline process with a normal MBE growth. D-mode devices with a gate length of 150 nm had a threshold voltage Vth of -0.10 V, a peak transconductance gm value of 640 mS/mm, and currentgain and power-gain cutoff frequencies fT and f\max of 82 and 210 GHz, respectively. E-mode devices on the same wafer with the same dimensions had a Vth value of +0.24 V, a peak gm value of 525 mS/mm, and fT and f\max values of 50 and 150 GHz, respectively. The application of this regrowth technique is not, in any way, limited to the integration of E- and D-mode devices, and this method greatly expands the design possibilities of RF and power switching circuits in the nitride material system. [ABSTRACT FROM AUTHOR]

In this letter, we report the first experimental observation of electron velocity enhancement by aggressive lateral scaling of GaN HEMTs. Through reduction of the source–drain distance down to 170 nm using n^+-GaN ohmic regrowth, 45-nm gate \AlN/GaN/Al0.08\Ga0.92\N HEMTs exhibited an extremely small on resistance of 0.44 \Omega \cdot \mm, a high maximum drain current density of 2.3 A/mm, a high peak extrinsic transconductance of 905 mS/mm, and a record fT/f\max of 260/394 GHz. Delay time analysis showed that the outstanding fT was mainly due to significantly reduced electron transit time at higher drain–source voltages resulting from suppressed drain delay and enhanced electron velocity in the laterally scaled GaN HEMTs. [ABSTRACT FROM AUTHOR]

Highly scaled AlN/GaN metal–oxide–semiconductor heterojunction field-effect transistors (MOS-HFETs) with \Al2\O3 gate dielectrics of varying thicknesses deposited by atomic layer deposition (ALD) were fabricated, and their performance was compared with Schottky-barrier HFETs (SB-HFETs). MOS-HFETs with an ultrathin 2-nm-thick \Al2\O3 dielectric and a gate length of 40 nm had direct-current (dc) and radio-frequency (RF) performances similar to the SB-HFETs, with a high extrinsic transconductance of 415 mS/mm, fT of 134 GHz, and f \max of 261 GHz. In contrast, the dc and RF performances of a MOS-HFET with a 4-nm-thick \Al2\O3 dielectric were degraded by short-channel effects. The 2-nm-thick \Al2\O3 gate insulator reduced the forward-bias gate current by more than two orders of magnitude. The data suggest the promise of ultrathin ALD \Al2\O3 gate dielectrics for next-generation high-speed GaN HFETs. [ABSTRACT FROM AUTHOR]

An enhancement-mode (E-mode) AlN/GaN/AlGaN double-heterojunction field-effect transistor (DHFET) with record high-frequency performance is reported. E-mode operation was achieved through vertical scaling of the AlN barrier layer. Parasitic resistances were reduced through ohmic contact recess etching followed by regrowth of \n+ GaN by molecular-beam epitaxy and SiN deposition to increase the sheet charge density in the access regions of the device, resulting in an extremely low on-resistance of 1.06 \Omega \cdot \mm. A DHFET with an 80-nm gate length had a threshold voltage of 0.21 V, an extrinsic transconductance (gm) of 0.70 S/mm, a current-gain cutoff frequency (fT) of 112 GHz, and a maximum oscillation frequency (f\max) of 215 GHz. To our knowledge, these are the highest gm, fT, and f \max values reported to date for an E-mode GaN HFET. [ABSTRACT FROM PUBLISHER]

The first demonstration of enhancement/depletion (E/D)-mode integrated digital circuits in GaN technology is reported. Specifically, the performance of static divide by 2 circuit implemented in direct coupled FET logic and of a 23-stage ring oscillator, implemented in super-buffered FET logic are presented. The reported E/D technology is potentially suitable for fabrication of mixed signal GaN circuits. [ABSTRACT FROM AUTHOR]