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This paper presents the development of a Class-D full-bridge zero-voltage switching (ZVS) inverter, applicable to wireless power transfer (WPT) systems, operating at 13.56 MHz switching frequency with dynamic dead-time control (DDTC). Resonant-coupled WPT systems are being designed at ultrahigh switching frequencies to reduce the size of the wireless link and the passive components. Maintaining ZVS while controlling the output power delivered to a fixed or variable load is one of the major challenges of designing inverters at multi-MHz switching frequencies. DDTC is the approach deployed in this paper to sustain soft switching of a Class-D full-bridge inverter over the full range of output power while regulating the input dc bus voltage. Simulation results are presented to show that dynamically controlling the dead-time during input dc bus voltage variations reduces switch-node voltage overshoot, prevents large current spikes in the switching devices, and reduces associated high switching loss. Practical results obtained show that DDTC reduces switch-node voltage overshoot, increases the inverter efficiency, and reduces the steady-state temperature of the inverter during output power regulation. [ABSTRACT FROM AUTHOR]

In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

Soft magnetic powder cores with their high saturation flux density and low core loss are excellent alternatives for filter inductors in inverter-based applications. However, their nonlinear current-dependent inductance characteristics pose a challenge for control of grid-connected inverter with LCL filter. In this paper, the variable inductance conundrum is discussed and a modified direct digital control method based on a variable-structure inductance estimation model that takes into consideration wide nonlinear variation in both inverter- and grid-side inductances is proposed. The proposed method is shown to have better grid-voltage harmonic rejection and improved stability margins. However, investigation of stability which is conventionally based on nominal values of filter inductors cannot predict instabilities over the entire range of inductance variation. Hence, a parametric approach to conventional stability methods with a parameter space defined by variation in actual and estimated inductance is explored in this paper. The effect of line impedance on stability is also investigated with impedance-based stability criterion by considering line inductance as an additional dimension in the parameter space. A pattern in stability margins is observed due to inductance variation, with inductance at its minimum being most vulnerable to instability. Experimental results measured from a 5 kW single-phase grid-connected inverter with various LCL filters have verified the feasibility of the proposed control method. The experimental results also match the analytical results with reasonable accuracy. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper proposes a high-efficiency single-phase T-type boundary conduction mode (BCM) microinverter. The conventional full-bridge BCM microinverter has achieved zero voltage switching (ZVS) and thereby improved the efficiency, but it suffers from high switching losses under light load conditions. The proposed T-type BCM microinverter reserves ZVS and uses a multilevel technique to further decrease the switching losses. The BCM operation with multilevel technique will have too low switching frequency when the grid voltage approaches half of the dc link voltage. To solve this problem, this paper adopts a third operation mode for the T-type switching leg to maintain the switching frequency above a minimum value. The corresponding mode transitions are also detailed to ensure a smooth operation. Because of the turn-offdelay of the freewheeling transistor, the actual lower current boundary deviates from the programmed one, which will distort output current. To address this issue, this paper also proposes a boundary compensation method. A prototype has been built for performance verification, which can test both full-bridge and T-type topology. Compared with the full-bridge BCM microinverter, the proposed T-type BCM microinverter has a higher efficiency over the whole load range. [ABSTRACT FROM AUTHOR]

Soft-switching techniques of transformerless photovoltaic grid-connected inverters (TLIs) can significantly reduce switching losses, as well as soften switching processes. Conventional dc–ac soft-switching configurations proposed by Dr. Deepakraj M. Divan are invalid in TLIs because of the leakage current problem. In order to develop soft-switching techniques in TLIs, this paper proposes a new soft-switching configuration and a procedure to guide the invention of soft-switching TLIs. First, this paper proposes two basic resonance tanks related to dc bus polarities, and then, uses these basic tanks to elevate four popular full-bridge-type TLIs according to the proposed guideline. As a result, four soft-switching TLIs are gained. Second, this paper picks obtained soft-switching highly efficient and reliable inverter concept (HERIC) as example to analyze its soft-switching operation principle and performance. As a consequence, all active switches of the gained soft-switching HERIC circuit are switched under both of zero-current turn-on and turn-off conditions; the reverse recovery problem of freewheeling diodes is alleviated owing to the zero-current turn-off of diodes; meanwhile, the common-mode voltage at the switching frequency scale is still constant. Finally, some experimental results from a 3-kW universal prototype at 50-kHz switching frequency are provided to verify the effectiveness of the main contributions of this paper. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-efficiency photovoltaic (PV) converter for grid connection through a high-leg delta transformer. The converter is composed of a symmetrically connected boost converter and three half-bridge inverters. One of the three half-bridge inverters is connected to the boost converter, and the others are directly connected to the PV terminals. As a result, this circuit configuration enables to reduce the power losses in both boost converter and inverters. This paper also proposes a new cooperative control method between the symmetrically connected boost converter and inverter. The control method can reduce the average switching frequency to 75% of that in a conventional one, resulting in a great reduction in the switching power loss. Experimental results confirm that the proposed circuit configuration makes it possible to improve its European efficiency from 91.6% to 94.5%. Moreover, system performance is evaluated on the assumption of maximum power point tracking operation. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

This paper proposes a variable off-time control method for a single-phase microinverter operating in the discontinuous conduction mode (DCM) for efficiency improvement. First, the fixed off-time control method is analyzed. The concept is to fix the off-time of the active switch throughout a line cycle for all output powers and scale the on-time of the active switch to shape a sinusoidal output current. Then, based on the fixed off-time control method, a variable off-time control method is proposed to modulate the preset fixed off-time in order to decrease the switching frequency during ac line zero-crossings and light load conditions. Compared with existed fixed-frequency DCM control or boundary conduction mode control, the variable off-time control is more flexible to optimize the efficiency under different load conditions as the switching frequency range can be automatically adjusted according to the output power. The switching frequency is high at heavy loads to limit the maximum peak current and is low at light loads to increase the light load efficiency. In addition, a predictive on-time method is adopted to simplify inverter control and reduce hardware costs. The parameter design principle is detailed in this paper. A 300 W prototype is built to verify the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper investigates and evaluates the performance of a single-phase split-source inverter (SSI), where an alternative unidirectional dc–ac configuration is used. Such configuration is utilized in order to use two common-cathode diodes in a single device instead of using two separate diodes, resulting in minimum parasitic inductance in the commutation paths. In this paper, the analysis and modulation of the single-phase SSI using this alternative configuration is discussed, and the analysis of the low-frequency component in the dc side is introduced. Moreover, the features behind employing the triangular, the trailing-edge sawtooth, and the leading-edge sawtooth carriers with the single-phase SSI are discussed, and the differences among these carriers are highlighted. In order to highlight the performance of the proposed SSI, a comparative study is conducted with the two-stage architecture and the single-phase quasi-Z-source inverter (qZSI). The introduced analysis is enhanced with simulation results using MATLAB/PLECS models, where a 1-kVA single-phase SSI is designed and simulated. Finally, the designed 1-kVA single-phase SSI is implemented experimentally and tested at different operating points, i.e., at different voltage gains, and a maximum efficiency of $95.5\%$ is obtained. [ABSTRACT FROM PUBLISHER]

In this paper, it is described how the circulating current flows between inverters that have isolated dc link such as cascaded H-bridge (CHB) topology when they are operating in parallel. In this case, zero sequence circulating current, which normally flows through shared dc link, cannot flow between inverters in parallel. However, circulating current is provoked by asynchronous switching instant of devices, difference of dc-link voltages of parallel inverters, and unbalanced impedance. The circulating current should be suppressed by a sharing inductor that is inserted between inverters. Generally, all of the inverters should synthesize the same output voltage reference for load current control to minimize the size of this sharing reactor. However, this conventional method cannot guarantee diminishing circulating current in the transient state and even in the steady state. In this paper, in order to reduce sharing reactance, after deriving circulating current model from general case of n-parallel operation, circulating current control method is devised based on the model. This proposed algorithm is applied to active front end five-level-CHB inverter system for medium voltage drive. Simulation and experimental results are provided to verify the effectiveness of the proposed control scheme. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes the use of advanced bus clamping switching sequences to reduce the impedance network inductor current ripple of the three-phase Z-source inverter (ZSI). Proposed technique is named as ABC4_MCB. MCB denotes that the maximum constant boost control method is used for the voltage boosting. One of the conventional space vector pulsewidth modulation of ZSI, “ZSVM6,” is termed as ZSVM6_MCB under the maximum constant boost control method. The switching sequences of ABC4_MCB technique are designed in such a way that it offers around 34% reduction in the maximum instantaneous inductor current ripple as compared to the ZSVM6_MCB for the equal average switching frequency. The factor of percentage reduction in the inductor current ripple using the proposed technique is constant over the entire range of shoot through duty ratio (0–0.48). Theoretical findings have been verified using simulation and experimental results. [ABSTRACT FROM AUTHOR]

In recent years, a number of bidirectional inductive power transfer systems (BD-IPT) suitable for wireless grid integration of electric vehicles have been developed. These developments have been fueled by the enhanced efficiency and spatial tolerance offered by BD-IPT systems. A typical BD-IPT system utilizes two synchronized full-bridge converters operating at fixed duty cycles to drive the primary and secondary magnetic couplers. However, in order to cater for a wide range of loading conditions, additional circuitry is employed at the expense of cost and power density. As an alternative solution, this paper proposes a novel power converter, named a boost active bridge (BAB), to replace the full-bridge converters. The BAB topology caters to a wide range of loading conditions without the need for any extra switching devices. A comprehensive mathematical model that predicts steady-state currents, voltages, and power transfer is presented to highlight the operating principles of the BAB technology. Experimental results obtained from a 3.5-kW prototype show a nearly constant efficiency under all loading conditions, validating the viability of the proposed BAB topology. [ABSTRACT FROM AUTHOR]

This paper presents the circuit design and magnetic integration of push–pull class-E inverters for wireless power transfer (WPT) up to megahertz. The design criterion for achieving zero-voltage switching (ZVS) of a class-E inverter with coupled windings is derived mathematically. The approaches of magnetic integration for push–pull class-E inverters are analyzed and compared. Then, a new magnetic structure with hybrid magnetic materials is proposed to build the integrated inductors with either coupled windings or uncoupled windings. A 3-MHz WPT system is built to verify the analysis. The detailed comparison of the class-E inverters with magnetic integration is presented in terms of switch voltage, efficiency, harmonic currents, and thermal distribution. In the optimized design example, the switches keep ZVS over the entire load range without using any closed-loop control. The system efficiency reaches 87.1% at 350-W output power. [ABSTRACT FROM AUTHOR]

In this paper, two single-phase single-stage split-inductor buck–boost inverters are proposed: type-I and II. The proposed type-I is unity power factor inverter, while the proposed type-II inverter is suitable for any power factor. Both topologies remove the shoot-through problem. Furthermore, the reverse recovery issues for all switches are eliminated; therefore, mosfets are used to obtain higher efficiencies. The proposed inverters operated at higher switching frequencies confer the additional benefit of smaller passive components. The current stresses of the two switches in the proposed type-I and II inverters are lower of the conventional boost inverter. The dead time can be eliminated at both the high and line switching frequencies. In addition, the inductor conduction loss is minimized to improve efficiency. Moreover, the voltage stresses of the two switches in the type-I inverter can be much lower of its counterpart boost inverter. Most importantly, unlike the conventional high-reliability inverters, the magnetic volume of the proposed high-reliability type-I and II inverters is same of its counterpart boost inverter. The experimental results obtained for 500 W, 110 Vrms, 60 Hz hardware prototypes verify the analysis. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

In this paper, an integrated step-up inverter without transformer is investigated for photovoltaic (PV) power generation. The proposed topology can be derived by combining a traditional boost converter with a single-phase full bridge dc–ac converter. The main features of the integrated inverter are: First, the leakage current caused by the solar cell array-to-ground parasitic capacitance can be theoretically reduced to zero due to the characteristics of the converter configuration, which can improve the efficiency and the reliability of the PV generation system; second, the output ac voltage of the proposed inverter can be higher than the input dc voltage, which is capable of connecting low voltage PV panels to the grid; third, only five active switches are used in the presented inverter, and those switching devices can be synchronously driven by various sinusoidal pulsewidth modulation methods based on the carrier; therefore, the proposed inverter is compact and with curtailed cost. The working principle and analysis of the proposed integrated inverter are elaborated. Finally, simulation and experimental results are obtained in a lab prototype, which agree well with the theoretical analysis. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

The magnetic resonant wireless power transfer (WPT) system with a class E inverter has wide application in mid-range power transmission, especially for several megahertz scenario. However, it is cumbersome for the existing modeling and analysis methods to obtain the analytical solution to the system variables, which limits the evaluation of system characteristic. This paper proposes a nonlinear mathematical model for the WPT system with a class E inverter. The equivalent small parameter method (ESPM) is first adopted to solve the proposed six-order nonlinear model, and symbolic-form steady-state periodic solutions are yielded. During the whole solving process, only three iteration steps are needed for the proposed method. Compared with other existing modeling and analysis methods, the symbolic periodic results acquired by the ESPM exhibit sufficient accuracy by virtue of the combination of more higher harmonics. Meanwhile, the calculation complexity is simplified remarkably. Simulation and available experiments validate the effectiveness and accuracy of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

This paper describes a novel family of single-phase single-stage buck–boost inverters using output unfolding circuits. Operation principles and component design guidelines along with modulation techniques are presented and discussed. The simulation results confirm all theoretical statements. Experimental setup of the most promising solution is assembled and tested, where the efficiency for different operation modes is analyzed. Finally, the pros and cons along with applications of the proposed solutions are discussed in the conclusions. [ABSTRACT FROM AUTHOR]

The class-E shunt inductor inverter (SII) topology typically operates based on zero-current switching (ZCS) and zero-derivative current switching (ZDCS) conditions. Based on these terms, the peak switch voltage and load resistance are eliminated as the major limitation parameters to implement the class-E SII with the desired design specifications. This paper introduces the design and analysis of the class-E SII with the specified deviation from both ZCS and ZDCS conditions. Therefore, 2 degrees of the design freedom are obtained. Two new parameters that are normalized by the dc-supply current are defined in terms of the deviation from ZCS, i.e., $\alpha $ and ZDCS, i.e., $\beta $. This operation mode of class-E SII is named as the nonzero current. The performance characteristics and design relationships are obtained in terms of the phase shift between the input and output voltages. The demonstration of the proposed operation mode is proven by fabrication of a prototype circuit with output power 10 W at 4-MHz operating frequency and close agreement between experimental outcomes with the simulation and theoretical results. [ABSTRACT FROM AUTHOR]

In this paper, a new topology for half-bridge Z-source inverter is proposed. The proposed topology has only one impedance network. Unlike to the conventional half-bridge inverter, the proposed topology can provide zero voltage level at the output. It also increases output voltage level and stabilizes it in the desired value. Capacitor voltage stress in the proposed topology is low, and, therefore, nominal voltage of capacitor and cost decreases. In this paper, the steady-state analysis of the proposed inverter in two new operations which are named synchronous operation of diodes and asynchronous operation of diodes is conducted based on mathematics calculations. A method to obtain high-voltage gains by cascading the Z-network and combining middle inductors is presented that leads to cost, size, and weight reduction. Comparison among the proposed converter with conventional ones shows its excellent performance. The experimental results have good agreement with analytical analysis for the proposed topology. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

Aimed at the problem that the auxiliary commutation circuit (ACC) of auxiliary resonant commutated pole (ARCP) inverters has a high loss in commutation processes, this paper presents a novel modulation strategy with shunt dead time based on a double ARCP (DARCP) inverter. In comparison with the original modulation strategy, this modulation strategy cannot only achieve soft switching for all switches, but also avoid the superposition of resonance current and load current at commutation moments in double ACCs (DACCs) and make the maximum current through DACCs approximately equal to load current in commutation processes. So, the circulating current loss in DACCs and the current stress of auxiliary switches can be effectively reduced. According to the equivalent circuits in different operation modes under the novel modulation strategy, this paper analyzes the operation principle, soft-switching implementation condition, and optimal parameter design procedure of the DARCP inverter. Finally, a 10-kW–16-kHz DARCP inverter prototype with insulated gate bipolar transistor-based switches is built. Experimental results are given to demonstrate the validity and features of the DARCP inverter under the novel modulation strategy. [ABSTRACT FROM AUTHOR]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

A variable switching frequency space vector modulation control method is proposed in this paper. It is used to achieve zero-voltage switching (ZVS) for two parallel 180° interleaved three-phase grid-connected voltage-source inverters at unity power factor. A wide range of ZVS can be achieved without any additional sensor, auxiliary circuit, or current zero-crossing detection circuit. The carrier wave frequency is easy to be calculated and updated with digital control. The current ripple is precisely predicted and controlled to minimize unnecessary circulation loss. The high current ripple at the inverter side can be considerably canceled by the parallel interleaved configuration. LCL filter is used to further attenuate the current ripple and improve the power quality at the grid side. The switching loss can be significantly reduced especially by using a wide bandgap device with low turn-off loss. The power density is greatly improved owing to the high switching frequency and low component parameters of the filter. A 4.5-kW simulation and experimental prototype interfacing 400 V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

In this paper, a variable switching frequency space vector pulsewidth modulation control is proposed. It is used to achieve zero voltage switching (ZVS) for a three-phase grid-connected voltage source inverter with unity power factor. A wide range of ZVS can be realized without any additional sensors, auxiliary circuits, or current zero crossing detection circuits. The switching frequency can be easily calculated by a digital controller. The frequency variation range in a line cycle is only about 1.5 times at any specific load. An LCL filter is used to attenuate the high current ripples at the inverter side, and active damping is adopted to avoid the resonance and reduce the filter power loss. The switching loss can be significantly reduced by using silicon carbide mosfets so that the conversion efficiency is high. The power density can also be improved due to the high switching frequency and the low inductance value of the filter. The operating principle, design considerations, and loss analyses are discussed in detail. A 3.5-kW simulation and experimental prototype interfacing a 350–400-V dc with a three-phase 110-V ac grid is developed to verify the performance of the proposed control strategy. [ABSTRACT FROM AUTHOR]

This paper introduces a new configuration of bidirectional multilevel converter in electric vehicle (EV) applications. It has multilevel dc–dc converter with a dc link capacitor voltage balance feature. The multilevel dc–dc converter operates in a bidirectional manner, which is a fundamental requirement in EVs. Compared to the conventional configurations, the proposed one only implements two extra power switches and a capacitor to balance the voltage of the T-type multilevel inverter (MLI) capacitor over a complete drive cycle or at fault conditions. Therefore, no extra isolated sensor, control loops, and/or special switching pattern are required. Moreover, the proposed configuration due to the high-frequency cycle-by-cycle voltage balance between ${C_N}$ and ${C_P}$ , the bulky electrolytic capacitors used in T-type MLI, are replaced with more reliable longer life film capacitors. This will result in a size and weight reduction of the converter by 20%. This allows more real estate for the EV battery in the chassis’ space envelope to increase its capacity. The proposed configuration is tested and validated using a matlab/Simulink simulation model. A laboratory prototype of 1 kW is built to provide the proof of concept results as well. [ABSTRACT FROM AUTHOR]

Due to the pulsating power at the inverter output terminals, the passive storage elements of the boost stage of the current-fed switched inverter (CFSI) contain a power frequency harmonic component (100 Hz), apart from dc and switching frequency components. In prior designs, the second harmonic component is suppressed by increasing the size of the input filter inductor and capacitor or by using additional circuits. This paper presents a complete characterization of a control-based approach to suppress the power frequency harmonic component in the input inductor current of a CFSI. It also presents a comprehensive characterization of the harmonic power redistribution. Using the proposed approach, it is demonstrated that the inductor value of a CFSI is reduced by 61% for the same peak-to-peak ripple. This leads to an improvement in the conversion ratio, efficiency, and power density of the overall converter. A SiC MOSFET-based CFSI with 75-kHz switching frequency is used to verify the proposed design philosophy. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

Although SiC-mosfet has significant advantages on switching performance over traditional Si-IGBT, the switching loss of SiC-mosfet devices at hard switching rises quickly with the increment in the switching frequency. This has narrowed down further possibilities of improving efficiency and power density of the grid inverter. Zero-voltage-switching (ZVS) space-vector-modulation (SVM) technique is introduced to further push the power density of SiC-mosfet inverter. This paper focuses on the impact of applying the ZVS-SVM to three-phase two-level SiC-mosfet inverter. With the same efficiency requirement the ZVS-SVM SiC inverter can operate at a much higher switching frequency, which gives the opportunity to further reduce the size of passive components. The loss distributions, conversion efficiencies, and volumes of passive components of both a 20-kW SiC-mosfet hard-switching inverter and a 20-kW SiC-mosfet ZVS-SVM inverter have been compared under switching-frequency range from 50 to 300 kHz. Meanwhile, a new metric called “efficiency stiffness” is proposed to compare different inverters with respect to the efficiency performance against switching-frequency characteristics. In addition, high voltage overshoot of SiC-mosfet and high thermal stress of resonant inductor are the two critical issues in the SiC-mosfet ZVS-SVM inverter with high switching frequency. A power module including seven SiC-mosfet bare dies with low stray inductance is designed for ZVS-SVM inverter instead of the existing seven discrete TO-247 package SiC-mosfets to reduce the voltage overshoots on the switches. Besides, to reduce the power loss of the resonant inductor caused by large amplitude of current at hundreds of kHz excitation frequency, design of the inductor with distributed air gap and optimal winding thickness are studied. A 20-kW SiC-mosfet ZVS-SVM grid inverter prototype is built to verify the proposed design. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

This paper proposes a switching strategy for the Z-source inverter (ZSI), which has unequal short-through intervals to reduce the current ripple in the inductor of its impedance source. A size reduction of the inductor of the ZSI is one of the important issues in improving the power density of the ZSI, and the inductor current ripple reduction is required to achieve it. The proposed method can reduce the inductor current ripple by 27.8% compared with the conventional method that has equal short-through intervals without increasing the number of inverter switching. The proposed operation and ripple reduction were confirmed in experiments with a 3-kW-class laboratory prototype. Its result agreed to the calculated results, and it was confirmed that there is no increase in circuit losses caused by the application of the proposed method. [ABSTRACT FROM AUTHOR]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

Due to the lack of electrical isolation, the leakage current is one of the most important issues for transformerless photovoltaic (PV) systems. In this paper, a new modulation strategy is proposed to reduce the leakage current for a Z-source four-leg transformerless PV inverter. First, the common-mode loop model is presented. And then the common mode voltage behavior and the effect of factors on the leakage current are discussed. A new modulation strategy is proposed to achieve the step-up function and constant common mode voltage. Therefore, the leakage current can be suppressed effectively. Finally, the proposed strategy is digitally implemented and tested on the TMS320F28335 DSP and XC3S400 FPGA controlled hardware platform. The experimental results verify the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

This paper presents a new dc/ac inverter for low-power applications (i.e., high-voltage, low-current applications), which offers soft switching of the power semiconductors and low output current ripple. In the proposed power circuitry, a novel ripple steering approach is used that can provide soft switching for the power semiconductors and significantly attenuate the high-frequency current ripple of the inverter. The proposed ripple steering technique utilizes the switching frequency and the duty cycle in order to perform the aforementioned tasks. Basically, the ripple steering technique steers the energy of the ripple to the output capacitances of the power semiconductors in order to provide the soft-switching condition. Theoretical analysis, simulation results, and experimental results verify the feasibility of the proposed technique and demonstrate the superior performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a high-frequency dc–dc converter with a synchronous rectifier (SR), which is suitable for the low-voltage output application. The proposed topology consisting of a Class Φ2 inverter and a synchronous Class E current-driven rectifier features low switch voltage stress, fast transient response, and high efficiency. First, the analysis and design method of the converter are presented. Concerning the coupling of amplitude and phase of the fundamental voltage and current in the rectifier stage, the duty cycle of the switch is considered in the proposed design method. For the design of the inverter stage, the impedance of the resonant tank across the main mosfet is utilized in the design process. Second, a self-oscillating resonant driver with dc bias voltage is proposed for the SR switch and features low component count and low driving power loss. A prototype with 12 V input and 5 V/10 W output was built to verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

An enhanced DC–DC converter is proposed in this paper, based on the combination of the Cuk and SEPIC converters, which is well-suited for solar photovoltaic (PV) applications. The converter uses only one switch (which is ground-referenced, so simple gate drive circuitry may be used), yet provides dual outputs in the form of a bipolar DC bus. The bipolar output from the DC–DC converter is able to send power to the grid via any inverter with a unipolar or bipolar DC input, and leakage currents can be eliminated if the latter type is used without using lossy DC capacitors in the load current loop. The proposed converter uses integrated magnetics cores to couple the input and output inductors, which significantly reduces the input current ripple and hence greatly improves the power extracted from the solar PV system. The design methodology along with simulation, experimental waveforms, and efficiency measurements of a 4-kW DC–DC converter are presented to prove the concept of the proposed converter. Furthermore, a 1-kW inverter is also developed to demonstrate the converter's grid-connection potential. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

In this paper, capacitor current sensorless control by using an observer is applied in a seamless transfer single-phase inverter. The proposed control system is a multiloop control system. The control loop is composed of a capacitor voltage outer control loop and capacitor current inner control loop for stand-alone mode. For on-grid mode, the grid current outer loop controller is combined with the stand-alone control structure to form a simple controller structure for mode switching. The capacitor current feedback signal is calculated using the observer in the discrete-time domain and thus sensors are not required. Use of the proposed observer for the inverter with capacitor current control has many advantages, such as sensorless capacitor current calculation, one-sample-ahead data prediction for sampling delay compensation, and an average capacitor current without ripple components. Verification of the theoretical analysis is presented through simulation and experiment. A 5-kW single-phase inverter prototype combined with a Li-ion battery is set up with a digital controller using a TI TMS320F28377D microcontroller unit to confirm the feasibility of the system. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]