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In this paper, many impedance-source inverters with coupled inductors have been investigated to obtain a high step-up boost ratio. However, the leakage inductors in these topologies induce great voltage spikes at the dc link, which will increase the voltage stress of switches. Thus, the power level of inverters is limited. Furthermore, the efficiency of the inverters can be degraded by the losses associated with leakage inductors. To address abovementioned issues, this paper proposes a family of low-spike high-efficiency Y-source inverters. The proposed inverters have the ability of eliminating voltage spikes at the dc link and recycling the leakage energy via the additional diode and capacitor. In order to show the excellent characteristics of the proposed topologies, this paper compares the performances of the proposed inverters and the improved-Y-source inverter in many aspects. Simulation and experimental results have verified the abilities of the proposed inverters. [ABSTRACT FROM AUTHOR]

This paper proposes a new dc–ac converter with a reduced number of semiconductor switches and gate drive and control circuit components. A salient feature of this inverter is its pure sinusoidal line-to-line voltages with no need for output filter. Also, the proposed inverter improves the voltage utilization factor of the input dc supply compared to the four-switch three-phase inverter (first best topology in the literature from the number of switches point of view) and standard six-switch inverter with sine pulsewidth modulation. The proposed inverter is capable of operating with a wide range of output voltages from zero to the full value of the dc input voltage by appropriately altering the instantaneous duty cycle. A three-phase universal inverter with only three power switch has been proposed in this paper for the first time ever, to our knowledge. For the purpose of providing a good compromise between fast transient response and stability, a model predictive controller is proposed. All the design expressions have been derived. A comparison with other dc–ac converters is given to show the merits of the proposed converter. Finally, satisfactory circuit operation is confirmed by experimental results from a laboratory prototype. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

To support the development of high-frequency ac microgrids in terms of compact design, high-voltage gain and low total harmonic distortion (THD), a buck–boost dual-leg-integrated step-up inverter is proposed in this paper. The inverter is formed by integrating a buck–boost converter into a conventional single-phase full-bridge inverter by sharing the upper switch and the body diode of the lower switch in both bridge-legs. Consequently, the component count is significantly reduced over the step-up inverter counterparts. In addition, to address the drawbacks of hybrid modulation methods adopted by existing dual-leg-integrated inverters, such as double-variable control, and high THD of output voltage/current at high input voltage and heavy load conditions, unipolar frequency doubling sinusoidal pulse width modulation scheme is adopted in this inverter. As a result, the modulation ratio M becomes the only control variable to regulate the output voltage/current and the control is simplified. The THD of the proposed inverter output can remain low throughout the entire input voltage range and load power range. This paper presents the topology derivation procedure, operation principle, and steady-state characteristics of the proposed inverter. To validate the effectiveness of theory, experimental results of a 400 W hardware prototype, where the output voltage frequency is at 500 Hz, are reported. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

In this paper, it is described how the circulating current flows between inverters that have isolated dc link such as cascaded H-bridge (CHB) topology when they are operating in parallel. In this case, zero sequence circulating current, which normally flows through shared dc link, cannot flow between inverters in parallel. However, circulating current is provoked by asynchronous switching instant of devices, difference of dc-link voltages of parallel inverters, and unbalanced impedance. The circulating current should be suppressed by a sharing inductor that is inserted between inverters. Generally, all of the inverters should synthesize the same output voltage reference for load current control to minimize the size of this sharing reactor. However, this conventional method cannot guarantee diminishing circulating current in the transient state and even in the steady state. In this paper, in order to reduce sharing reactance, after deriving circulating current model from general case of n-parallel operation, circulating current control method is devised based on the model. This proposed algorithm is applied to active front end five-level-CHB inverter system for medium voltage drive. Simulation and experimental results are provided to verify the effectiveness of the proposed control scheme. [ABSTRACT FROM AUTHOR]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

Unipolar-pulsewidth modulation (UP-PWM) inverter takes advantages of high power efficiency and small output chokes which is widely used in the industry. However, UP-PWM inverters cannot be used in parallel operation due to a current unbalance problem. This paper studies the current unbalance problem of paralleled UP-PWM inverters with common dc bus and ac bus. First, the problem of unbalanced inductor current is defined and analyzed. Second, a technique to eliminate unbalanced currents is proposed. The proposed current balancing technique only requires one more current sensor in an inverter module rather than changing converter topology or modulation method, which makes it possible to apply UP-PWM inverters in parallel-operation while keeping the advantages of unipolar switching. The proposed current balancing method is verified by both simulation and hardware experiment. Experimental verification is performed on two 1 kW, 400 V input, and 120 V/60 Hz output prototypes, which shows a good agreement to the analytical study. [ABSTRACT FROM AUTHOR]

In order to provide high and extendable power levels for inductive power transfer (IPT) system, a parallel multi-inverter system based on modular inverter is presented. Various power requirements can be implemented by an adjustment of the number of paralleled inverters, which provides a high modularity. A master−slave scheme is employed for the switching-driver signals of parallel inverters, where one acts as a leader while others act as followers. Despite the master−slave scheme, the proposed circuit topology has natural robustness because of the equality in terms of the hardware configuration of each modular inverter. For proper parameters, the output phase (current lagging corresponding voltage) of an inverter is lower than the average of output phase of all inverters, when its output voltage lags behind others, and vice versa. Based on this approach, PI controllers are designed to implement phase synchronization for output voltages of all inverters. An IPT prototype supplied by the proposed parallel multi-inverter with three inverters was designed, built, and tested. Experiments show that the proposed parallel multi-inverter system has not only good circulating current suppression capacity but also excellent performance of phase synchronization. The maximum dc−dc efficiency was 94% at a 35.1 kW receiving power. This paper is accompanied by a Matlab/Simulink file demonstrating phase synchronization control. [ABSTRACT FROM AUTHOR]

In this paper, a new topology for half-bridge Z-source inverter is proposed. The proposed topology has only one impedance network. Unlike to the conventional half-bridge inverter, the proposed topology can provide zero voltage level at the output. It also increases output voltage level and stabilizes it in the desired value. Capacitor voltage stress in the proposed topology is low, and, therefore, nominal voltage of capacitor and cost decreases. In this paper, the steady-state analysis of the proposed inverter in two new operations which are named synchronous operation of diodes and asynchronous operation of diodes is conducted based on mathematics calculations. A method to obtain high-voltage gains by cascading the Z-network and combining middle inductors is presented that leads to cost, size, and weight reduction. Comparison among the proposed converter with conventional ones shows its excellent performance. The experimental results have good agreement with analytical analysis for the proposed topology. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

The development of a photovoltaic ac module composed of a high static gain nonisolated dc–dc converter with current source output characteristic followed by an unfolding low-frequency inverter is presented in this paper. The operation of the dc–dc converter with high static gain and with reduced switch voltage is obtained using the Cuk converter integrated with the switched-inductor technique. The nonisolated structure allows the elimination of the volume and losses of the power transformer and leakage inductance, and an output filter configuration is proposed to reduce the high-frequency ground leakage current. The grid-tied inverter operating in a discontinuous conduction mode (DCM) allows a sinusoidal output current with low harmonic distortion (THD = 3.72%) to be obtained without current control loop and without the use of a current sensor at the output. The maximum power point tracking operation is obtained without the use of the current sensor. The DCM operation increases the current stress, but the proposed converter presents two switches and two input inductors sharing the input current in these components. The theoretical analysis, design procedure, and experimental results are presented for a prototype with a dc input voltage Vi = 30 V, an ac output voltage Vo = 127 V, and output power Po = 180 W. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

Usually, the parallel-compensated inductive power transfer (IPT) topology fed by a current-source inverter is controlled through variable switching frequency and fixed 50% duty cycle method. This enables the system to operate at resonance frequency, which drifts due to load and other parameter variations. Owing to this control constraint, the load requirements are fulfilled by adding extra dc–dc chopper at the output. This paper presents a new control technique for a parallel–series/series IPT network, fed from a full-bridge current-source inverter to meet the load demand directly by an inverter. Therefore, the extra chopper stage at the output side of the converter is eliminated. The control goals are achieved through a two-loop control method, where the inner input current loop controls the source current and the outer output current loop meets the load requirements. The detailed steady-state operation, converter design, small-signal modeling, and control are reported, and experimental results obtained from a 1.6-kW lab prototype are included to verify the mathematical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a new diode-clamped multilevel inverter that can effectively balance the voltages of dc capacitors. For the proposed inverter, the inductors are inserted between the diodes and the main switches. Also, the voltage balance of the dc capacitors can be guaranteed by controlling the opening time of the corresponding main switches in particular modes. Thus, the parallel circuits on the dc side in the conventional inverters are canceled. Consequently, the proposed topology requires fewer switches, diodes, and capacitors, although it adds the compensation currents to the corresponding main switches. Both the simulation and experimental results demonstrate the suitability and applicability of the proposed topology. [ABSTRACT FROM AUTHOR]

The current source converter (CSC) has been popular in high-power medium-voltage applications. To increase the system power capacity and reduce the output harmonics, parallel connection of CSCs with multilevel current output is a practical approach. There are mainly two types of parallel based configurations. The structure with an independent dc link for each paralleled CSC can be regarded as the first configuration, where the dc current flowing into each CSC can be controlled from the rectifier side independently. The second type is constructed with only one current source rectifier (CSR) on the grid side and paralleled current source inverters (CSIs) on the load side, which could potentially reduce the cost and size of the system. However, with a common dc source, the dc current for each CSC should be carefully controlled with proper modulation design. At the same time, the common-mode voltage (CMV), which increases the motor line-to-ground voltage and causes additional stress to the insulation system, should also be suppressed. In this paper, with a focus on the shared dc-link structure, we thoroughly analyze the dc-link current flow and common-mode loop circuit. We propose a multilevel modulation strategy of the parallel CSI system considering the requirement of dc current balancing and CMV reduction to improve the overall system performance. The effectiveness of the proposed method is verified by both simulation and experiment in a transformerless parallel CSC system. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper introduces a high-gain single-stage boosting inverter (SSBI) for alternative energy generation. As compared to the traditional two-stage approach, the SSBI has a simpler topology and a lower component count. One cycle control was employed to generate ac voltage output. This paper presents theoretical analysis, simulation and experimental results obtained from a 200 W prototype. The experimental results reveal that the proposed SSBI can achieve high dc input voltage boosting, good dc–ac power decoupling, good quality of ac output waveform, and good conversion efficiency. [ABSTRACT FROM AUTHOR]

The four-switch three-phase (FSTP) inverter has been proposed as an innovative inverter design to reduce the cost, complexity, size, and switching losses of the dc–ac conversion system. Traditional FSTP inverter usually operates at half the dc input voltage; hence, the output line voltage cannot exceed this value. This paper proposes a novel design for the FSTP inverter based on the topology of the single-ended primary-inductance converter (SEPIC). The proposed topology provides pure sinusoidal output voltages with no need for output filter. Compared to traditional FSTP inverter, the proposed FSTP SEPIC inverter improves the voltage utilization factor of the input dc supply, where the proposed topology provides higher output line voltage which can be extended up to the full value of the dc input voltage. The integral sliding-mode control is used with the proposed topology to optimize its dynamics and to ensure robustness of the system during different operating conditions. Derivation of the equations describing the parameters design, components ratings, and the operation of the proposed SEPIC inverter is presented in this paper. Simulation model and experimental setup are used to validate the proposed concept. Simulations and experimental results show the effectiveness of the proposed inverter. [ABSTRACT FROM AUTHOR]

Leakage current minimization is one of the most important considerations in transformerless photovoltaic (PV) inverters. In the past, various transformerless PV inverter topologies have been introduced, with leakage current minimized by the means of galvanic isolation and common-mode voltage (CMV) clamping. The galvanic isolation can be achieved via dc-decoupling or ac-decoupling, for isolation on the dc- or ac-side of the inverter, respectively. It has been shown that the latter provides lower losses due to the reduced switch count in conduction path. Nevertheless, leakage current cannot be simply eliminated by galvanic isolation and modulation techniques, due to the presence of switches' junction capacitances and resonant circuit effects. Hence, CMV clamping is used in some topologies to completely eliminate the leakage current. In this paper, several recently proposed transformerless PV inverters with different galvanic isolation methods and CMV clamping technique are analyzed and compared. A simple modified H-bridge zero-voltage state rectifier is also proposed, to combine the benefits of the low-loss ac-decoupling method and the complete leakage current elimination of the CMV clamping method. The performances of different topologies, in terms of CMV, leakage current, total harmonic distortion, losses and efficiencies are compared. The analyses are done theoretically and via simulation studies, and further validated with experimental results. This paper is helpful for the researchers to choose the appropriate topology for transformerless PV applications and to provide the design principles in terms of common-mode behavior and efficiency. [ABSTRACT FROM AUTHOR]

This paper reports an elegant approach to address two major challenges of transformerless grid-connected microinverters, common-mode earth leakage current and double-frequency power pulsation across the photovoltaic (PV) terminal. The proposed solution uses an embedded decoupling capacitor in a doubly grounded boost–buck ( $\acute{\mathrm{C}}$ uk) derived topology. An intelligent switching scheme ensures that a large swing of the decoupling capacitor voltage is easily accommodated. Thus, film capacitors can be used instead of electrolytic capacitors, which helps increase equipment lifetime. Details of circuit operation are provided along with dynamic modeling and controller design for close-loop operation. Simulation and experimental results are presented for performance validation of the microinverter. [ABSTRACT FROM AUTHOR]

Generally, single-stage buck–boost inverters consist of distinct circuits operating individually in buck/boost or positive/negative modes, the latter definitely leading to crossover distortion in the output current. This paper proposes a switching strategy that changes the bimodal operation of a single-stage buck–boost topology to a single-mode inverter. This is due to the consequent voltage gain that ensures that the output voltage polarity, apart from its magnitude, is an exclusive function of the duty ratio. Operational principle and salient hardware design are explained with the help of equivalent circuits. Details about the dynamic model are presented, based on which controller design is carried out for both stand-alone and grid-connected operation. Experimental results obtained from a 300-W, 110-V laboratory prototype are presented to validate the performance of the proposed switching strategy. [ABSTRACT FROM PUBLISHER]

This paper proposes the combination of a novel modified quasi-Z-source (MqZS) inverter with a single-phase symmetrical hybrid three-level inverter in order to boost the inverter three-level output voltage. The proposed single-phase MqZS hybrid three-level inverter provides a higher boost ability and reduces the number of inductors in the source impedance, compared with both the single-phase three-level neural-point clamped quasi-Z-source inverter and the single-phase quasi-Z-source cascaded multilevel inverter. Additionally, it can be extended to obtain the nine-level output voltage by cascading two three-level pulse width modulation switching cells with a separate MqZS and a dc source, which herein is called a single-phase MqZS cascaded hybrid five-level inverter (MqZS-CHI). A modified modulation technique based on an alternative phase opposition disposition scheme is suggested to effectively control the shoot-through state for boosting the dc-link voltage and balancing the two series capacitor voltages of the MqZS. The performances of both the proposed MqZS-CHI and the modulation techniques are verified through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, an improved transformerless single-phase single-stage grid-tied flying inductor inverter is presented. The negative terminal of the photovoltaic (PV) array is grounded in the improved topology, which increases reliability and suppresses the leakage current. The proposed topology has buck–boost capability without increasing the number of required components and has a high efficiency. An improved control algorithm for proper operation of the proposed topology which decreases switching losses has been investigated. Moreover, a perturbation and observation maximum power point tracking (MPPT) algorithm has been adapted to the proposed inverter, which does not utilize proportional–integral (PI) controllers, for the purpose of the MPPT. Furthermore, a design procedure of the passive elements of the converter based on the corresponding operating has been demonstrated. Simulation in MATLAB Simulink plus an experimental prototype is developed to reconfirm the designed results. Finally, a comparison study has been investigated for better clarification of the advantages and disadvantages of the proposed inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a dc to ac converter with the ability of voltage increasing is presented. This inverter is designed in a way that just one dc source is used. Also, by using power storage technique and with combining charged capacitors and dc source in series form, output voltage levels can be increased. This inverter is in a modular structure and has the ability of capacitor's voltage self-balancing. H-bridge inverter was not used at the end of the proposed converter and all elements tolerate a voltage stress equal to the amount of input dc source. This leads to remarkable decrease of total standing voltage and peak inverse voltage. Other advantage of the proposed inverter is its potentiality of performance in high-frequency applications. The modular form of the proposed inverter provides the potentiality of extension to higher voltage levels and eases the maintenance. Moreover, considering to the fact that the stress of all components of the suggested inverter is equal to the input source, the performance in high voltage is added to the characteristics of the proposed inverter. The nine-level structure of the proposed inverter is simulated and laboratory test is carried out for the verification of its performance. [ABSTRACT FROM PUBLISHER]

Boost-derived hybrid converter (BDHC) is a single-stage converter that produces both dc and ac output voltages. The operation of BDHC under continuous conduction mode is satisfactory. However, the nonzero discontinuous conduction mode (NZ-DCM) and standalone ac operation restrict the stable operation of the converter. To mitigate these limitations, modified BDHC (MBDHC) is proposed in this paper. The main idea behind these changes is to redeem NZ-DCM by forced continuous conduction mode (FCM). The adverse effect of NZ-DCM in a BDHC is analyzed in terms of ac output voltage total harmonic distortion, and dc output voltage ripple. This analysis is further extended for MBDHC to highlight the benefits of FCM. Moreover, for hybrid loads, the efficiency of MBDHC is compared with its counterpart BDHC and cascaded boost inverter. [ABSTRACT FROM PUBLISHER]

Photovoltaic (PV) microinverters dispense with the line frequency transformer, however at the cost of system grounding and ground leakage current problems. These have been erstwhile resolved by the topologies derived from buck, boost, buck–boost, Zeta, Watkins–Johnson, and Ćuk converters, or combinations of these. The Ćuk derived inverters, employing second-order input and output filters, offer the most efficient, lightweight, and economical solution in the class. This paper presents design and detailed operation of a Ćuk derived, common-ground PV microinverter in continuous conduction mode operation. The inverter is shown to be compatible with both linear and nonlinear loads, in stand-alone and grid-connected modes of operation. Optimal design rules of passive components are rigorously derived to ensure attenuation of input voltage ripples arising from the twin effects of switching and double-frequency output power oscillation. Additionally, the design rules also incorporate considerations of efficiency maximization and some aspects of easing control complexity. Inverter performance is experimentally validated with a 300 VA, 110 V, and 50/60 Hz laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for Z-source inverter based on switched Z-source network is proposed. The proposed switched Z-source inverter can provide high voltage gain in low duty cycles. The continuous input current is one of the other advantages of the proposed inverter. The performance of the proposed inverter is investigated in different operating modes and the voltage and current equations of all elements and equations of critical inductance are calculated. Furthermore, the power losses and efficiency analyses are presented. The comprehensive comparison between the proposed inverter and the other conventional Z-source inverters shows its excellent performance. Finally, to prove the correct operation of the proposed topology, the experimental and simulation results using PSCAD/EMTDC software are presented. [ABSTRACT FROM PUBLISHER]

This paper presents a new single-phase switched-coupled-inductor dc–ac inverter featuring higher voltage gain than the existing single-phase qZ-source and semi-Z-source inverters. Similar to the single-phase qZ-source and semi-Z-source inverters, the proposed inverter also has common grounds between the dc input and ac output voltages, which is beneficial especially for photovoltaic inverter systems. The inverter volume and maximum current flowing can be reduced significantly through the coupling of all inductors. A theoretical analysis of the proposed inverter is described and a 280-W experimental prototype is built to verify the performance of the inverter. [ABSTRACT FROM AUTHOR]

This paper proposes a single-phase, single-stage buck–boost inverter for photovoltaic (PV) systems. The presented topology has one common terminal in input and output ports which eliminates common mode leakage current problem in the grid-connected PV applications. Although it uses four switches, its operation is bimodal and only two switches receive high-frequency pulse width modulation signals in each mode. Its principle of operation is described in detail with the help of equivalent circuits. Its dynamic model is presented, based on which a bimodal controller is designed. Experimental results, in stand-alone and grid-connected mode, obtained with a 300-W laboratory prototype are presented to validate its performance. [ABSTRACT FROM AUTHOR]

The five-phase coupled-inductor inverter is a newly proposed option for three-level five-phase inverter drives. This paper comprehensively analyzes the inverter including the coupled-inductor current, current stress on the dc-link capacitors, and a comparison of these performance aspects using three pulse width modulation (PWM) strategies. Mathematical derivations of the inverter currents and the associated current stress reveal that the current stress is not only influenced by the choice of modulation strategy, as in the neutral-point-clamped topology, but also by the value of coupled inductance; furthermore, the choice of the modulation strategy impacts the core loss of the coupled inductors. Three carrier-based PWM methods are considered: sinusoidal PWM (SPWM), and two methods with the common-mode voltage reduction (referred to as CMVR1 and CMVR2) for the five-phase coupled-inductor inverter. CMVR2 is shown to be the best solution if common-mode voltage reduction is required. The analysis demonstrates that SPWM performs better with respect to current stress and inverter losses, therefore is the preferable modulating strategy for the five-phase coupled-inductor inverter if common-mode voltage reduction is not required. The analysis is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Multiterminal converters eliminate using several single-input-single-output converters and simplify their topologies and reduce their cost. In this paper, a new family of multi-input converters based on three switches leg is introduced. Inputs of the proposed converters are similar and they are topologically interchangeable and have boost or buck operation modes. The proposed converter has one output that operates as an inverter. Here, all operating modes of the proposed converters and their effects on each other are investigated, in details. Also, an appropriate switching technique for the converters is given. A detailed comparison between conventional and proposed two-input converters is also presented. A two-input, one-output prototype converter has been implemented to validate the given analyses and to verify the proposed converter's performance. The experimental results are in good agreement with the theoretical and simulated analyses. [ABSTRACT FROM AUTHOR]

A new single-phase \uppi-\texttype 5-level inverter using 3-terminal switch-network (3TSN) is proposed in this paper. The topology is considered as a variant of T-type 3-level structure or dual-buck inverter with coupled inductors. This new inverter is suitable for multilevel power inversion with low dc-bus voltage. The merit of the proposed topology is to apply only four active power switches to achieve 5-level operation. Other benefits include double frequency operation of output inductor and equal division of the current that flows through power switches and filter inductor. Hence, it leads to high efficiency and low harmonics. These characteristics allow improvement of losses distribution and volume reduction of output filter inductor. The operation scenario with sinusoidal pulsewidth modulation (SPWM) is described in details. Meanwhile, the magnetic analysis and design are studied and discussed. Finally, a prototype is built to verify the theoretical analysis and demonstrate the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

Electronic ballasts are implemented for obtaining a high power factor and a good operation of the lamp; these goals are reached traditionally by implementing multiple stages. On the first stage, a unity power factor is obtained and the second stage is designed in order to feed properly the lamp. Different topologies have been studied not only for decreasing the number of employed controllers and stages, but also reducing the number of components and active switches. Electronic ballasts, which are based on the “Z” and “qZ” source inverters, are considered in this paper, where the proposed systems have a single stage. Two topologies are illustrated: the first one for the fluorescent lamps and the second one for the high intensity discharge lamps, where electronic ballasts with a high power factor are obtained. The operation, analysis, and experimental results are shown. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology for half-bridge switched boost inverter (HB-SBI) is proposed. The proposed half-bridge inverter uses more active elements rather than capacitors and inductors in comparison with the conventional half-bridge Z-source inverter with two Z-networks, which results in reduction of weight, size, and cost. Moreover, the proposed inverter has the capability of eliminating inverter leg short-circuit issues and is able to further increase the output voltage level in comparison with its conventional types. Generating zero-level output voltage is also another advantage of this topology. Based on theoretical calculations, the steady-state and small-signal analysis of the proposed topology in different operating modes are performed and the ripple of inductors’ current and capacitors’ voltage are also calculated. A comprehensive comparison is also made between the proposed inverter and the conventional types. Finally, the experimental results are provided to reconfirm the performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a novel grid-connected high step-up inverter is proposed. The topology is composed of two stages. The first stage is a single-switch high step-up dc–dc converter with bipolar outputs, and the second stage is a conventional half-bridge dc–ac grid-connected inverter. Negative grounding of the photovoltaic (PV) module has resulted in elimination of unwanted ground leakage currents in the PV system. Simple structure, employing few semiconductor switches, simple control, and high efficiency are the features of the proposed topology. Theoretical analysis and principal operation of the circuit are discussed. An experimental prototype is implemented to verify the performance of the proposed inverter. The experimental results confirm the aforementioned features and the theoretical analysis of the converter operation. [ABSTRACT FROM PUBLISHER]

This paper proposes a new topology for an enhanced-boost Z-source inverter (ZSI) with combined two Z-impedance networks. By two Z-impedance networks and low shoot-through duty cycle, the proposed inverter produces high output voltage gain. In traditional ZSIs for high boosting voltage, a low modulation index is required; hence, under these conditions, the output voltage will have low quality with high total harmonic distortion. Compared with the conventional high-boost ZSI topologies, the proposed inverter uses shorter shoot-through duration and a larger modulation index to improve the output waveform quality. Comparison between the proposed topology and previously proposed schemes, in terms of inductor numbers, voltage and current stresses on elements, sizes of inductors and capacitors, efficiency, and switching device product (SDP) factors of diodes, is made, and the results verify the priority of the proposed topology. The operating principle of the proposed topology is analyzed in detail. Both simulation and experimental results verify the high performance of the proposed inverter. [ABSTRACT FROM PUBLISHER]

A novel interleaved dual buck full-bridge three-level inverter (IDBFTI) is proposed for the grid-connected system in this paper. It retains the advantages of interleaved parallel technology for inverter as follows: reducing the output ripple current and the total harmonic distortion of the output current, increasing the power density of system, and reducing the current stress and thermal stress of power devices. Besides, it can solve the problem of zero sequence circulation current (ZSCC) in interleaved inverter system by the circuit structure, and it also has the advantages of no shoot-through problem, no reverse recovery of the body diode, and three-level output. The interleaved inverter circuits share two power-frequency switches, which are resized for each specific application, and it is easier to extend the system by improving current capability of the two switches. The working principle of this system is introduced in detail, and a 2-kW experimental prototype has been established and tested. Test results verify the principle and the excellent performance of IDBFTI. [ABSTRACT FROM PUBLISHER]

A non-isolated impulse commutated current-fed voltage doubler based non-isolated inverter for a solar photovoltaic, battery or fuel cell application is proposed in this paper. Impulse commutation enables device voltage clamping with zero current commutation of the semiconductor devices. It eliminates the traditional problem of turn-off voltage spike across the devices in current-fed converters. Unlike resonant converters, resonance pulse appears for a very short interval leading to zero current turn-off of devices. It therefore, limits peak and circulating currents through the components. Voltage doubler is selected to achieve 2 $\times$ gain. Variable frequency modulation ensures output voltage regulation with input and load variations. Steady-state operation and analysis of front-end converter is explained. A 500 W prototype has been designed and developed to demonstrate the performance and verify the proposed operation, analysis, and claims. [ABSTRACT FROM AUTHOR]

Carrier-based pulsewidth-modulation (CBPWM) techniques are popular due to their simplicity, and have been widely researched for various three-phase inverter configurations. In this paper, two CBPWM techniques are proposed to reduce the common-mode (CM) voltage generated by the five-phase inverter. The five-phase inverters have more flexibility in reducing the CM voltage than their three-phase counterparts because they have more phase legs, hence finer control over the star-point voltage of the load. Two methods are proposed for the conventional two-level five-phase inverter to reduce the CM voltage; one utilizing adjacent modulating waveforms and the other utilizing nonadjacent modulating waveforms. The coupled inductor inverter (CII) uses coupled inductors to generate multilevel outputs. As the volt-second balance must be maintained across each coupled inductor, direct application of the proposed methods on the CII inverter will result in overcurrents in the coupled inductors. Hence, the proposed methods are further improved to ensure the volt-second integral over each switching period is zero. Moreover, the two proposed methods are designed to reduce switching events and prevent unexpected states occurring during the switching transitions. The performance and the switching strategy of both methods are verified by both simulations and experiments on a prototype of five-phase CII. [ABSTRACT FROM AUTHOR]

This paper proposes a new topology named the active-switched-capacitor/switched-inductor quasi-Z -source inverter (ASC/SL-qZSI), which is based on a traditional qZSI topology. Compared to other qZSI-based topologies under the same operating conditions, the proposed ASC/SL-qZSI provides higher boost ability, requires fewer passive components such as inductors and capacitors, and achieves lower voltage stress across the switching devices of the main inverter. Another advantage of the topology is its expandability. If a higher boosting rate is required, additional cells can easily be cascaded at the impedance network by adding one inductor and three diodes. Both the simulation studies and the experimental results obtained from a prototype built in the laboratory validate proper operation and performance of the proposed ASC/SL-qZSI. [ABSTRACT FROM AUTHOR]

According to the requirement of fuel cell generation system, this paper presents a new single-stage and boost-voltage grid-connected inverter, as well as the signal modulation diagram in a line cycle. In the proposed inverter, one of the bridge legs is shared with a boost converter. The boost inductor current is designed in discontinuous conduction mode, which can effectively decrease low-frequency current ripple (LFCR) in the output current of the fuel cell. The switching modes of the proposed inverter are analyzed in positive and negative half line cycles, respectively. The LFCR in the output current of the fuel cell is analyzed, from which the design principle of the boost voltage inductor is obtained. The per-unit current values of the shared switches and the loss of the whole system are derived and compared with those of the conventional inverter. Experimental verifications are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

The harmonic filter for a three-level neutral-point-clamped (NPC) grid interface converter is designed in this paper with good filtering performance and small component size. LCL topology is selected because of the attenuation and size tradeoff. The design of the inverter-side inductor L1 is emphasized due to its cost. A detailed inductor current ripple analysis is given based on the space vector modulation. The analysis derives the inductor volt-second and the maximum current ripple equation in line cycle. It also reveals the switching cycle current ripple distribution over a line cycle, with the consideration of power factor. The total system loss is calculated with different ripple current. Inductor L1 is determined by the loss and size tradeoff. Also the capacitor- and grid-side inductor L2 is designed based on attenuation requirement. Different damping circuits for LCL filter are compared and investigated in detail. The filter design is verified by both simulation and 200-kVA three-level NPC converter hardware. [ABSTRACT FROM AUTHOR]

In photovoltaic (PV) grid-connected generation system, the key focus is how to expand the generation range of the PV array and enhance the total efficiency of the system. This paper originally derived expressions of the total loss and grid current total harmonics distortions of cascaded inverter and H-bridge inverter under the conditions of variable output voltage and power of the PV array. It is proved that, compared with the H-bridge inverter, the operation range of the cascaded inverter is wider, whereas the total loss is larger. Furthermore, a novel online variable topology-type grid-connected inverter is proposed. A bidirectional power switch is introduced into the conventional cascaded inverter to connect the negative terminals of the PV arrays. When the output voltages of the PV arrays are lower, the proposed inverter works under cascaded inverter mode to obtain wider generation range. When the output voltages of the PV arrays are higher, the proposed inverter is transformed into equivalent H-bridge inverter mode to reduce the total loss. Thus, wider generation range and higher efficiency are both implemented. Specific demonstration of the proposed inverter based on five-level cascaded inverter is presented. The detailed experimental results verify the accuracy and feasibility of the theoretical analysis and the proposed inverter topology. [ABSTRACT FROM PUBLISHER]

Single-phase voltage source transformerless inverters have been developed for many years and have been successful commercial applications in the distributed photovoltaic (PV) grid-connected systems. Moreover, many advanced industrial topologies and recent innovations have been published in the last few years. The objective of this paper is to classify and review these recent contributions to establish the present state of the art and trends of the transformerless inverters. This can provide a comprehensive and insightful overview of this technology. First, the generation mechanism of leakage current is investigated to divide the transformerless inverters into asymmetrical inductor-based and symmetrical inductor-based groups. Then, the concepts of dc-based and ac-based decoupling networks are proposed to not only cover the published symmetrical inductor-based topologies but also offer an innovative strategy to derive advanced inverters. Furthermore, the transformation principle between the dc-based and ac-based topologies is explored to make a clear picture on the general law and framework for the recent advances and future trend in this area. Finally, a family of clamped highly efficient and reliable inverter concept transformerless inverters is derived and tested to offer some excellent candidates for next-generation high-efficiency and cost-effective PV grid-tie inverters. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel multiple-input bidirectional dc–dc power converter to interface more than two dc sources of different voltage levels. This finds applications in hybrid electric/fuel cell vehicles (FCVs), where different dc sources of unequal voltage levels need to be connected with bidirectional power flow capability. The converter can be used to operate in both the buck and boost modes with bidirectional power control. It is also possible to independently control power flow between any two sources when more than two sources are actively transferring power in either directions. The operation, analysis, and design of the converter are presented with different modes of power transfer. The proposed converter is demonstrated for FCV application using real-time hardware-in-the-loop system. Experimental results for a 5-kW system are presented, validating the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper presents a circuit structure with a novel inverter that is applicable to arc welding machines. The output rectifier configuration adopts the current doubler rectifier with two coupled inductors. The proposed inverter topology can keep the energy stored in the coupled inductor until the next commutation interval. Moreover, the conduction loss will be lower, which improve the conversion efficiency of the arc welding machine. The operation principle, control circuit, and inverter design example are also described in detail. Experimental results demonstrate the feasibility and efficiency of the proposed inverter topology. [ABSTRACT FROM PUBLISHER]

A switched boost inverter (SBI) can replace a $Z$-source inverter (ZSI) in low-power applications because it has one less $LC$ pair than the ZSI. This paper presents a class of quasi-SBIs (qSBIs) that offers several advantages when compared with a conventional SBI, including reducing the voltage stress on the capacitor, increasing the boost voltage factor, and improving input current profiles. Operating principles, steady-state analysis, and comparisons with conventional inverters are presented. A prototype based on a TMS320F28335 digital signal processor is built to verify the operating principle of the proposed qSBIs. [ABSTRACT FROM PUBLISHER]