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This paper presents a model predictive control technique applied to a dual-active bridge inverter where one of the bridges is floating. The proposed floating bridge topology eliminates the need for isolation transformer in a dual inverter system and therefore reduces the size, weight, and losses in the system. To achieve multilevel output voltage waveforms, the floating inverter dc-link capacitor is charged to the half of the main dc-link voltage. A finite-set model predictive control technique is used to control the load current of the converter as well as the floating capacitor voltage. Model predictive control does not require any switching sequence design or complex switching time calculations as used for space vector modulation; thus, the technique has some advantages in this application. A detailed analysis of the converter as well as the predictive control strategy is given in this paper. Simulation and experimental results to validate the approach are also presented. [ABSTRACT FROM PUBLISHER]

The carrier-based pulsewidth modulation (CBPWM) and virtual space vector pulsewidth modulation (VSVPWM) for neutral point clamped three-level converter are reviewed briefly in this paper. A novel modulation strategy is proposed to maintain unconditional neutral point voltage balance under the full range of power factor and modulation index. The proposed PWM strategy is featured with three switching actions in one switching cycle, which is named 3SNPBPWM hereafter. In 3SNPBPWM, one phase is clamped to a certain level without switching action, and the other two phases have one and two switching actions in one switching cycle (SC), respectively. Moreover, a neutral point voltage recovery algorithm for 3SNPBPWM is also proposed. The performance of 3SNPBPWM is analyzed and compared with CBPWM and VSVPWM in terms of switching loss, waveform quality, and ability of neutral point voltage recovery. Finally, the feasibility and superiority of 3SNPBPWM are verified by experiment. [ABSTRACT FROM AUTHOR]

When fast voltage control is used in a power factor control, the ripple of the dc link causes current harmonics. This paper proposes a method to reduce the harmonic content of a fast voltage loop in a power factor correction, which can both produce low distortion during steady-state operation and fast recovery from a load transient. The performance is achieved by using a Takagi–Sugeno-type nonlinear controller for dc-link voltage control. The proposed nonlinear control is compared with linear proportional–integral (PI) control, which is tuned to meet the standardized regulations for the harmonic content in a 3-kW single phase power supply. The results show that the presented nonlinear voltage controller can maintain the dynamic performance of the linear control with reduced current harmonics. It is also shown that the used nonlinear control method requires only marginally more complex control algorithm compared to commonly used linear PI control. [ABSTRACT FROM AUTHOR]

The strive to increase the energy yield of photovoltaic (PV) power systems has made PV module integrated dc–dc converters (dc-MICs) a reality of modern PV plants. These converters regulate their input voltage, and their dynamic behavior is heavily influenced by the non-linear characteristic of the PV module. The regulation of the PV module voltage and average inductor current by means of a linear cascaded controller is a popular control technique, simplifying the converter dynamics, and providing inherent current limiting; however, it is prone to instability depending on the interaction between the PV source and the interfacing converter, as well as the value of the controller parameters. These factors present a clear challenge for control design; moreover, the converter transient response undesirably depends on the PV module operating point. In order to solve these issues, while maintaining regulation of PV module voltage and average inductor current, this paper proposes to adopt a non-linear controller designed with the feedback linearization control (FLC) technique. The control laws are derived and implemented in a non-inverting buck–boost dc module integrated converter, as this is a favorite topology for the PV interfacing application. A digitally controlled converter prototype is built and used to obtain experimental results, where the FLC technique is compared with a linear cascaded control technique. The results confirm the superior performance of the presented FLC technique, which is robust and able to regulate the converter input voltage with fast and consistent dynamics, regardless of the PV module or load operating conditions. [ABSTRACT FROM AUTHOR]

In this paper, an input-series flyback converter with the coupled-inductor-based passive snubber is proposed, where the input-series converter is based on transformer integration, and the passive snubber is composed of inductors, capacitors, and diodes. The inductors of the snubber in various series modules are made on a common magnetic core, and the coupled-inductor scheme is adopted. With the help of the coupled inductor, active input voltage sharing of the input-series converter can also be achieved after the switches are turned off, and voltage sharing of the switch in each series module can be ensured, which overcome the shortcomings of the existing input-series flyback converter. Active voltage sharing processes caused by the coupled inductor are analyzed in detail. Furthermore, the design guideline of the passive snubber is discussed. Finally, the experimental study has been done on a 1500 Vdc/60 W laboratory-made prototype composed of three flyback series modules, and the feasibility of the proposed method and the theoretical analysis is verified by the experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a sinusoidal pulsewidth modulation (SPWM) based direct digital control with average-voltage model (AVM) and division–summation process for paralleled three-phase three-wire (3φ3W) grid-connected converters to reduce circulating currents. With the direct digital control, plant of each single-phase converter can be derived directly, and a controller is then designed to cover the variation effects of filter inductance and grid voltage. Based on SPWM and AVM over a switching cycle, each 3φ3W converter can be decomposed into three single-phase converters and each converter is controlled individually to track its sinusoidal reference current tightly, reducing circulating currents significantly. Equal current sharing is therefore also achieved. The control laws for achieving grid connection are derived in detail. In the design and implementation, the inductances corresponding to various inductor currents are measured offline and stored in the controller for scheduling loop gain cycle by cycle. Experimental and simulated results from a three-converter system confirm the analysis and discussion of the proposed control approaches. [ABSTRACT FROM AUTHOR]

A decentralized control method for power module (PM) capacitor voltage and switching frequency balancing in modular multilevel converter is presented in this paper. The proposed method is composed of a central controller, six arm controllers, and several group controllers. The group controller is only in charge of the PM capacitor voltage balancing within a corresponding group, and the arm controller is in charge of the PM capacitor voltage balancing and PM switching frequency balancing among groups within an arm. A control method based on a PI controller using the average PM capacitor voltage of each group to keep voltage balancing among groups is proposed. A dynamically adjusted extra exchange number strategy based on the voltage difference of each group is also developed to balance the PM switching frequency among groups. The key advantages of the proposed method are the reduction in the number of the PM capacitor voltages that need to be transmitted and sorted in each group controller as well as the reduction of the communication burden between the group and arm controllers. The proposed method is also highly effective under PM faults. The voltage ripple factor and the PM switching frequency of the proposed method are almost identical to the conventional centralized methods. The RT-LAB-based real-time control hardware in the loop test results of a ±350 kV/1000 MW MMC system verify the correctness and effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

The ever-increasing utilization of sensitive loads in the industrial, commercial, and residential areas in distribution networks requires enhanced reliability and quality of supply. This can be achieved, thanks to self-healing features of smart grids that already include the control technologies necessary for the restoration strategy in case of a fault. In this paper, an analytical and global optimization model is proposed for the restoration problem. A novel mathematical formulation is presented for the reconfiguration problem reducing the number of required binary variables while covering more practical scenarios compared to the existing models. The considered self-healing actions besides the network reconfiguration are the nodal load-rejection, the tap setting modification of voltage regulation devices (incl. OLTCs, SVR, and CBs), and the active/reactive power dispatch of DGs. The voltage dependency of loads is also considered. Thus, the proposed optimization problem determines the most efficient restoration plan minimizing the number of de-energized nodes with the minimum number of self-healing actions. The problem is formulated as a Mixed-Integer Second Order Cone Programming (MISOCP) and solved using the Gurobi solver via the MATLAB interface YALMIP. A real 83–node distribution network is used to test and verify the presented methodology. [ABSTRACT FROM AUTHOR]

Three-phase voltage source pulsewidth modulation (PWM) rectifiers can achieve constant dc voltage and sinusoidal grid currents under ideal grid voltages. However, under unbalanced grid voltage conditions, there are ripples at twice the grid frequency in the dc voltage, and the grid currents become highly distorted. To address the aforementioned problems, control methods developed under ideal grid voltage conditions should be modified. Various techniques have been proposed in the literature to calculate the new current reference or power reference. However, most methods use conventional pq theory and only consider the grid-side power control. Hence, the dc voltage ripples are not completely eliminated. Furthermore, the derived mathematical expressions for reference calculations are usually very complicated. In contrast to current methods, this paper proposes a very simple yet effective direct power control (DPC) method based on extended pq theory. By analyzing the instantaneous extended power of the line inductance, a simple and concise power compensation is analytically derived and added to the original power references. As a result, the dc voltage ripples are significantly reduced, and the grid currents remain sinusoidal even under unbalanced grid voltage conditions. The proposed method is compared to conventional DPC methods, and its effectiveness is confirmed by the presented experimental results. [ABSTRACT FROM AUTHOR]

Low-voltage dc distribution systems have gained significant attention over the last years, since they provide simpler and more efficient integration of distributed generators and storage devices, establishing a pathway to net zero energy buildings. In low-power units, transformerless utility interface is preferred to reduce footprint and losses. However, the lack of galvanic isolation introduces a common-mode (CM) path between the dc distribution bus and the utility service grounding, leading to the presence of high CM voltages at the dc bus feeders. The attenuation of the CM voltage reduces the touch voltage amplitude and leakage current, contributing to a safer environment. In this paper, a feed-forward active compensation of the CM voltage is proposed. It relies on utility voltage parameters, estimated by a phase locked loop, to generate a counter CM voltage; hence, it does not require previous knowledge of the system CM path model or the addition of voltage sensors. Experimental results show that this technique can attenuate the CM voltage to non-dangerous magnitudes without interfering with the microgrid differential mode behavior. [ABSTRACT FROM AUTHOR]

This paper extends the application of a frame-angle-based (FAB) direct torque controller (DTC) for permanent magnet synchronous motor (PMSM) drives to low and very low speeds. The FAB-DTC is intended for PMSM drives that are fed by $3\phi$ six-pulse wavelet-modulated dc–ac converters. The foundations of the FAB-DTC are based on regulating the $d\text{--}q$ -axis stator voltages, in response to variations in the load torque and/or drive speed. The adjustments in $d\text{--}q$ -axis stator voltages are created by changing the angle $\vartheta$ of the frame spanned by the $d\text{--}q$ -axis stator voltages. In order to extend the FAB-DTC to low and very low speeds, the changes in $\vartheta$ are accompanied by changes in the maximum scale. The values of maximum scale and $d\text{--}q$ -axis stator voltages are used to update or change the reference signals employed by the wavelet modulation to generate switching pulses to operate a $3\phi$ dc–ac converter. The complete PMSM drive system incorporating the modified FAB-DTC is implemented for a 10-hp PMSM drive system. The performance of the FAB-DTC is investigated for different changes in the command torque for various low and very low speeds. Performance results demonstrate stable, fast, dynamic, and accurate responses, which have minor sensitivity to variations in load torque and/or drive speed. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

This paper presents an accurate steady-state initialization method for electromagnetic transient (EMT) models of modular multilevel converters (MMCs). The proposed method uses steady-state arm voltages and currents to initialize internal electrical variables and control systems of the converter, including capacitor voltage and gating signals of each sub-module. In addition to typical voltage source converter upper level control, MMC specific controls are also considered, including circulating current control, dc ripple control, and capacitor voltage balancing algorithm. EMT simulations on 101-level and 401-level MMC-HVDC systems confirm the accuracy of the proposed method. [ABSTRACT FROM AUTHOR]

The switched shunting resistor circuit is a classical and practical passive equalization scheme that nevertheless suffers from the voltage imbalance after the charging process. It results from the discrepancy of the shunting resistor and the physical characteristics of supercapacitor (SC) cells. In this paper, the distributed voltage equalization control strategies with the proportional-integral (PI) observer for the switched shunting resistor circuit are analyzed and compared. First, the charging and equalizing system is modeled as the switched system and the system observability is proved. The decentralized control and consensus control are analyzed and their shortages are presented. Then, the leader–follower cooperative control is proposed to improve the charging time while keeping the equalization performance. Meanwhile, the PI observer is designed to estimate the internal capacitance voltage of an SC precisely to avoid the effect of equal series resistance. The control convergence is proved by using the Lyapunov stability and switched system theory. The experimental results show that the proposed method has much superiority and wide applicability than the existing methods for equalizing voltages of SCs. [ABSTRACT FROM AUTHOR]

This paper presents a new islanding detection method for synchronous distributed generation (DG). The proposed method is developed based on the combination of rate of change of exciter voltage (RCEV) and open–close circuit breaker (OCCB) at a DG connection point. Whenever the RCEV parameter is not sufficient enough to detect an islanding condition efficiently and correctly, the OCCB strategy will be triggered. The proposed OCCB strategy sends a switching command to one phase of the three-phase circuit breaker (CB), which connects the DG to the grid. In this way, the CB will be immediately opened and then closed. This switching condition will cause a variation in the value of RCEV. This variation is small for the conditions when DG operates in parallel with the main grid, whereas it will be large during the occurrence of islanding. The implementation of the proposed strategy is cost-effective because it only uses the CB at the DG output and does not require any extra equipment. The proposed approach is tested on two different systems including a hypothetical power system and the IEEE 33-bus test system in MATLAB/Simulink environment. The simulation results show that the proposed method eliminates the nondetection zone and also reveals high accuracy compared with previously introduced methods. Moreover, it has been proved that the performance of the proposed approach is not affected by DG capacity, DG location, the number of DG units, as well as network configuration. [ABSTRACT FROM AUTHOR]

In this paper, performances on two kinds of aggregated flyback microinverters are compared in aspect of harmonic resonances, which are controlled by current feedback control and peak current control. Based on the Norton models of flyback microinverters obtained by a small-signal modeling approach, potential harmonic resonances with the grid are analyzed. Following that, an impedance-based stability criterion is proposed, where the resonance frequency can be calculated and predicted based on the derived Norton models and the system admittance matrix of aggregated microinverters. After comprehensive analysis and comparisons, it is found that the peak-current-control-based flyback microinverters has better performance on damping the harmonic resonances than the current feedback controlled one. Simulations and experiments are carried out for verifying the effectiveness of the presented models and the correctness of the analysis results. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid supply modulator (SM) including a buck-boost (BB) converter, which has wide battery operating range for cellular envelope tracking (ET) applications. The proposed SM supports both ET and average power tracking (APT) mode depending on the power amplifier (PA) output power level. The output voltage swing of SM is boosted up to 4.5 V by the integrated BB converter as a supply of a linear amplifier. The dynamic-controlled BB output increases ET operating range, whose efficiency is higher than that of APT, by scaling down the supply voltage of the linear amplifier according to the PA output power level. A selective supply voltage of a switching amplifier and a reverse current sensing circuit are employed to prevent the reverse current through the power inductor of the switching amplifier. The proposed automatic current ratio controller between the linear amplifier and the switching amplifier provides the robust performance against the battery voltage variation of 3.2–4.6 V. A programmable bias current of the class-AB output buffer and a programmable hysteretic comparator are employed to achieve the optimum efficiency and bandwidth depending on the operating signal bandwidth. Optimal control for low signal bandwidth applications such as voice over Long-Term Evolution (LTE) with the selective notch filter provides the maximum efficiency of 88.2% with −135 dBm/Hz output noise. The proposed SM supports the LTE 20-MHz envelope signal with 78% efficiency at 800-mW output. Adapting the designed SM to frequency-division duplex Band3 radio frequency PA, the implemented ET-PA achieves the power added efficiency of 41.6% at 27-dBm PA output power while achieving −40 dBc of E-UTRA ACLR and −137 dBm/Hz of receiver band noise. The chip is implemented in the 0.13- $\mu \text{m}$ CMOS process, and the die size is 5 mm2. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

High step-down voltage conversion is necessary to bridge the voltage gap between main power converters and low-voltage auxiliary electronics in power conversion systems. Switched capacitor converters (SCCs) are an attractive candidate as a high step-down converter, but their poor voltage regulation capability may limit their applications. Pulsewidth modulation (PWM) SCCs with adjustable high step-down voltage conversion are proposed in this paper. The proposed PWM SCCs can be derived from traditional SCCs by replacing an energy transfer capacitor with a switched-capacitor-inductor (SCL) cell that comprises inductors, capacitors, and diodes to realize PWM-controllable voltage conversion. The voltage step-down ratio of the proposed PWM SCCs is not only PWM controllable but also adjustable with structures of SCCs and SCL cells. Two representative PWM SCCs were taken as examples to perform the operational analysis. The prototypes of both representative PWM SCCs were built and tested to demonstrate the proposed concept. [ABSTRACT FROM AUTHOR]

Owing to the operational characteristic of a Vienna rectifier, it is found that the traditional modulation method would result in the current distortion. This paper, therefore, proposes a novel zero-sequence component injection modulation method for improving the input quality of the Vienna rectifier with balanced or unbalanced dc-link voltages. In specific, the degree of unbalanced dc-link voltages increases the size of abnormal regions in a slant and asymmetrical space vector diagram, which leads to more serious current distortion. The proposed method identifies the abnormal intervals by average duties accurately without detecting the position of the reference vector. Considering the operational characteristics, three-phase compensation components are calculated respectively depending on an unbalanced factor and added to three-phase average duties in abnormal intervals. As a result, the current harmonics of the Vienna rectifier are mitigated significantly with balanced or unbalanced dc-link voltages. The effectiveness and the performance of the proposed zero-sequence component injection method for the Vienna rectifier are verified by simulation and experiments. [ABSTRACT FROM AUTHOR]

In this paper, a family of step-up resonant switched-capacitor converters (RSCs) with a continuously adjustable conversion ratio is proposed based on the Cuk dual-resonance core (DRC) featuring two resonant paths. By adopting the on-time fixed frequency modulation, the two resonant paths can conduct simultaneously and satisfy the charge balance of the flying capacitor during the overlapping period. As a result, the conversion ratio—upper bounded by two determined by the circuit configuration—can vary continuously and efficiently even at the light load condition (1/10 of the rated power). A comprehensive analysis—the operation principle, voltage-gain curve, and voltage/current stresses—about the DRC is given. In addition, the Cuk DRC was extended to the series–parallel switched-capacitor converter (SCC), Fibonacci SCC, and voltage doubler to form a family of step-up RSCs, whose voltage-gain curves of different topologies are derived. Moreover, a characteristic comparison between the Cuk DRC and the traditional “direct” and “indirect” resonant core is given. Then, a 48 to 62–94.6 V resonant core with peak efficiency 97.8% and maximum power 120 W under the open loop condition was built. The analyses were verified by both experimental and simulation results. [ABSTRACT FROM AUTHOR]

Three-phase bridge converter is popular in ac–dc power conversion. The conventional sensor control with inner current loop and outer voltage loop is often used to control the three-phase bridge converter. Many three-phase sensorless control methods had been proposed to control the bridge converter with considering the inductance and inductor resistance. In this paper, the voltage drop of the power semiconductor is first considered in the proposed three-phase current sensorless control method. At first, the dynamic behaviors of three-phase bridge converter for power factor correction (PFC) applications are studied, and its equivalent three-switch model is developed. Based on this developed model, three-phase current sensorless control with only voltage controller is proposed. Additionally, the voltage-loop transfer function of PFC bridge converter controlled by the proposed method is modeled, and the result is helpful to obtain the controller parameter. The proposed control method is implemented on the DSP-based platform for evaluation. Finally, the provided simulation and experimental results demonstrate the performance of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a passivity-based control (PBC) scheme for the switched reluctance generator (SRG) in small-scale wind energy conversion systems for dc microgrid applications. The main objective is to stabilize the output voltage in case the system supplies constant power loads (CPLs) and operates with maximum power point tracking (MPPT). Stability improvement and dc-link ripple reduction in the presence of CPLs is achieved using system-level modeling of SRG-based dc microgrid through the Euler-Lagrange system (ELS) from the viewpoint of the machine physical structure. Compared with other control methods, the proposed MPPT method based on passivity-based speed controller employs the back electromotive force (EMF) in the generation process as a position-dependent voltage source to overcome the major challenge of SRG complicated uncertain dynamic model. To deal with the time-varying inductance and back EMF of SRG, an adaptation mechanism is incorporated in the proposed adaptive PBC and the control design is constructed by using the Lyapunov theorem where the closed-loop stability is ensured. The effectiveness of the proposed method in avoiding instability effects of SRG and CPL with voltage ripple reduction and precise wind turbine speed tracking is investigated with simulation results and validated with experimental by using a four-phase, 8/6 SRG drive system. [ABSTRACT FROM AUTHOR]

The five-level nested neutral-point-clamped (5L-NNPC) converter is one of the most promising topologies for medium-voltage (2.3–7.2 kV) high-power applications such as medium-voltage drives, wind energy conversion systems, and grid-connected systems. The 5L-NNPC requires a fewer number of switching devices, freewheeling and clamping diodes, and flying capacitors compared to the existing five-level multilevel converters. In the 5L-NNPC topology, each flying capacitor voltage is regulated at one-fourth of the dc-bus voltage to obtain the five-level operation. Due to the lack of redundant switching states, it is difficult to control the flying capacitor voltages by using the pulse-width-modulation-based classical control methods. This paper proposes a model-predictive current control (MPCC) approach to control the flying capacitor voltages along with the output currents of the 5L-NNPC converter. The discrete-time model of 5L-NNPC is developed to implement the MPCC scheme. The simulation and experimental studies are conducted to verify the dynamic and steady-state performance of 5L-NNPC with the MPCC scheme. The performance of the proposed MPCC approach is compared with the conventional space-vector-modulation-based voltage-balancing approach. Furthermore, the flying capacitor voltage control capability of MPCC is verified at different load power factors. [ABSTRACT FROM AUTHOR]

This paper proposes a control method for a five-level hybrid flying-capacitor (5L-HFC) inverter, of which structure stems from the conventional five-level active neutral-point-clamped (5L-ANPC) topology by dividing the dc-link stage into three series-connected capacitors. In this inverter, the voltage stress on the power switches connected to the dc link is reduced by a half compared with that of the 5L-ANPC topology, thus the lower number of equally voltage-rated power devices can be employed. Also, the power losses in the 5L-HFC inverter are more evenly distributed than in the 5L-ANPC. In order to balance the dc-link capacitor voltages, a third-order harmonic offset injection is applied. When a diode rectifier is used to supply the dc bus voltage, the balancing method is not effective if the modulation index is higher than 0.64. Thus, an auxiliary circuit is needed to support the balancing of the dc-link capacitor voltages. However, the unbalancing problem can be overcome in a full-range operation without the auxiliary circuit if the back-to-back configuration is utilized. Finally, simulation and experiment results have verified the performance of the 5L-HFC inverter with the proposed control method. [ABSTRACT FROM AUTHOR]

This paper proposes the new clamping angle control (CAC) pulse width modulation (PWM) method to restore its maximum linear modulation range of voltage source inverters (VSIs) reduced by the duty ratio limitation in hardware implementation, which makes the VSIs to operate nonlinearly in the high modulation range. The deadtime and the bootstrap gate driver circuit mainly cause this duty ratio limitation in practice. In particular, the bootstrap gate driver circuit is used in many industrial applications by avoiding the additional power supply to apply the gate-source voltage of power switches, and therefore making the VSIs to be small size with the low cost. First, the proposed CACPWM method is theoretically analyzed. Then, it is applied in the high modulation range to overcome the limitation of the duty ratio due to the use of the bootstrap gate driver circuit. Thereafter, its practical effectiveness is verified by both simulation and experimental tests. Also, the resulting harmonic distortions are compared with those by the conventional PWM methods. [ABSTRACT FROM AUTHOR]

This paper presents a dynamic power flow management system for a solar photovoltaic (PV) system employing a single-stage single-inductor-based dual-input/output dc–dc converter feeding standalone dc loads backed up by a rechargeable battery. A time-sharing voltage-mode control scheme has been proposed for power flow management between solar PV, a battery, and a standalone dc load, and it also maintains a constant dc load voltage and performs maximum power point tracking operation of solar PV. The implementation of the control scheme has been described in detail. The steady-state performance of the single-stage converter has been explained with the relevant analytical expressions derived along with the characteristics. A state-space average model was developed for simulating the transient behavior and validating the working of the system for step changes in the input solar PV power and the dc loads. A hardware prototype of the proposed system has been fabricated, and the proposed controller has been implemented using the dSPACE DS1103 real-time interface board. The working of the proposed scheme for different levels of input solar insolation and dc load power demand has been satisfactorily demonstrated, and the corresponding results are also provided. [ABSTRACT FROM AUTHOR]

Many of the renewable energy resources, like offshore wind, utility PV farms, are located far away from the load centers, which requires dc power transmission system to efficiently deliver power. Voltage-source converter solution is required in many applications due to the stability and compensation requirement. This paper presents a new voltage source converter topology for medium to high voltage dc application, named modular embedded multilevel converter (MEMC). MEMC is based on a three-level topology structure and consists of series-connected insulated-gate bipolar transistor (IGBT) bridge stacks, like the popular modular multilevel converter (MMC) and series-connected thyristor or press-pack high voltage integrated gate-commutated thyristor or IGBT stacks. The basic operation principle, control solutions, and the methods to commutate the thyristors are explained in detail. Due to the three-level structure, the total number of IGBT stacks are reduced by half compared with MMC, leading to much lower energy storage, weight, volume, and system complexity. Also by replacing part of the IGBT stack in MMC with thyristor stack, both of the system conduction loss and switching loss can be further reduced. There are other topology variations of MEMC with a similar operational principle but different characteristics. [ABSTRACT FROM AUTHOR]

An adaptive control of DPWM implementable in clamped-three-level inverters with two strings of photovoltaic (PV) panels in cascaded connection is proposed in this paper. The proposed modulation is developed based on the so-called circuit-level decoupling concept. It is able to provide balance line voltage even under unbalanced dc links. The unequal dc voltages appeared due to asymmetric maximum point of power trackings (MPPTs) are controlled by proper injection of zero-sequence voltage to the common mode voltage, while the total dc voltage is regulated based on the voltage commands generated by the MPPT of each string. Thus, both PV strings are able to be operated based on their MPPTs while there is almost no low-order harmonic distortion at the inverter output current. Compared with the previous methods, the high capability of the proposed method is evaluated by simulation study and experimental tests. [ABSTRACT FROM AUTHOR]

This paper presents a new concept and approach for topology control and switching in distribution systems by extending the traditional circuit switching to laterals and single-phase loads. Voltage unbalance and other key performance indicators including voltage magnitudes, line loading, and energy losses are used to characterize and demonstrate the technical value of optimizing system topology on a per-phase basis in response to feeder conditions. The near-optimal per-phase topology control is defined as a series of hierarchical optimization problems. The proposed approach is applied to IEEE 13-bus and 123-bus test systems for demonstration, which included the impact of integrating electric vehicles (EVs) in the test circuit. It is concluded that the proposed approach can be effectively leveraged to improve voltage profiles with electric vehicles, the extent of which depends on the performance of the base case without EVs. [ABSTRACT FROM AUTHOR]

A new approach to the control of three-phase two-level grid-connected power converters is proposed in this paper. The proposed control is an extended state observer (ESO)-based second order sliding mode (SOSM), which comprises two control loops: the outer loop is a voltage regulation loop, as well as inner loop is an instantaneous power tracking loop. The outer loop is accomplished by an ${H}_{\infty }$ controller plus an ESO, which is designed to regulate dc-link capacitor voltage of the converter and asymptotically reject external disturbances and parameter perturbations. The SOSM strategy is employed in the inner loop to drive the active and reactive power convergence to their desired values. Control objectives of nearly unity power factor and dc-link capacitor voltage regulation are simultaneously satisfied. Availability of the ESO-based SOSM is compared with the classic proportional-integral control in simulations, and the comparison implies that the proposed strategy not merely achieves an almost perfect tracking performance, but also provides a complete robustness against resistance load variation. [ABSTRACT FROM AUTHOR]

This paper presents a new predictive power-factor-correction (PFC) controller for series-interleaved three-level boost (TLB) converters. Compared to the state-of-the-art TLB PFC controllers, where a two-cycle prediction and a detection of an operating region are necessary, the proposed controller achieves a low total harmonic distortion of the input current by using a single equation to predict the input current in all operating regions of the converter, in just one operating cycle. The average current control is achieved by sampling at the peak of the triangular carrier. The proposed PFC controller significantly reduces the distortion of the input ac current near the zero-crossing points, resulting in a low total harmonic distortion of the input current. The operation of the proposed controller was evaluated, and its stability and robustness to parameter changes was confirmed analytically. The controller operating principles were verified in simulations and validated by experiments on a medium-voltage 50-kW converter prototype. [ABSTRACT FROM AUTHOR]

The neutral-point potential fluctuation in single-phase three-level rectifiers leads to coupling between the line current regulation and dc-link capacitor voltage balancing, deteriorating waveform quality of the line current. For addressing this issue, this paper proposes a low-complexity model predictive current control (MPCC) with constant switching frequency, which achieves a decoupling control of the line current and the neutral-point potential under the unbalanced load condition. The switching frequency is fixed by combining the MPCC scheme with predefined switching sequences. The boundary of the durations for voltage vectors in switching sequences is presented to balance the capacitor voltage without worsening the line current quality. The optimal switching sequence and the corresponding optimal durations of voltage vectors in the switching sequence are readily derived without the assessment of the cost function, which dramatically simplifies the complexity of the MPCC scheme. Finally, simulations and experimental results are conducted to verify the effectiveness of the proposed MPCC scheme. [ABSTRACT FROM AUTHOR]

High-frequency (HF) switching and ac-side unbalanced loads challenge smart transformer (ST)-fed hybrid grids (both ac and dc), causing common-mode (CM) voltage variations and dc-link oscillation. The HF switching introduces an HF CM voltage and the ac grid unbalanced loads introduce a fundamental frequency CM voltage in hybrid grids. The CM voltage in ST-fed distributed grids degrades the power quality, threatens the safety of the connected devices, and potentially constitutes a health risk for the operators of such devices. Therefore, this paper systematically analyzes the root causes of the ST CM voltage variations and the impacts on hybrid grids. Based on the two typical configurations (three- and four-leg converters), the performance and requirements of CM inductor filter and bypass CM filter on HF CM voltage suppression are studied in detail. By considering the CM voltage suppression and dc capacitor lifetime, a four-leg converter with improved modulation strategy and small dc bypass film capacitor is proposed. The simulation and experimental results clearly verify the feasibility and correctness of the proposed strategies. [ABSTRACT FROM AUTHOR]

In this paper, a modular control approach has been proposed for a single- and three-phase differential-mode Ćuk inverter (DMCI) operating with a recently proposed discontinuous-modulation scheme that offers tangible performance benefits over conventional continuous modulation scheme. The modular control scheme uses a combination of a transformation and adaptive control law to meet tracking requirements in the presence of converter nonlinearity. Experimental results for the single- and three-phase DMCI are provided for startup, steady state, load transition, and total harmonic distortion using different types of loads, which validate the efficacy of the implemented modular tracking controller. Further, detailed stability of the closed-loop DMCI module is provided. [ABSTRACT FROM AUTHOR]

This paper presents a control method that can prevent audible noise generation in an LLC resonant half-bridge dc–dc converter under a light-load condition, while achieving the same input voltage range and power-conversion efficiency ηe as the burst-control method that generates an audible noise. The proposed method reduces switching and conduction losses at light load by skipping several pairs of switch-control pulses, while varying the switching frequency less than the normal-control method does. This skip-control method enables the LLC resonant converter to have a large magnetizing inductance, and to have high ηe over a wide range of load variation. At an input voltage of 385 V, an output voltage of 24 V, and a resonant frequency of 180 kHz, the proposed method achieved η e ≥ 85.46% for an output power range of 7.2–360 W; the highest ηe was 96.08% at $P_o$ = 336 W. [ABSTRACT FROM AUTHOR]

This paper presents a comprehensive set of steady-state models to be included in power flow simulation studies of dc railway networks. This simulation framework covers all important aspects and features of each element of modern dc railways. The proposed models are simplified to achieve the maximum simulation speed while keeping the required accuracy. Not only nonreversible, controlled, and uncontrolled reversible substations are considered, but also onboard and offboard accumulation systems. The train model can consider the low network receptivity (overvoltage protection for trains equipped with regenerative braking) and overcurrent protection. It is also possible to include in the simulation dc/dc links between nodes of the railway network at the same or different voltage. To date, there is no other work able to conjugate all the mentioned models in a complex multitrain scenario. [ABSTRACT FROM AUTHOR]

This paper investigates ac–dc–ac multilevel topologies for three-phase four-wire applications obtained from an interconnection of three-leg voltage-source converters. The topologies can be applied in line voltage regulators, universal active power filters, and uninterrupted power supplies. Operating principles, a pulsewidth modulation (PWM) technique, and an overall control strategy are developed. The PWM and control strategies are suitable to regulate the dc-link voltages and to reduce the harmonic distortion, switching stress, and power losses. Simulation results are used to compare the proposed configurations with a conventional solution in terms of harmonic distortion, semiconductor losses, and others characteristics. Experimental results are presented to validate the theoretical considerations and were obtained by using insulated-gate bipolar transistors with dedicated drives and a digital signal processor with appropriated plug-in boards and sensors. [ABSTRACT FROM AUTHOR]

In this paper, a fifth-order boost point-of-load converter is developed by cascading a modified fourth-order boost converter with a combination of L–C and diode. This topology has the following salient features: Single-switch topology, common ground between source and load, low-voltage stress across intermediate capacitors, and voltage gain same as other reported fifth-order boost converters with no common ground. Steady-state and dynamic analyses demonstrate the proposed converter's boosting feature and dynamic performance, respectively. A contoured robust Bode plot methodology is employed to design the robust voltage-mode controller to ensure load voltage regulation in the presence of uncertainties. The necessary and sufficient conditions under which the designed controller guarantees the load voltage regulation and robust stability are obtained. A step-by-step robust controller design procedure is outlined. The salient features of the proposed converter and its robust performance are studied analytically, using the MATLAB platform, and validated experimentally on a 60-W prototype module. [ABSTRACT FROM AUTHOR]

This paper presents a dual output power factor correction (PFC) converter for switched reluctance motor (SRM) drives. Here, a modified single-ended primary inductance converter (SEPIC) is proposed for a wide range of speed control and to achieve PFC at ac mains. The switching frequency of the converter is considered to be 20 kHz. The converter is designed to operate in the discontinuous conduction mode (DCM) of operation, which reduces the size of the output inductor. The DCM mode to obtain PFC also reduces the sensor requirement as compared to the continuous conduction mode (CCM), where two voltage sensors and one current sensor add to the drive cost. The drive is proposed for universal ac mains (90–270 V ac). Simulated and experimental results are demonstrated to validate the performance of the drive during different operating conditions. The input current total harmonic distortion is reduced to comply with an IEC 61000-3-2 standard. [ABSTRACT FROM AUTHOR]

This paper investigates an ac–dc–ac multilevel power converter. The studied configuration is composed of two single-phase ac–dc–ac three-leg modules and series-connected H-bridges in the shared part of system. Because the proposed converter has shared legs between the input and output, it is employed in applications with same input and output frequency. Uninterrupted power supply and unified power quality conditioner are application examples for this converter. Such multilevel topology has lower dc-link voltage rating, which, consequently, presents low switch blocking voltages when compared to conventional topologies. System model, a space-vector pulsewidth modulation (PWM) strategy to symmetrical and asymmetrical dc-link voltages, and an overall control strategy to adjust the system variables are presented. A power flux analysis shows the operation zone in which the individual dc-link voltage balancing is possible. PWM and control strategies are developed to reduce the semiconductor total losses, harmonic distortion, and switching stress. Two ac–dc–ac multilevel conventional structures are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

This paper investigates a multilevel inverter composed of series/parallel-connected H-bridges. The presented structure can be used for applications in which the use of semiconductor switches with low-voltage and low-current ratings is intended. A comprehensive system model, an overall control strategy to adjust the output voltage with constant magnitude and frequency, and a level-shifted PWM (LS-PWM) strategy based on a voltage vectors unidimensional analysis and a plane analysis are presented. The LS-PWM is capable of mitigating the low-frequency circulating current, thus generating multilevel voltage signals with low harmonic distortion, maximum number of levels, and low dv/dt. In addition, considering a wide range of values of voltages and currents and various power levels, the total converter losses are reduced compared with the conventional multilevel converters. Two multilevel conventional inverters with the same number of semiconductor switches are used for comparison. Simulation and experimental results demonstrate the feasibility of the studied converter. [ABSTRACT FROM AUTHOR]

The series connection of insulated gate bipolar transistors (IGBTs) allows operation at voltage levels higher than the rated voltage of one IGBT and has less power semiconductor costs compared to multilevel topologies. However, voltage unbalance during the switching transient is a challenge for series-connected device application. This paper presents an field-programmable gate array (FPGA)-based voltage balancing strategy for multiseries-connected high-voltage (HV)-IGBTs including an FPGA-based active voltage balancing control (AVBC) circuit integrated into the gate driver and the control for multiseries-connected IGBTs. The effectiveness of the control has been experimentally validated in a prototype using four 4.5 kV HV-IGBTs in series connection. [ABSTRACT FROM AUTHOR]

In order to prevent the power switching devices (e.g., an insulated-gate bipolar transistor, IGBT) from shoot-through in voltage-source converters during a switching period, the dead time is added either in the hardware driver circuits of the IGBTs or implemented in software in pulse width modulation (PWM) schemes. Both solutions will contribute to a degradation of the injected current quality. As a consequence, the harmonics induced by the dead time (referred to as “dead-time harmonics” hereafter) have to be compensated in order to achieve a satisfactory current quality, as required by standards. In this paper, the emission mechanism of dead-time harmonics in single-phase PWM inverters is, thus, presented considering the modulation schemes in detail. More importantly, a repetitive controller has been adopted to eliminate the dead-time effect in single-phase grid-connected PWM converters. The repetitive controller has been plugged into a proportional-resonant-based fundamental-frequency current controller so as to mitigate the dead-time harmonics and also to maintain the control of the fundamental-frequency grid current in terms of dynamics. Simulations and experiments are provided, which confirm that the repetitive controller can effectively compensate the dead-time harmonics and other low-order distortions, and also, it is a simple method without hardware modifications. [ABSTRACT FROM AUTHOR]

Direct power control (DPC) has gained much attention for medium-voltage applications due to its fast power control capability. However, a conventional static switching table based DPC can lead to unsatisfactory response when the converter is connected to an electric grid because it is commonly designed assuming ideal and constant voltages of the grid and the dc link. Therefore, the actual grid voltage and the actual converter dc-link voltage should be considered while designing the switching table. This paper proposes a novel dynamic switching table for the DPC, considering actual grid and dc-link voltages variation. The proposed dynamic switching table incorporates a new definition of power influence crossover angles of each converter space vector. The proposed scheme dynamically adapts the switching table by feeding forward the actual grid and dc-link voltages, and hence the converter's power is precisely controlled. The proposed technique is verified for the three-level neutral point clamped converters connected to a standard IEEE 9-bus test system. Moreover, the real-time simulations are performed in a real-time digital simulator, OPAL-RT. The obtained results verified the effectiveness of the proposed DPC strategy under different grid fault scenarios. [ABSTRACT FROM AUTHOR]

This paper proposes a circuit structure that can improve the power-conversion efficiency \eta e of an AC–DC boost converter. The circuit uses a 1:1 transformer and a voltage boost circuit composed of an inductor, a capacitor, and a diode. The transformer forces the converter to operate in continuous conduction mode for input current, and thereby reduces input ripple. The voltage boost circuit enables the switch to operate in critical conduction mode, so the power loss due to turn-on of switch and reverse recovery of diode is minimized. The proposed converter has high \eta e over a wide range of AC input voltage $V_{{\rm{ac}}}:\,\eta _{e}= 92.9\% $ at $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}} and \eta e= 97.4\% at V{\rm{ac}}= {\text{265}}\,{\text{V}}, when the converter was operated at DC output voltage of 400 V and output power of 500 W. The temperature of the switch stabilized at ∼84 °C for $V_{{\rm{ac}}}= {\text{85}}\,{\text{V}}$ , at ∼70 °C for $V_{{\rm{ac}}}= {\text{110}}\,{\text{V}}$, and at ∼42 °C for $V_{{\rm{ac}}}= {\text{220}}\,{\text{V}}$, whereas that in other AC–DC converters either failed or stabilized at much higher levels. The proposed converter is well suited to systems that require an input voltage range of 85–265 V in root-mean-square value. [ABSTRACT FROM AUTHOR]

This paper presents the active capacitor voltage-balancing (ACVB) methods based on the dynamic model for a five-level nested neutral-point piloted (NNPP) converter using hybrid carrier modulation. The traditional hybrid carrier modulation provides natural voltage balancing of floating capacitors and dc-link capacitors. First, the natural voltage-balancing ability under steady-state and ideal conditions is theoretically proved. However, there are accumulated errors and deviations of capacitor voltages in practical applications, especially under dynamic conditions. In order to address the accumulated errors and deviations of capacitor voltages, the dynamic models of floating-capacitor voltages and neutral-point voltage are established. Moreover, the ACVB method based on the dynamic model of the neutral-point voltage is proposed by injecting the zero-sequence voltage. And the ACVB method based on the dynamic model of floating-capacitor voltages is proposed by introducing the adjustment variables. The proposed ACVB methods have the advantages of simple formula, definite physical meaning, and high accuracy. Furthermore, the output voltage quality and current quality are evaluated in term of total harmonic distortion and the effect of model parameter mismatch on the proposed ACVB methods is presented. Finally, the comparative simulation and experimental results verify the correctness of the proposed ACVB methods based on the dynamic model under different conditions. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies. [ABSTRACT FROM PUBLISHER]

This paper proposes a practical solution of high-frequency-link dc transformer based on switched capacitor (SCDCT) for medium-voltage dc (MVDC) power distribution application. Compared to the traditional dc transformer scheme, the proposed SCDCT can disconnect from MVDC distribution grid effectively as a dc breaker when a short fault occurs in the distribution, can enhance power transfer capacity, and always ensures high-frequency-link voltage match to improve current impact and efficiency performances, and the redundancy design can be achieved when some submodules fail to improve the reliability. In the paper, the topology, voltage and power characterization, control strategy, startup, and fault solution of SCDCT are presented and analyzed comprehensively. At last, an SCDCT prototype is built and the experimental results verify the correctness and effectively of the proposed solution. [ABSTRACT FROM AUTHOR]