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This paper has introduced two important indexes, turn-off surge voltage (TSV) on power switch and peak positive pole potential (PPPP) of storage batteries, which can be used to evaluate switching transient process of high-voltage energy storage system. Research on them is of great significance to power switch choice and high-voltage isolation design in engineering applications. Power switch response process at the turning off moment and transient process in freewheel stage have been analyzed by the established small-signal model of single power switch; then, a power switch test platform for hybrid energy storage system was built to verify it. Taking pulsed-power supply charging device with a novel inductor of low resistance and high inductance as a research object, this paper has analyzed dynamic process of the TSV and the PPPP at the turning off moment through establishing state space model of the whole system. Comparison shows that the numerical curves match the simulated curves well. Finally, the exactness of the employed model has been further verified in two pulse capacitor charging experiments. [ABSTRACT FROM AUTHOR]

In data center and telecommunication power supplies, the front-end dc–dc stage is required to operate with a wide input voltage range to provide hold-up time when ac input fails. Conventional LLC converter serving as the dc–dc stage is not suitable for this requirement, as the normal operation efficiency (at 400 V input) will be penalized once the converter is designed to achieve high peak gain (wide input voltage range). This paper examined the operation of the LCLC converter and revealed that the LCLC converter could be essentially equivalent to a set of LLC converters with different magnetizing inductors that are automatically adjusted for different input voltages. In nominal 400 V input operation, the LCLC converter behaves like an LLC converter with large magnetizing inductor, thus the resonant current is small. In the hold-up period, when the input voltage reduces, the equivalent magnetizing inductor will reduce together with switching frequency reducing, thus the converter achieves high peak gain. In this paper, a new design methodology is also proposed to achieve optimal utilization of the two resonant capacitors for high power application. To verify the effectiveness of the LCLC converter for hold-up operation, comprehensive analysis has been conducted; a detailed step by step design example based on capacitor voltage stress is introduced; an experimental LCLC prototype optimized at 400 V, with input voltage range of 250–400 V and 12 V/500 W as output has been presented. [ABSTRACT FROM AUTHOR]

Soft-switching techniques of transformerless photovoltaic grid-connected inverters (TLIs) can significantly reduce switching losses, as well as soften switching processes. Conventional dc–ac soft-switching configurations proposed by Dr. Deepakraj M. Divan are invalid in TLIs because of the leakage current problem. In order to develop soft-switching techniques in TLIs, this paper proposes a new soft-switching configuration and a procedure to guide the invention of soft-switching TLIs. First, this paper proposes two basic resonance tanks related to dc bus polarities, and then, uses these basic tanks to elevate four popular full-bridge-type TLIs according to the proposed guideline. As a result, four soft-switching TLIs are gained. Second, this paper picks obtained soft-switching highly efficient and reliable inverter concept (HERIC) as example to analyze its soft-switching operation principle and performance. As a consequence, all active switches of the gained soft-switching HERIC circuit are switched under both of zero-current turn-on and turn-off conditions; the reverse recovery problem of freewheeling diodes is alleviated owing to the zero-current turn-off of diodes; meanwhile, the common-mode voltage at the switching frequency scale is still constant. Finally, some experimental results from a 3-kW universal prototype at 50-kHz switching frequency are provided to verify the effectiveness of the main contributions of this paper. [ABSTRACT FROM AUTHOR]

This paper presents a unified framework for the modeling, analysis, and design of load-independent Class E and Class EF inverters and rectifiers. These circuits are able to maintain zero-voltage switching and, hence, high efficiency for a wide load range without requiring tuning or use of a feedback loop, and to simultaneously achieve a constant amplitude ac voltage or current in inversion and a constant dc output voltage or current in rectification. As switching frequencies are gradually stepping into the megahertz (MHz) region with the use of wide-bandgap (WBG) devices such as GaN and SiC, switching loss, implementing fast control loops, and current sensing become a challenge, which load-independent operation is able to address, thus allowing exploitation of the high-frequency capability of WBG devices. The traditional Class E and EF topologies are first presented, and the conditions for load-independent operation are derived mathematically; then, a thorough analytical characterization of the circuit performance is carried out in terms of voltage and current stresses and the power-output capability. From this, design contours and tables are presented to enable the rapid implementation of these converters given particular power and load requirements. Three different design examples are used to showcase the capability of these converters in typical MHz power conversion applications using the design equations and methods presented in this paper. The design examples are chosen toward enabling efficient and high-power-density MHz converters for wireless power transfer (WPT) applications and dc/dc conversion. Specifically, a 150-W 13.56-MHz Class EF inverter for WPT, a 150-W 10-MHz miniature Class E boost converter, and a lightweight wirelessly powered drone using a 20-W 13.56-MHz Class E synchronous rectifier have been designed and are presented here. [ABSTRACT FROM AUTHOR]

A new isolated single-stage soft-switching power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) is introduced in this paper. In the proposed LED driver, the switches voltage stress and also the dc-bus voltage is limited to the peak of the line voltage. Hence, low voltage rated mosfets and diodes can be used. The efficiency is improved because the switches are turned on under zero current switching (ZCS) condition and turned off under zero voltage zero current switching (ZVZCS) condition. Also, no current feedback is required since the converter provides an output current independent of output voltage. In this paper, operating principle of the proposed LED driver is presented and design considerations are discussed. To verify the theoretical analysis, a laboratory prototype of the proposed converter for supplying a 50 W/70 V LED module from 220 Vrms/50 Hz ac mains is implemented, and the experimental results are presented. Since current feedback is not used, dimming property and operation for universal voltage range is not achievable. [ABSTRACT FROM PUBLISHER]

In applications that demand single-input dual-output (SIDO) or dual-input single-output (DISO) dc–dc converters, employing two separate single-input single-output (SISO) converters is a solution. However, the number of components is doubled, resulting in high overall cost. In order to reduce costs, this paper proposes a novel topology synthesis methodology, with which a variety of SIDO and DISO dc–dc converters with reduced components can be derived. The principle of topology synthesis states that integrated SIDO and DISO dc–dc converters can be easily developed from conventional SISO converters by replacing a diode with a basic cell inclusive of additional input/output port. The principle is effective for many SISO dc–dc converters, and as an example, topology synthesis based on buck, boost, buck–boost, Cuk, sepic, and zeta SISO converters is performed in this paper. In order to achieve better understanding of the proposed converters, the integrated SIDO Cuk converter is specifically analyzed and experimentally verified. In comparison with the conventional scheme of two separate SISO Cuk converters, good cross regulation is retained while the number of diodes, inductors, and capacitors is reduced in the proposed SIDO Cuk converter. In addition, zero-voltage-switching operation of one switch is achieved, contributing to lower switching losses. Finally, a prototype circuit with 48-V input and 156 V/1 A, 24 V/4 A outputs is built to validate the theoretical analysis. [ABSTRACT FROM PUBLISHER]

This paper introduces a novel single-phase buck–boost noninverting variable-frequency ac–ac converter that offers higher efficiency compared to the competitors. This converter utilizes a lower number of semiconductors. A simple and flexible switching strategy is also proposed, which generates the desired output waveform avoiding unnecessary high-frequency switching operation of semiconductor devices. A high reliable operation due to the elimination of the input source shoot-through risk, an inherent commutation capability that mitigates the voltage spikes across the semiconductors, a lower semiconductors rating requirement, an improved input current waveform quality, and a smaller required input filter inductor are the main advantages of the proposed converter. Thus, the proposed converter can be successfully applied to many industrial applications such as medium-frequency transformer isolation for traction and wind turbine converters, ac–dc high-voltage conversion based on Cockcroft–Walton circuit and induction heating systems. The theoretical achievements and claims are all confirmed through extensive experimental tests on a 200-W laboratory setup. [ABSTRACT FROM AUTHOR]

A special stress for circuit breaker is the occurrence of evolving fault or parallel switching condition. These switching cases are not standardized by international standards, but may occur in service and may create problems for the breaker. In the past, it was a problem mainly with oil circuit breakers and some types of air-blast circuit breakers but lesser known with SF6 circuit breakers. In the meantime, with upcoming new switching technologies along with changed operating duties, some doubts exist that these switching cases may become an issue again. This paper explains in detail the background of these stresses and presents a method to evaluate the capability of SF6 circuit breakers for such situations. The theoretical evaluation involves network calculations, gas flow simulations, and dynamic dielectric analysis. It is important to note here that several tests have been done in the past for evolving and parallel switching faults for both puffer as well as self-blast circuit breakers with the knowledge available at that time. These test results are used to validate the outcome of the theoretical evaluation which will help in better prediction of the circuit breaker behavior before performing actual tests. It can be concluded that theoretical simulation may, in majority of the cases, serve as sufficient proof to show feasibility for such cases. [ABSTRACT FROM AUTHOR]

This paper presents a pulsed power modulator with a new structure that utilizes the reverse recovery characteristics of diodes to achieve an effective pull-down circuit configuration. The proposed configuration for active pull-down applicable to negative pulsed power applications with a high-voltage direct switching method is implemented by adding a diode to the pulse discharging path of the modulator, instead of using a pull-down resistor. The diode is forward-biased while an output pulse voltage is applied to the load. When the pulse voltage applied to the load is removed, the residual energy in the load is quickly discharged through the reverse recovery path of the diode so that the pull-down function of the pulsed power supply system is efficiently performed. The operating principle of the proposed system is described, and each operating mode is analyzed in detail. In addition, the feasibility of the proposed system configuration is examined through various simulation results. Finally, it is proven that the proposed system can be used effectively in pulsed power application fields through a practical experiment in plasma source ion implantation applications. [ABSTRACT FROM AUTHOR]

This paper presents a self-adapting synchronized-switch harvesting (SA-SSH) interface circuit to extract energy from vibration-based piezoelectric energy harvesters (PEHs). The implemented circuit utilizes a novel switching technique to recycle optimum amount of harvested charge on piezoelectric capacitance to strengthen the damping force, and simultaneously achieve load-independent energy extraction with a single inductor. Charge recycling is realized by adjusting extraction time, and optimized through a maximum power point tracker based on charge-flipping dissipation. The circuit has been implemented using 180 nm HV CMOS technology with 0.9 × 0.6 mm2 active area. Self-adapting SSH circuit has been validated with both macro-scaled and MEMS PEHs with different inductor values. The interface circuit provides maximum energy extraction for the full storage voltage range of 1.8–3.7 V. The implementation harnesses have 500% more power compared to an ideal full-bridge rectifier, and output 3.4 μW for 2.24 V peak-to-peak open-circuit piezoelectric voltage from MEMS PEH excited at its resonant frequency. [ABSTRACT FROM AUTHOR]

Photovoltaic (PV) systems having rechargeable batteries are prone to be complex and costly because multiple converters are necessary to individually regulate a load, PV panel, and battery. This paper proposes novel nonisolated multiport converters (MPCs) integrating a bidirectional pulsewidth modulation (PWM) converter and phase-shift-switched capacitor converter (PS-SCC) for standalone PV systems. A PWM converter and PS-SCC are integrated by reducing the total switch count, realizing the simplified system and circuit. In the proposed MPCs, two control freedoms of duty cycle and phase shift angle are manipulated to individually regulate the load, PV panel, and/or battery. The detailed operation analysis was performed to mathematically derive gain characteristics and zero voltage switching operation boundaries. For the battery discharging mode, in which the PV panel is not available and the MPC behaves as a single-input–single-output converter with two control freedoms available, the optimized control scheme achieving the lowest rms current is also proposed to maximize power conversion efficiencies. Various kinds of experimental verification tests using a 200-W prototype were performed to verify the theoretical analysis and to demonstrate the performance of the proposed MPC. [ABSTRACT FROM AUTHOR]

DC microgrid is gaining attraction and a recent trend in distribution power generation system due to penetration of renewables (especially photovoltaic or fuel cell). In this paper, a new triple-switch-triple-mode high step-up converter (TSTM-HS converter) is presented for dc microgrid applications. In the proposed converter, voltage lift technique is employed and range of duty cycle is extended by incorporating an additional switch in converter circuitry. By doing this, high voltage conversion ratio is achieved without using a transformer, coupled inductor, and multiple stages of switched capacitors. Moreover, the TSTM-HS converter operated in three modes with two types of the duty cycles to achieve low to high voltage conversion without using high duty cycle for each switch. The effects of difference in the inductance values on the regulation and operating behavior of the TSTM-HS converter are discussed. The continuous conduction mode and discontinuous conduction mode characteristics of the TSTM-HS converter are discussed in detail with steady-state analysis and boundary condition. The comparison is provided to highlight the benefits of the TSTM-HS converter. The selection of semiconductor devices and the design of reactive components are discussed for the TSTM-HS converter. The experimental results of the proposed converter are provided which validate the theoretical approach, performance, and feasibility of converter. [ABSTRACT FROM AUTHOR]

This paper proposes a voltage-source parallel resonant Class E inverter. The proposed circuit has a shunt capacitor including parasitic capacitance of a switching device and achieves zero-voltage switching and zero-voltage derivative switching at turning-on like a classical Class E inverter. Therefore, high power conversion efficiency is achieved under high operating frequency. Unlike the other Class E inverters, the proposed circuit has no choke inductor or dc blocking capacitor. Moreover, it has a parallel resonant tank unlike the classical Class E inverter. Thus, a circuit protection is not required in a wireless power transfer system. Circuit analysis, circuit simulations, and circuit experiments were carried out. The experimental circuit performed the desired operation and the power conversion efficiency was 93.2% with the output power 4.76 W at the operating frequency 1 MHz. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

A component-minimized and low-voltage-stress single-phase power factor correction rectifier without electrolytic capacitor is proposed in this paper. Component minimization is achieved by embedding an active pulsating-power-buffering (PPB) function within each switching period, such that typical add-on power electronic circuits for PPB are no longer needed. Additionally, with a three-level flying-capacitor configuration, the voltage stresses of switching devices can be reduced more than 50% as compared to existing solutions that are based on embedded PPB. The relationship between the inductance requirement and the patterns of the modulation carriers, and how it can be utilized to minimize the magnetics of the rectifier, is also discussed. A 110 W hardware prototype is designed and tested to demonstrate the feasibilities of the proposed rectifier. An input power factor of more than 0.97, peak efficiency of 95.1%, and an output voltage ripple of less than 4.3% across a wide load range have been experimentally obtained. [ABSTRACT FROM AUTHOR]

Many research works have been conducted on increasing the efficiency of interleaved boost converters (IBCs) applied for power factor correction (PFC) by using high-performance power electronic devices and soft switching circuits, which are not helpful in reducing the hardware cost and systematic complexity. In this paper, three intrinsic parameters affecting the efficiency of IBC PFC are found and analyzed, including the switching frequency value, boost inductor value, and output voltage value. Based on the findings, considering the limitations of current ripples, power factor, maximum magnetic flux density, and volume of a boost inductor, an optimization design method for high-efficiency IBC PFC is proposed. A 3.3-kW IBC PFC prototype is developed based on Si devices. The experimental result verifies that the proposed method can improve the efficiency of IBC PFC with low-cost low-performance devices in the full-load range. [ABSTRACT FROM AUTHOR]

Series–parallel forward dc–dc converter system is a good option in high-voltage high-power applications. A switch fault, in this converter, should be detected as soon as possible, to avoid further damage and save maintenance cost. In this paper, a new switch fault diagnosis method, which treats output inductor voltages as diagnostic criteria, is proposed for this system. With the proposed method, expensive sensors are needless, since diagnostic signal can be easily acquired by adding a small auxiliary winding into inductor magnetic core. Based on the feature of diagnostic signals in such a system, a low-cost diagnostic circuit is designed. The failed module caused by open-circuit fault or short-circuit fault could be detected within one switching period, allowing for an immediate fault-tolerant action. This method also shows generality for different connections and buck-type isolated topologies. Besides, it works reliably under input-voltage variation and load step, and no misdiagnosis will occur during normal dynamic process. Finally, experimental result verifies the effectiveness of this method. The proposed scheme has a good potential to be applied in real applications for its simplicity and robustness. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

In this paper, a high step up converter consisting of an integrated quadratic-boost converter and a voltage doubler is proposed. The integration of the quadratic-boost converter makes the system easier to lift up its voltage gain through slightly increasing the duty ratio of the single switch. The voltage doubler further increases the voltage gain of the system as the turn ratio rises. The voltage stresses on the switch and the diodes are decreased for such cascaded topology. Different operation modes are analyzed and mathematical analysis of the converter is presented in detail. The leakage inductance contributes to realizing zero current switching of the diodes in the second boost stage and the doubler and the energy can be recycled to the load. A 38-W prototype is built to work as a vehicle LED driver. Experiments are conducted to verify the advantages of the proposed converter and the efficiency is 90% at the nominal operating point. [ABSTRACT FROM AUTHOR]

In this paper, a new modified single-switch single-ended primary inductor converter (MS2-SEPIC)-based high step-up dc–dc converter is presented. The proposed topology uses the coupled-inductor (CL) technique and a voltage tripler rectifier, which results in a high voltage gain for the converter. Here, the switching loss has been reduced significantly owing to the quasi-resonance operation of the circuit created by the leakage inductance of the CL along with circuit capacitors. The operational principles and steady-state analysis are discussed. Experimental results based on a 100 W laboratory prototype verify the validity of theoretical analysis. [ABSTRACT FROM AUTHOR]

Flyback converter has advantages of simple circuit configuration and easy control. However, it suffers two problems. One is the active switch is hard switching. The other is a very high voltage spike when the active switch is turned off. In order to solve these problems, this paper presents a novel dc-to-dc converter that mainly consists of two interleaved flyback converters. Both active switches can achieve zero-voltage switching on without the use of any active clamp circuit or snubber circuit. In addition, the leakage flux energy can be delivered to the output by using two added diodes. It helps to reduce the voltage spikes on the active switches and improve circuit efficiency. The steady-state analyses at different operation modes and the mathematical equations for parameters design are provided. Finally, a 200-W prototype circuit for driving high-brightness light-emitting diodes (LEDs) is built and tested to verify the feasibility of the proposed circuit. The LEDs are dimmed from 100% to 10% full power. Satisfactory performances are obtained from the experimental results. [ABSTRACT FROM AUTHOR]

In this paper, a sequence switching control (SSC) scheme based on an auxiliary parallel inductor is proposed to improve the transient performance of buck converters. The proposed SSC scheme introduces a small controlled inductor in parallel with the output inductor, so as to increase the inductor-current slew rate when it is activated during a load transient. Furthermore, an “n+ 1” sequence switching strategy is proposed to control the auxiliary parallel inductor. The proposed scheme divides the transient event inton+ 1 periods. In the formernperiods, the same small output voltage deviations are designed, while in the last period, a smaller deviation is done for a smooth transition from the transient to the steady state. The switching sequence is derived applying the capacitor–charge balance principle for each ofn+ 1 periods. For a given buck converter in the experiment, the settling time and the output voltage deviation of the proposed SSC scheme enhance more than 50% and 67%, respectively, over those of the time-optimal control for a 3-A load step. [ABSTRACT FROM AUTHOR]

A new light emitting diode (LED) driver circuit is presented in this paper based on the buck converter with coupled inductors for automotive applications. Soft-switching condition is provided for the switch via a passive resonant circuit incorporating the leakage inductance of the coupled inductors. Also, the leakage inductance energy is recycled to the output. The proposed converter has a very simple structure as well as high efficiency, which makes it a good candidate for battery-operated applications. The proposed converter only applies one magnetic element and the leakage and magnetizing inductances are used as resonant elements. Also, during the resonance, a resonance capacitor is approximately charged to the input voltage, and therefore, the capacitor voltage stress and semiconductor devices voltage stress are low. These are the main advantages of the proposed converter over other similar converters. The theoretical analysis is provided and the operating principles and design considerations are explained. An 8 W laboratory prototype is implemented in order to prove the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

DC-link current ripple is one of the important factors for operating the current-source converter. In practice, the dc-link current ripple can be reduced by increasing the switching frequency or inductance. However, it may result in the higher switching losses, larger size, or higher cost. In order to deal with this problem, the inherent limitation of the conventional solution is discussed in this paper. The time-domain equation of the dc-link current is established for the first time. And then, a new space vector control strategy is proposed to reduce the ripple with no need of increasing the switching frequency or inductance. The space vector is divided into 12 sectors, where the dc-link current ripple can be effectively reduced by the optimal vector sequence. Finally, the proposed method is implemented on the TMS320F28335DSP + XC3400FPGA digital control hardware platform. The experimental results verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

A dual-input high step-up DC/DC converter with zero voltage turn-off (ZVT) auxiliary circuit is presented in this paper. The cost of whole photovoltaic (PV) power could be decreased significantly by the proposed converter because it allows two PV panels to be connected at the same time. ZVT auxiliary circuit provides soft switching in a wide range of load variations with six passive components. Turn-off switching losses could be decreased and the efficiency of the whole converter could be improved. In , the operation principle and performance characteristics of the proposed converter have been analyzed and an 800 W experimental prototype has been built to validate the analytical results in. In , a dual-input maximum power point tracking (DMPPT) control algorithm has been designed for the proposed converter. Experimental results show that two PV panels can achieve the maximum power output state separately by the proposed DMPPT control algorithm. [ABSTRACT FROM AUTHOR]

This paper presents a self-powered interface circuit to extract energy from ambient vibrations for powering up microelectronic devices. The circuit interfaces a piezoelectric energy harvesting micro electro-mechanical systems (MEMS) device to scavenge acoustic energy. Synchronous electric charge extraction (SECE) technique is deployed through the implementation of a novel multistage energy extraction (MSEE) circuit in 180 nm HV CMOS technology to harvest and store energy. The circuit is optimized to operate with minimum power losses when input power is limited, and adapts well to operating conditions with higher input power. The highly accurate peak detector was validated for a wide piezoelectric frequency range from 20 Hz to 4 kHz. A charging efficiency of about 84% has been achieved for 4.75 V open-circuit piezoelectric voltage excited at 390 Hz input vibration under nominal input power range of 30–80 μW. Power optimizations enable the circuit to maintain a conversion efficiency of 47% at input power level as low as 3.12 μW. MSEE provides up to 15% efficiency improvement compared to traditional SECE, and maintains power efficiency as high as possible for a wide input power range. [ABSTRACT FROM AUTHOR]

A simple buck–boost LED driver suitable for battery operated applications with limited input voltage level is presented in this paper. Soft switching performance is provided for the main switch via a resonant circuit to improve the converter efficiency. The incorporated auxiliary switch also performs under zero voltage switching condition. Both power switches can be driven with a simple gate drive circuit, so, the additional switch does not add any driving complexity. In addition, only one magnetic element is utilized in the proposed LED driver which contributes to circuit simplicity and lower weight and size. Also, all diodes turn off at zero current switching which eliminates the reverse recovery losses and improves efficiency. A laboratory prototype converting 12 V input voltage to 32 V output operating at 26 W output power is implemented and tested to verify the effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Class-E RF power amplifiers (PAs) are very power efficient under nominal operating conditions. Due to incorporating two tuned tanks, the dependence on the load impedance is, however, relatively large, resulting in, e.g., load-dependent output power, power efficiency, peak voltages, and peak (and average) currents which can lead to reliability issues. This paper presents load–pull analyses for class-E RF PAs from a mathematical perspective, with analyses and discussions of the effects of the most common nonidealities of class-E PAs: the limited loaded quality factor ($Q_{\mathrm {loaded}}$) of the series filter, switch ON-resistance, the limited quality factor of the dc-feed inductor, load mismatch-dependent switch conduction loss, and the limited negative voltage excursions (due to, e.g., the reverse conduction of the switch transistor for negative voltage excursions). The theoretical findings are backed up by extensive circuit simulations and load–pull measurements of a class-E PA implemented in 65-nm CMOS technology. The PA provides 18.1-dBm output power and 72% efficiency at 1.4 GHz under nominal operating condition employing an off-chip matching network. [ABSTRACT FROM AUTHOR]

Superconducting inductive pulsed power supplies have attracted a lot of attention due to its lower electrical loss and higher energy storage density than traditional inductors. To effectively improve charging rate and output continuous current pulses, a repetitive inductive pulsed power supply circuit topology based on high-temperature superconducting (HTS) pulsed power transformer was proposed and simulated in our previous studies. This paper aims to further study the feasibility of the repetitive inductive pulsed power supply circuit topology through experiments. A small air-core HTS pulsed power transformer and a bridge-type capacitor switching circuit were used to build the experimental platform. The experimental results show that the bridge-type capacitor switching circuit can shorten the charging time of each new cycle and the repetitive inductive pulsed power supply circuit is feasible for continuous current pulse output. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

Power usage reduction and efficiency enhancement of measurement devices are a major challenge in self-powered wireless sensor nodes and also sensors implanted in the human body. Such instruments should be usually operated using the limited environmental energy resources. Electrochemical sensors and potentiostats are extensively used in this context for the measurement of chemical components. In these cases, a lot of research has focused on internal processing blocks power reduction of the potentiostat circuit. In this paper, a discrete current mode (DCM) switching potentiostat is presented, which can significantly reduce the static power usage at the output stage of the potentiostat compared with linear output stage counterparts. Using time-domain analyses, the unexpected oscillatory behavior of a continuous current mode (CCM) output stage switching potentiostat is investigated. Consecutively, it is shown that in current fabrication processes, this configuration will consume more power than the DCM topology. The correctness of the designs and analyses are shown using both simulation and experimental results. The simulated 0.18- $\mu \text{m}$ CMOS DCM output stage potentiostat has an efficiency of 95% at an output load of $12~\mu \text{A}$ , while the long-channel MOSFET-based prototype implementation shows an efficiency of 64%. [ABSTRACT FROM AUTHOR]

A wide-range soft-switching high-efficiency cycloconverter-type high-frequency-link inverter with dual-phase-shift modulation strategy is proposed in this paper. By adding an auxiliary inductor in primary-side full bridge circuit and adopting center-tapped four-winding transformer structure, the soft-switching range for primary-side switches has been extended. The secondary-side active clamper network is designed to recycle leakage inductor energy, and suppress voltage spikes caused by the resonance of the leakage inductor and the parasitic capacitance of switches. One feature of the proposed inverter is that both the primary-side full-bridge and active clamper network employ phase-shift modulation technique where all switches are driven with nearly 50% duty cycle square signals, hence a simple and reliable transformer-isolated gate drive circuit with small transmission delay is presented. Moreover, all switches in the proposed inverter achieve zero voltage switching, which contributes to higher conversion efficiency as well as higher switching frequency. Analysis, design, and implementation of the proposed inverter are discussed in detail. A 200-kHz laboratory prototype for the high-voltage audio amplifier application is developed and the experimental results are presented to validate the analysis and performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

Zero-missing is a phenomenon in shunt-compensated cable systems, in which the current through the line breaker does not cross the zero point for several cycles. This paper deals with a thorough investigation on countermeasures of the zero-missing phenomenon in transmission systems and determines the requirements, benefits, and risks of applying each method. The effectiveness of countermeasures is studied on a simulated cable project with different cable lengths in an actual grid model of the Dutch 380 kV transmission system. Results are analyzed based on three criteria related to the IEC standards and the Dutch grid code. In addition, the switching sequence of circuit breakers is specified to maximize the effectiveness of the countermeasures. A statistical switching analysis is performed for the insulation coordination study since the application of some countermeasures increases the probability of high transient switching overvoltages. Moreover, the closing variation threshold of circuit breakers is calculated as a function of the circuit impedance and the shunt compensation degree. [ABSTRACT FROM PUBLISHER]

This paper proposes a new isolated single-stage single-switch power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) without electrolytic capacitor. In the proposed LED driver, the switch turns on under zero current switching (ZCS) condition. Also, it turns on at a voltage less than its nominal voltage stress, and therefore, the switch capacitive turn-on loss decreases too much extent. The leakage energy is absorbed, so there are no voltage spikes across the switch when the switch turns off. In this paper, operating principles of the proposed driver are discussed, and design considerations are presented. Also, a laboratory prototype for supplying a 21 W/30 V LED module from 220 Vrms/50\,\rm Hz ac mains is implemented, and experimental results are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]

Parallel ac-link universal power converters are a relatively new class of power converters that can be configured as dc–dc, dc–ac, ac–dc, and ac–ac. These converters are extensions of a buck–boost converter in which the current of the inductor is alternating and the input and output can have any number of phases with any forms, voltage amplitude, or frequency. By placing a small capacitor in parallel with the link inductor, all the switches can benefit from soft switching. The main limitation of the parallel ac-link universal power converter is its large number of switches. A three-phase ac–ac configuration requires 24 unidirectional switches. This paper proposes two topologies based on the parallel ac-link universal power converters that significantly reduce the number of switches. One of the proposed topologies reduces the number of switches in a three-phase ac–ac configuration to 16. The other topology reduces the number of switches to 10. The latter can offer galvanic isolation with only a single-phase high-frequency transformer. This paper presents the principles of the operation of the proposed topologies and evaluates them through simulation and experiments. [ABSTRACT FROM AUTHOR]

This paper proposes a single-stage single-switch light-emitting diode (LED) driver that integrates a buck–boost circuit with a Class-E resonant converter by sharing single-switch device. The buck–boost circuit, working as a power-factor correction (PFC) stage, operates in the discontinuous conduction mode (DCM) to shape the input current. The Class-E converter steps down the voltage to drive the LED. For specific component parameters, the Class-E converter can achieve soft-switching on the power switch and two rectifier diodes, and reduce switch losses at high frequencies. Electrolytic capacitors are used in the proposed converter to achieve a lower cost, but the system reliability decreases. To overcome this disadvantage, film capacitors can be used, but the current ripple increases. Neglecting the cost, multilayered film capacitors are the best option, if higher reliability and lower current ripple are required. The proposed driver features high efficiency (90.8%), and a high power factor (PF) (0.995). In this paper, analytical results and design considerations at 100 kHz are presented, and a 100-W prototype with 110 \textV\text{AC} input was built to validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

A single-phase bridgeless Cuk ac/dc power factor correction (PFC) rectifier with positive output voltage is proposed in this paper. For low output voltage product applications, the rectifier is designed to convert high input voltage to low output voltage. Due to no bridge diodes required and thus decreased input conduction losses, the proposed rectifier efficiency can be improved. The proposed rectifier operates in discontinuous conduction mode, and the current-loop circuit is hence not needed. In addition, only a single switch is used in the rectifier to simplify the control circuit design. A simple translation method to have the positive output voltage in the Cuk converter is presented in the rectifier to reduce the component counts and the cost. The operational principles, steady-state analysis, and design procedure of the proposed rectifier are addressed in detail in this paper. Simulation and experimental results obtained from a 150-W rated prototype circuit with input of 90–130 Vrms, 60 Hz, and output of 48 Vdc have verified the validity of the proposed rectifier. [ABSTRACT FROM PUBLISHER]

The gallium nitride transistors suffer from current collapse effect in operation regions, which leads the dynamic ON-resistance to increase when high voltage is applied to the transistor. Dynamic ON-resistance under practical application conditions is also an important factor for the reliability and conduction efficiency of transistors. To measure the dynamic ON-resistance and evaluate the current collapse effect, a softswitching circuit based on synchronous buck topology is proposed in this paper. To apply high-voltage and high-current stresses to the device without additional spikes and oscillation, resonance technique has been employed. As a result, the proposed circuit could produce sufficient power stresses to the devices with general equipment. To achieve accurate measurement of ON-resistance under switching operations and eliminate the saturation of oscilloscope probes, an active voltage clamp circuit is developed. Operation principles and design analysis of the circuit are described in this paper. The dynamic ON-resistance measurement method is illustrated in detail. Furthermore, a prototype circuit has been built. A simulation and experiments were carried out to verify the performance of the system. A comparison of the active clamp circuit with common voltage probes is presented through the measurement results. The experimental results confirm that dynamic ON-resistance can be accurately measured using the proposed circuit and the current collapse effect can be evaluated under practical operation conditions with high precision. [ABSTRACT FROM PUBLISHER]

Soft-switching ac-link universal power converters, also called partial resonant converters and ac-link buck–boost converters, have received noticeable attention during the last few years. In these converters, each of the inputs and outputs can be dc, single-phase ac, or multiphase ac; therefore, they can be used for dc–dc, dc–ac, ac–dc, or ac–ac power conversion systems. The soft-switching ac-link universal power converters are compact, reliable, and expected to offer longer lifetime compared with the other types of converters. However, they require more switches, which make the control process more involved. The sparse ac-link buck–boost converters were proposed to partially solve this problem. The sparse configuration reduces the number of switches from 24 to 20 in a three-phase ac–ac configuration. This paper proposes a modified configuration, which further reduces the number of switches without changing the principles of operation. This converter, which is named ultrasparse ac-link buck–boost converter, reduces the number of switches from 24 to 16, in a three-phase ac-to-ac case, and from 20 to 10, in a dc-to-three-phase-ac configuration. The proposed converter is applicable to systems with unidirectional flow of power, such as PV and wind power generation systems. This converter is expected to offer higher reliability compared with the original converter and higher reliability and efficiency compared with the sparse configuration. Another important feature of this configuration is that it can be fabricated by insulated-gate bipolar transistor modules, which are more compact and more cost effective compared with discrete devices. This paper presents the principles of the operation of this configuration and compares the efficiency, the failure rate, and the current rating of the switches in the ultrasparse, sparse, and original configurations. Moreover, it evaluates the performance of the proposed converter through simulation and experiment. [ABSTRACT FROM AUTHOR]

Due to their remarkable merits, the soft-switching ac-link universal power converters have received noticeable attention during the last few years. These converters, which can be configured as dc-dc, dc-ac, ac-dc, or ac-ac, are compact, reliable, and offer longer life time compared to the other types of converters. However, they require more switches, which make the control process more complicated. This paper proposes a modified configuration for the dc-ac power conversion, which reduces the number of switches without changing the principles of operation. This converter, which is named sparse ac-link buck-boost inverter, reduces the number of switches from 20 to 18. Despite reducing the number of switches, the partial resonant time, during which no power is transferred, is as short as the original configuration. An important feature of this inverter is that it can be fabricated by IGBT modules, which are more compact and more cost-effective compared to the discrete devices. This paper presents the principles of the operation of this configuration, and compares the efficiency, the failure rate, and the current rating of the switches in the proposed and original inverters. It is shown that the failure rates of the sparse configuration are lower than the original configuration. Therefore, they have longer lifetime. The efficiency of the sparse configuration is slightly lower than that of the original configuration. However, by using reverse blocking IGBTs in the sparse configuration, the efficiency of the proposed inverter will be improved significantly. This paper evaluates the performance of the proposed inverter through simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper proposes a new high-gain soft-switching dc–dc topology based on a switched inductor boost converter (SIBC). A conventional SIBC as a high gain boost topology has the issues of high conduction loss in switching diodes and high switching loss in the main switches. Also, it has severe electromagnetic interference (EMI) issue due to high-frequency ringing formed by parasitic inductance and diode junction capacitors. The new topology is derived with the objective of achieving zero voltage switching (ZVS) turn on of the main switch. Instead of adding extra active clamp zero voltage transition (ZVT) path at the switching node, the proposed topology augments the auxiliary ZVT path to the switching diode path. This is achieved by replacing the switching diodes with synchronous switches. The new topology can achieve soft switching for all the switches and alleviate the EMI issue. All the diodes achieve zero current switching (ZCS) turn off without reverse recovery. Auxiliary switches have ZCS turn on and ZVS turn off, and the main switches have ZVS turn on. The soft-switching SIBC also reduces the conduction loss in the switching diodes. A numerical simulation in PLECS and a prototype hardware are built corresponding to a micro-inverter application with 100 kHz switching frequency. Peak power conversion efficiency of 94.76% is achieved in the hardware prototype with Si devices. [ABSTRACT FROM PUBLISHER]

The control loop stability in boost converters operating in continuous conduction mode has been restricted due to its nonminimum phase nature: the presence of a positive zero (right-half plane zero) in the control to output voltage transfer function. This paper proposes a method to mitigate the effect of the zero on the control loop by shifting the position of the zero to the left-half plane and hence leading to increased stability for the control loop of the boost converter. Superior performance of the proposed method has been clearly demonstrated using simulation and experimental results. [ABSTRACT FROM PUBLISHER]

As more circuit functions are integrated within a single die or small integrated package, the number of electromagnetic interference (EMI) problems caused by dc–dc converters is growing. In this paper, the dominant electromagnetic emission source on the dc–dc converter is identified by analyzing the power spectrum of the nodes. The noise scanner method is applied to a packaged single-chip prototype dc–dc converter. The results show that the dominant source of electromagnetic emission is the switching node of the converter, not the output node. The frequency hopping technique (FHT) is applied to the dc–dc converter to reduce the emission at the switching node, and its effectiveness is analyzed mathematically and experimentally. The mathematical model of FHTs is proposed to analyze its effectiveness in reducing EMI, and the optimal design using the FHT and dead-time control is fabricated with 0.18- \mu \textm CMOS technology. The measured power spectrum reduction by using the optimal FHT design and dead-time control at the switching node is 16 dB. The EMI reduction amount of the proposed design measured by the IC-stripline method is 12.6 dB at the fundamental switching frequency. [ABSTRACT FROM PUBLISHER]

This paper presents a variable switching point predictive current control (VSP $^2$CC) for the quasi-Z-source inverter (qZSI). The proposed VSP $^2$CC aims to remove the output current error on the ac side, as well as the inductor current and capacitor voltage errors of the quasi-Z-source network on the dc side of the converter. Unlike the previously presented direct model predictive control (MPC) strategies for the qZSI, the proposed control scheme can directly apply the switching signals not only at the discrete time instants, but at any time instant within the sampling interval. Consequently, the shoot-through state can be applied for a shorter time than the sampling interval, resulting in lower output and inductor currents ripples. Experimental results based on field programmable gate array are provided to verify the effectiveness of the introduced control method. As it is shown, the proposed method leads to lower inductor current ripples and less output current total harmonic distortion when compared with the conventional direct MPC. [ABSTRACT FROM AUTHOR]

This paper describes the development of a new buck cascaded buck–boost power factor correction (PFC) converter of 2 kW with a soft-switching technique. For its wide range of input voltage, it operates in both buck and boost modes. The parameters are properly selected to endure voltage and current stress in all operating ranges. In addition, the electromagnetic interference (EMI) filter is used to reduce the EMI noise and guarantee continuous input current in buck operation. Moreover, the zero-voltage-transient pulse-width-modulation (ZVT-PWM) method is applied to improve the overall efficiency of the converter. The performance of the proposed PFC converter with the widest range of input voltage is evaluated by the hardware experimental test including harmonics analysis based on the International Electrotechnical Commission standard in all operating ranges. Also, the variations of power factor are theoretically analyzed in both buck and boost modes to determine the widest input range of the proposed PFC converter of 2 kW with an EMI filter. These are strongly required to commercialize it in practice. Finally, the efficiency of proposed PFC converter is compared with that of a conventional buck cascaded buck–boost PFC converter under various conditions. [ABSTRACT FROM PUBLISHER]

In this paper, a new topology of the class E power amplifier (PA) is proposed. The output circuit in the proposed PA is different from that in the conventional class E PA. The conventional output circuit of class E PA consists of shunt capacitor, resonant capacitor, resonant inductor, and shifting inductor. An additional shunt capacitance is added between the resonant capacitance and the shifting inductor to shape the reduced switch voltage. The peak switch voltage of the proposed class E PA is approximately 78% of that of the conventional one, which shows a reduction in peak switch voltage. The lower peak switch voltage reduces the breakdown voltage of the active device. Also, the proposed structure can introduce a new family of switching PAs with interesting specifications. Several values of switch voltage reduction and output power capability could be achieved by varying the circuit elements. Zero voltage and zero derivative switching conditions are achieved in the switch voltage of the designed circuit. The simulation of the proposed circuit is performed using PSpice software. For verification, the presented PA is fabricated and measured. [ABSTRACT FROM PUBLISHER]

ZSVM1, ZSVM2, and ZSVM6 are three traditional space vector modulation (SVM) strategies for three-phase Z-source inverter. The shoot-through times of ZSVM1, ZSVM2, and ZSVM6 are divided into two equal parts, four equal parts, and six equal parts, respectively. Although these control strategies are easy to be implemented in program, their inductor current ripples are not optimized, causing large current ripple. This paper proposes new SVM strategies, named ZSVMD6 and ZSVMD1, for reducing inductor current ripples of Z-source inverter. The principle of volt–second balance is used in the proposed strategies to divide shoot-through times in real time. So every divided shoot-through time is not equal, and changing in real time. The divided shoot-through time can ensure that the sum of the inductor charging current ripple and discharging current ripple is zero at each time, therefore reducing the inductor current ripples. The derivation details of the proposed strategies are given. The inductor current ripples of the proposed strategies and traditional ones are compared and analyzed. Simulation and experiment results show that the inductor current ripples of the proposed strategies are much lower than that of the traditional ones, verifying the effectiveness of the proposed strategies. [ABSTRACT FROM PUBLISHER]

In this paper, a soft-switching topology is proposed for the bidirectional dc–dc converter. In order to achieve soft-switching conditions, the auxiliary circuits including a small inductor and two capacitors are introduced to the bidirectional dc–dc converter. By generating and keeping a recycle current in the auxiliary circuits, the proposed topology can provide soft-switching conditions for both switches of the bidirectional dc–dc converter in fixed frequency control application. Meanwhile, no auxiliary switches are introduced. Due to the existence of the auxiliary circuits, the proposed topology can also reduce the current ripple in the main inductor. Based on this soft-switching method, a family of bidirectional soft-switching dc–dc topologies is derived. These topologies have the similar structures and the same characteristics. The topology deduction, operating principles, and design guidelines are presented in detail. Finally, an experimental prototype is built to verify the analysis and characteristics of the proposed topologies. [ABSTRACT FROM PUBLISHER]

This paper proposes an isolated single-ended primary-inductor converter (SEPIC) dc–dc converter with ripple-free input current and lossless snubber. The proposed converter is based on a conventional isolated SEPIC converter to enable electrical isolation and high voltage gain using a coupled inductor. The input current ripple is significantly reduced by utilizing an auxiliary circuit that also functions as a lossless snubber circuit with an additional diode. Moreover, the maximum switch voltage stress is clamped to a low voltage by the snubber circuit. Therefore, a low voltage rating mosfet that has low $R_{{\rm{DS(on)}}}$ can be utilized as a main switch device. Hence, the total power efficiency is improved. Experimental results from a 100 W prototype, which are presented to verify the theoretic analysis and performance of the proposed converter. [ABSTRACT FROM PUBLISHER]