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This issue of the IEEE Journal of Solid-State Circuits (JSSC) includes some of the highlights of the best papers from the 2011 Asian Solid-State Circuits Conference (A-SSCC), which was held at the Ramada Plaza Jeju Hotel, in Jeju, Korea, on November 14-16, 2011. The A-SSCC is one of the four conferences fully sponsored by the IEEE Solid-State Circuits Society, and this was its seventh appearance since its inauguration in 2005 in Taiwan. Following the past six successful A-SSCCs, this conference has been recognized as a prestigious technical event in the IC design field. The theme of the 2011 A-SSCC was "Integrated Circuits for Sustainable Future." Motivated by pursuing a quality life, intelligent electronics designed to enable healthy living and sustainable environment are playing increasingly important roles. This conference theme is a testimony of our - the IC design communities' - efforts in making the world a better place to be. The conference received 270 manuscript submissions from 25 countries, ofwhich 98 paperswere accepted after rigorous review process. After the conference, the technical program committee selected 15 outstanding papers for this JSSC Special Section. These papers contain full-length materials which describe the presented works in more detail than they were in the conference proceedings. These 15 papers include 6 analog and data converter papers, 6 wireline and wireless/RF papers, and 3 digital and SoC papers. [ABSTRACT FROM PUBLISHER]

Mobile, wearable, and Internet-of-Things (IOT) electronic systems are typically powered by a single-cell lithium-ion (Li-ion) battery. Increasing demand for battery life and the constraint of the overall platform size impose an emerging desire for an efficient and compact power conversion stage that can directly deliver power from the battery, which ranges from 3.2 to 4.2 V, to the supplies of application/communication processors in the range of 1 V. The switched capacitor (SC) converter, though promising in some ways for this application, is inefficient at voltage regulation and is limited in capacitor utilization. This paper presents a hybrid dc–dc converter topology that eliminates charge sharing losses with a small inductor. The necessary inductance can be realized by PCB traces, which shows the potential for a compact system-in-package (SiP) solution. The designed converter is implemented in Texas Instruments’ 0.15- $\mu \text{m}$ CMOS process with a nominal 3:1 conversion ratio. It supports a 3.2–4.2-V input voltage with a continuous output regulation of 0.8–1.5 V. The peak efficiency is 87.2% with 83.4% efficiency at a power density of 0.46 W/mm2. This paper also presents an effective methodology of developing the large-signal model and small-signal dynamics for the generalized N:1 converter topology. A tight load line-based controller is integrated into the designed chip and experimentally verified with a transient performance of 50-mV voltage overshoot/undershoot under 400-mA on-die load step. [ABSTRACT FROM AUTHOR]

This paper proposes a novel emulation system for emulating the power system in the fuel cell electric vehicle. The major purpose of the proposed emulation system is to test the dc–dc converter between the fuel cell and high-voltage powertrain. The bidirectional buck–boost type dc–dc converter is applied in the emulation system as the basic elements. A modularized approach is presented for easily scaling up and down the power level of the emulation system. Meanwhile, an energy loop structure is implemented in the proposed emulation system for power capability boosting purpose. Because of the proposed energy loop configuration, the emulation system offers long-term running capability with high power rating without the grid connection. A neutral current control mechanism is applied in this paper to further enhance the long-term testing capability as well as extending the lifespan for the battery packages. The simulation studies are proposed in this paper to validate the control mechanisms of the emulation system. A 10 kW hardware prototype has been built and the experimental tests are presented for validating the functionalities of the emulation system. [ABSTRACT FROM AUTHOR]

An introduction is presented in which the editor discusses various reports within the issue on industrial electronics topics including induction machines, synchronous machines, and power components and power converters.

This paper presents a novel control strategy to significantly reduce the high-frequency transformer loss in a modular solid-state transformer (SST) based converter system. The modular SST design is based on an ac–dc power-electronic building block comprised of an H-bridge at the ac input and a bidirectional soft-switching isolated dc–dc converter with a medium-voltage insulated high-frequency transformer. The ac terminals of input H-bridges are connected in series and directly coupled to the medium-voltage ac line, while the output dc terminals are all connected in parallel at a low voltage. The key innovation described in this paper, without sacrificing the output performance, is the control scheme that reduces core and winding losses associated with the dc–dc resonant stage by turning off the selected dc–dc converters in synchronism with the line voltage. The prototype for the test described in this paper is based on a modular SST where each module is rated at 50 kVA, with a 200 kHz transformer using 1.7 kV silicon carbide discrete mosfets, but the described control concepts are more broadly applicable to similar topologies. [ABSTRACT FROM AUTHOR]

This paper describes a method to provide low-voltage four-wire three-phase power converters with the capability of unbalance estimation as an ancillary service to the main role that they play in the distribution system (distributed generator, energy storage system, drive, etc.). Typically, dedicated grid/load current sensors are needed to effectively comply with unbalance compensation tasks, increasing system cost and reducing reliability. This is due to the difficulties that arise in the extraction of the zero- and negative-voltage components from the voltages at the point of common coupling, such as the inadequate resolution of full-scaled voltage sensors and limited spectral separation. In this paper, the proposed method does not rely on additional sensors to those typically used in voltage-source converters, and in any case, those sensors are limited to the point of connection of the power converter. Impedance estimation only using converter-side current sensors is implemented by adding a high-frequency voltage excitation over the fundamental command. A new model approach is proposed for the real-time extraction of system impedance using a complex-valued compact form. Considering the voltage source at that frequency to be unique in the grid, it will be proved that the impedance and, thus, the resulting negative-sequence current, which is used for unbalance compensation, can be estimated. For the zero sequence, a special arrangement of the converter voltage sensors together with a repetitive controller is used. [ABSTRACT FROM AUTHOR]

IEEE Standard 1547 defines grid connection standards for distributed resources (DRs). This standard sets requirements for harmonic performance, which are particularly relevant when converter-interfaced DRs are considered. Specifically, the standard limits the allowable harmonic current injected by a DR, assuming grid voltage at the point of common coupling (PCC) is harmonic free. In this paper, it is demonstrated, both mathematically and experimentally, that the harmonic current injection of a converter-interfaced DR depends highly on the level of PCC background voltage. This paper presents a mathematical formulation that enables the impact of PCC voltage harmonics on the harmonic current injection of a converter-interfaced DR to be determined via experimental identification of the converters frequency coupling matrix. Experimental tests show that an IEEE 1547-compliant solar inverter with measured total demand distortion (TDD) of 0.66% for an undistorted PCC can produce TDD levels in excess of 20% in the presence of 3% voltage distortion. It is concluded that TDD metrics, as employed in IEEE Standard 1547, provide little insight into the field performance of converter-interfaced DRs when background voltage harmonics are present. Improved FCM-based metrics for assessing the harmonic performance of converter-interfaced DRs in the presence of voltage harmonics are provided. [ABSTRACT FROM PUBLISHER]

Recently, voltage-source converter (VSC)-based high-voltage dc (HVDC) transmission systems have gained more attention. In this paper, a control method for a modular VSC-based HVDC transmission system with high-frequency isolation referred to as high-frequency isolated modular converter is proposed. In the high-frequency isolated modular converter configuration, several floating dc capacitors in all three phases are connected in series, and voltage balancing control of these floating dc capacitors is required. In this paper, an appropriate control structure with the capacitor voltage balancing controller is proposed. The proposed control scheme consists of three layers to control terminal dc bus voltage and balance dc capacitor voltages of each building block. Detailed PSCAD simulation results are presented to evaluate the performance of high-frequency isolated modular converter. Controller hardware-in-the-loop simulation of the high-frequency isolated modular converter is also performed by real-time digital simulator (RTDS), and RTDS results are presented to verify the control structure. Finally, laboratory-scale experimental results are presented to validate the proposed control method. [ABSTRACT FROM PUBLISHER]

The fast development of renewable energies leads to an increase in the power electronics penetration in transmission systems. This is particularly true if one considers a 100% renewable energies power system, where wind and solar photovoltaic energies, which make most of the renewable energies connections today, are connected to the grid through power electronics converters. Because power electronics-based generators and synchronous machines-based generators have very different dynamic behaviours, some approximations usually used to run transient simulations of transmission systems might not be optimal for future grids. The systematic use of the phasor approximation applied to the power lines, implemented in most of the Transient Simulation Programs, is indeed not relevant any more. To avoid the use of Electromagnetic Transient simulations, that are resource-demanding and time-consuming, this paper presents a novel Model Order Reduction technique for large grids with a high penetration of power electronic devices. Compared to the classical phasor approximation, this event-based state residualization approximation allows accurate transient simulations and at the same time an optimal reduction of the number of the system’s state variables depending on the observed variables, the considered events and the tolerated approximation error. [ABSTRACT FROM AUTHOR]

Industrial induction heating (IH) is a key manufacturing process due to its benefits in terms of efficiency, accurate output power control, and high performance. These features have made possible the extension of this technology to a wide range of industries from automotive to aeronautic, domestic, or renewable energies. One of the main challenges still present is the design of a high-performance and cost-effective process for those induction targets with complex geometries exposed to the magnetic field, being the most representative example gears present in most mechanical systems. Usually, in order to optimize the heating process, multifrequency IH systems are used, being often expensive and/or difficult to tune and control. The aim of this paper is, consequently, to propose a family of power converters able to supply the inductor system with two simultaneous frequencies in order to improve the heating process of the induction target. The proposed converter takes advantage of a multiresonant network allowing full control of the output power delivered at each frequency and, at the same time, a compact and cost-effective implementation. The proposed converter is analyzed, designed, and implemented, and experimental verification of its operation is provided in this paper. [ABSTRACT FROM AUTHOR]

This paper presents a Li-ion-compatible fully integrated hybrid dc–dc converter implemented in 28-nm FDSOI. A modified four-level converter is proposed to achieve high efficiency while operating from the 2.8–4.2-V Li-ion battery range by using stacked 1.5-V transistors. In this paper, the proposed driver architecture exploits the internal nodes of the power stage as power/GND rails for drivers, eliminating the need for dedicated power rails, level shifters, or stacked drivers. The proposed converter operates in the discontinuous conduction mode (DCM) and regulates the output with constant ON-time pulse-frequency modulation (PFM), to achieve high efficiency across low load range suitable for wearable/Internet of Things (IoT) applications. The fabricated chip regulates a 0.6–1.2-V output from a 2.8–4.2-V input voltage over an output power range from $10~\mu \textrm {W}$ to 40 mW with 78% peak efficiency, and switching frequency up to 200 MHz. The converter occupies $1.5~\textrm {mm}^{2}$ of on-die area including a pair of 5-nF flying capacitors and a 3-nH inductor. [ABSTRACT FROM AUTHOR]

Voltage source converter (VSC)-based high-voltage direct current (HVDC) transmission systems have attractive advantages compared to classical thyristor-based HVDC transmission systems. However, VSC-based HVDC transmission systems are vulnerable to dc side fault, and expensive dc circuit breakers are required to protect them against dc fault. This paper proposes a control method of a dc fault-resilient VSC which can be protected against dc fault without using expensive dc circuit breakers. In the VSC configuration, several H-bridge modules are connected in cascade, so the voltage balancing control of several floating dc capacitors is required. In this paper, an appropriate control structure with the capacitor voltage balancing controller is proposed. The appropriate control algorithm for dc fault operation and recovery after dc fault is also proposed. PSCAD simulation results are presented to validate the proposed control structure under normal and dc fault operating conditions. Real-time-digital-simulator results are also presented to verify the control structure. [ABSTRACT FROM PUBLISHER]

This paper deals with a hybrid energy source consisting of a proton exchange membrane fuel cell, two storage devices, and a load. Generally, this type of source constitutes of nonisolated dc–dc converters. In order to have galvanic isolation for safety reasons and a high voltage ratio, we introduce another system based on the use of three-port isolated dc–dc converters. The storage device can be either a battery or a supercapacitor. This paper presents a control strategy for the hybrid source and includes a global efficiency analysis of power sharing between modules. The proposed system is validated through different simulation results. Additionally, some experimental results are given for the single module operation. [ABSTRACT FROM AUTHOR]

An introduction is presented in which the editors discusses various papers within the issue on topics including converter circuit, digital-to-phase converter, and transceiver chip that were presented the Asian Solid-State Circuits Conference (A-SSCC) held from November 12–14, 2012 in Japan.

In the rapidly growing field of electrified transportation technology, hybrid electric and electric vehicle (HEV/EV) manufacturers have been placing increasing demands on the designers to improve the efficiency and reduce the costs of vehicle components to sustain a niche in the EV market. To understand the significance and challenges in an efficient and economical drivetrain design, this paper presents a part of an ongoing project that aims at developing a comprehensive study on dc/ac drive motor technology in EV applications. In this paper, a new three-level three-phase matrix converter topology, along with two conventional frequently used three-level three-phase dc/ac converter topologies, namely, diode-clamped and H-bridge converters, are implemented. Furthermore, comprehensive analysis and comparative studies are conducted to examine the performance and efficiency of these converter topologies according to EV design criteria. In addition, experimental investigations are carried out on the aforementioned converter configurations to help EV designers choose the most suitable converter topology. [ABSTRACT FROM PUBLISHER]

This paper provides a theoretical and experimental discussion on a modular multilevel triple-star bridge-cell converter with focus on mitigating the capacitor-voltage fluctuation contained in each bridge cell. A new control method proposed in this paper is characterized by properly superimposing both common-mode voltage and circulating currents in the whole speed range. Moreover, this paper optimizes the amplitude and frequency of the superimposed common-mode voltage on the basis of theoretical analysis, thus resulting in minimizing the voltage fluctuation. The optimized control method makes both voltage fluctuation and cluster-current amplitude smaller than do the existing methods. Experimental waveforms obtained from a three-phase downscaled system using a 370-V, 15-kW, 75-Hz, six-pole, permanent-magnet synchronous motor verify good start-up performance from a standstill to the rated speed, keeping both capacitor-voltage and cluster current within acceptable levels. [ABSTRACT FROM AUTHOR]

This paper proposes a novel open-winding brushless doubly-fed reluctance generator (OW-BDFRG) with dual two-level converters in order to reduce the converter rating and switching frequency for large-scale wind turbine applications. The new converter topology is equivalent to a three-level converter directly connected to the control winding of typical BDFRG. The OW-BDFRG system with this topology structure requires lower converter rating and switching frequency, and has a more flexible control mode, better operation performance, and fault redundancy capability. For the OW-BDFRG, this paper also proposes a new control scheme combining direct power control (DPC) with sliding mode variable structure (SMVS) control to implement the power tracking. The voltage-vector switching table of DPC is redesigned according to the error signals of active and reactive powers of the power winding, as well as the sector location of control winding flux. The active and reactive powers of the OW-BDFRG can be directly decoupled and independently controlled by properly selecting the switching voltage vectors. The novelty of this paper lies in an OW-BDFRG topology driven by dual two-level converters to improve the system characteristics, and the use of SMVS control to improve the DPC accuracy and robustness to parameter variations. Finally, the effectiveness of the proposed system is verified through simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This paper presents a 16-core voltage-stacked system with adaptive frequency clocking (AFClk) and a fully integrated voltage regulator that demonstrates efficient on-chip power delivery for multicore systems. Voltage stacking alleviates power delivery inefficiencies due to off-chip parasitics but adds complexity to combat internal voltage noise. To address the corresponding issue of internal voltage noise, the system utilizes an AFClk scheme with an efficient switched-capacitor dc–dc converter to mitigate noise on the stack layers and to improve system performance and efficiency. Experimental results demonstrate robust voltage noise mitigation as well as the potential of voltage stacking as a highly efficient power delivery scheme. This paper also illustrates that augmenting the hardware techniques with intelligent workload allocation that exploits the inherent properties of voltage stacking can preemptively reduce the interlayer activity mismatch and improve system efficiency. [ABSTRACT FROM PUBLISHER]

The delta-connected cascaded H-bridge converter has been applied to compensate flicker and unbalance load to meet power quality requirement. Based on the detailed power analysis, this paper presents a dc capacitor voltage-balancing technique for the converter. This paper also proposes a current limit control technique to avoid overstressing the power semiconductor devices of the converter. The control techniques in this paper are verified in a 220-V, 1-kVA laboratory test bench. [ABSTRACT FROM PUBLISHER]

This paper proposes an input voltage sensorless control algorithm for three-phase active boost rectifiers. Using this approach, the input ac-phase voltages can be accurately estimated from the fluctuations of other measured state variables and preceding switching state information from converter dynamics. Furthermore, the proposed control strategy reduces the input current harmonics of an ac–dc three-phase boost power factor correction (PFC) converter by injecting an additional common-mode duty ratio term to the feedback controllers’ outputs. This additional duty compensation term cancels the unwanted input harmonics, caused by the floating potential between ac source neutral and dc link negative, without requiring any access to the neutral point. A 6-kW (continuous power)/10-kW (peak power) three-phase boost PFC prototype using SiC-based semiconductor switching devices is designed and developed to validate the proposed control algorithm. The experimental results show that an input power factor of 0.999 with a conversion efficiency of 98.3%, total harmonic distortion as low as 4%, and a tightly regulated dc-link voltage with 1% ripple can be achieved. [ABSTRACT FROM PUBLISHER]

This paper presents the flexible dc capacitor voltages balancing control method for star-connected cascaded H-bridge converters. In this paper, the power flows are analyzed by investigating all the converter's control freedoms. Based on the analyses, users can accomplish the dc capacitor voltage balancing with both negative-sequence current and zero-sequence voltage. These two kinds of control options are further integrated together with the defined weighting factor $K$. The low-voltage ride-through operation of a proposed control method is also discussed in this paper. The control method is verified with a 220-V 1-kVA static synchronous compensators based on the star-connected cascaded H-bridge converters, and the experimental test results show that all the dc voltages are well regulated at the commanded value with different weighting factor $K$. [ABSTRACT FROM AUTHOR]

A constant on-time (COT) controller for dc converters has received much attention recently because of its unique feature of high light-load conversion efficiency. In this paper, a control model is developed for the boost converters with the current-mode COT controller. Models are developed for predicting the loop stability and the step-load transient response. Based on the model, a compensation design is proposed to achieve desired stability margin and step-load transient response. Simulations and experiments are used to verify the model. [ABSTRACT FROM AUTHOR]

This paper presents a hybrid supply modulator (SM) with a comprehensive analysis of receiver (RX) band noise in an envelope tracking power amplifier (ET-PA). The designed SM supports both ET mode and average power tracking (APT) mode depending on the PA output power level. In the APT mode, an integrated buck-boost (BB) converter with hysteretic control generates dc supply voltage and its average switching frequency ranges from 1 to 2 MHz. In the ET mode, the bandwidth of SM is determined by a linear amplifier, which has about 30 MHz of signal bandwidth. To improve the ET efficiency, an ac coupling capacitor, with an adaptive offset control, and scaled linear supply are used. The scaled linear supply is provided by the BB converter. To lower the output noise of the SM, a parallel class-AB output buffer and resonance frequency tuning schemes are applied in this paper. For long term evolution 10 MHz with quadrature phase shift keying modulation and 5.8 dB peak-to-average power ratio, the designed SM achieves 82% efficiency at 800 mW output power with a fixed 8 $\Omega $ resistor. Adapting the proposed SM to a PA, a 10 dB ET operation dynamic range is achieved while achieving a power added efficiency of 42.6% at 27 dBm PA output power. The measured SM output noise is −137 dBm/Hz at 95 MHz offset with the PA load, and the PA RX band noise is −124 dBm/Hz, which is dominated by the stand-alone PA itself. The chip is implemented with a 130 nm CMOS process and the die size is 5.0 mm2. [ABSTRACT FROM PUBLISHER]

A phase-locked loop (PLL) is commonly used in grid-connected power converter for synchronization. A single input single output (SISO) linear model of PLL with the phase angle of the point of common coupling (PCC) voltage as input and the estimated phase angle as the output is generally used in the PLL analysis and design. However, an undesirable coupling between the magnitude and phase of the input voltage is present when a filtering stage is incorporated before the control loop, which a SISO model cannot capture, and could result in a significant disturbance in the PLL estimated phase during grid faults. This paper proposes a generalized multi-input multi-output (MIMO) linear model that captures the complete PLL dynamics during symmetrical faults for a PLL equipped with any prefilter. Furthermore, a compensation method that decouples the magnitude dynamics of the input voltage from the phase dynamics is proposed in this paper. The proposed compensation improves the PLL's phase tracking performance by ensuring that the prefiltered PLL acts only on the PCC voltage phase changes. A vital application of the proposed compensation method for PLL is during a grid fault case, wherein the converters are expected to contribute to the fault current, which requires an accurate measurement of the PCC voltage phase. The compensation method's effectiveness is demonstrated using power hardware in the loop simulation of a hardware voltage source converter interfaced to a distribution system simulated in real-time. [ABSTRACT FROM AUTHOR]

This paper investigates the stray magnetic and electric fields of a multifunctional power converter operation while connected to a system involving an induction motor. The impacts of the switching techniques on the radiated fields of the converter were studied for the purpose of electromagnetic interference (EMI) evaluation and fault detection. This was achieved through the inspection of the magnetic and electric fields. Two of the most commonly used switching techniques were implemented through a hardware-in-the-loop system studied in terms of the stray. Various fault and failure conditions were applied to the converter to monitor the converter condition through the stray field observations. A coil and a rod antenna were connected to an EMI receiver to capture the fields. The fields were employed in further analyses. The harmonics and interharmonics of the stray fields were studied in detail for system monitoring purposes. The importance of this paper is to enable the evaluation of the optimum switching pattern for lower EMI field levels from the converter and for condition monitoring and fault diagnosis purposes. [ABSTRACT FROM AUTHOR]

In this paper, quarter-turn planar transformer structure is proposed and implemented in an LLC resonant converter for server power supply applications. Main power losses of high-frequency resonant converters are secondary-side winding loss and transformer core loss. Conventional transformer winding structures limit the minimum number of turns on the primary and secondary sides, such that the core size and secondary-side conduction loss cannot be reduced by increasing the frequency. To achieve high efficiency and high power density, a fractional-turn transformer structure can reduce core volume and conduction loss in the windings. The optimized transformer design also enables the turn ratio of the fractional-turn to achieve normal coupling of primary and secondary sides without generating flux imbalance. The effects of different fractional-turn windings on efficiency are examined, and Maxwell simulation results are used to verify the structure and operation of the planar transformer. The printed circuit board layout is analyzed using Q3D Extractor to reduce the uneven current generated by parasitic components on the secondary-side windings. Wide-bandgap switches are utilized to implement a resonant converter with 1-MHz operating frequency, 380-V input voltage, 12-V output voltage, 1-kW output power, 37.6-W/cm3 power density, and 97% maximum efficiency. [ABSTRACT FROM AUTHOR]

Active magnetic bearing is a core technology for high-speed rotational machines. Power electronics converter as the active magnetic bearing drive is the actuation unit and its topology highly impacts the performance of the bearing system. This paper introduces the progress of topology of active magnetic bearing drive. The initial topology of an H-bridge does not sufficiently utilize the power electronics devices. The topology with half-bridge and shared phase-leg has been proposed as the fundamental topology. In this paper, two approaches of novel magnetic bearing drive topology modification have been developed on the basis of the fundamental topology. In the first approach, central phase-leg for multiaxis magnetic bearing drive can be further shared and the power electronic devices can be globally optimized in the whole system. Further, a topology with current in the reverse direction can reduce the central phase-leg current rating and power losses. In the second approach, fault-tolerant magnetic bearing drive topology has been developed on the basis of the fundamental topology, too. It can ride-through the open-circuit fault of power electronics switch-in operation and keep levitation for the magnetic bearing. The series work of novel topologies can improve the performance of an active magnetic bearing system in application. [ABSTRACT FROM AUTHOR]

Pole-phase modulation (PPM) is one of the effective speed and torque control techniques for multiphase induction motor (MIM) drives. Performance of the drive in low-pole high-speed mode for steady run is good even with two-level voltage excitation due to the inherent advantages of high phase number. The drive operation under high-pole high-torque starting mode suffers degradation in performance due to reduction in phase number in a way to increase number of poles. Extending conventional multilevel converter topologies for performance improvement of MIMs increases the device count and control complexity considerably. In this paper, a simple technique to generate multilevel voltage across the phase of a pole-phase-modulated induction motor (PPM IM), for improving the performance of the drive under high-pole operation is presented. The technique requires least changes in the control scheme and no additional switches for the power circuit. Exploiting the advantages of equal voltage profile coils (EVPCs) for carrier phase-shifted PWM control is the main focus of this paper. In addition, generalization of PPM is revisited in this paper to add a small constraint on the pole ratio to avoid unequal pole width for some pole-phase combinations. The effectiveness of the proposed scheme is shown through simulation with finite-element method (FEM) model of nine-phase squirrel cage induction motor and two-level nine-phase inverter cosimulated in Ansys Maxwell two-dimensional (2-D) and Simplorer environment. Experimental validation is also done on 5 hp nine-phase two-level induction motor drive controlled using Spartan6 FPGA board. [ABSTRACT FROM AUTHOR]

This paper presents real-time diagnosis for open-circuited (O-C) and unbalance faults in power electronic converters (PECs) connected to residential small wind systems grid-tied. The spectrum analysis along with the dc components of the voltage and current measurements available in the converter is utilized for the O-C fault detection, classification and localization of the power switching devices in the PEC, as well as the identification of the unbalance input voltage to the converter. The proposed methodologies in this paper require much fewer inputs compared to the previous researches; therefore, they avoid any additional sensors or hardware which include further costs and expenses on such systems. The experimental evaluations for the proposed algorithms are provided and demonstrate the effectiveness and the robustness of the proposed diagnostic algorithms in this paper. The PEC under study consists of three main subsystems: uncontrolled three-phase rectifier, boost chopper, and single-phase inverter. [ABSTRACT FROM PUBLISHER]

This paper develops a simplified phasor model for predicting harmonics present at the point of common coupling between a voltage-source power converter and the utility network. It employs the frequency coupling matrix (FCM) modeling technique. The FCM is experimentally determined without requiring access to converter internal details, such as control and output filter parameters, which are generally not available for converters used in distributed generation systems. Experimental measurements are conducted on a commercially available two-stage, three phase, grid-tied photovoltaic inverter to assess the accuracy of experimentally determined FCMs to predict the harmonic behavior of grid-connected converters. This paper considers two grid conditions for the experimental analysis: 1) when the grid is stiff and contains only background voltage harmonics and 2) when the grid contains harmonic grid impedances as well as background voltage harmonics. In all cases, a close match between the results predicted by the FCM approach and experimental measurements is achieved, thus demonstrating the practical viability of using experimentally determined FCM models for harmonic predictions. [ABSTRACT FROM PUBLISHER]

The term Virtual Synchronous Machine (VSM) commonly refers to the emulation of synchronous machines operation by using power electronics converters. However, a wider application of this control technique is still pending on further refinement of its design aspects and digital implementation. In this paper, a systematic approach to design the VSM parameters is introduced. First, a simplified third-order small-signal model of a VSM based on the conventional model of synchronous generators is developed. Unlike the existing works published in literature, the proposed model takes into account the effects of inductive and resistive weak grids. The model is then used to design the controller parameters by appropriately placing the poles of the closed-loop system. VSM robustness is studied for weak grids dominated by either inductance or resistance, and the aspects of digital control implementation are addressed. All the control system features and improvements were tested on a 15 kW prototype of a battery-supported VSM connected to a weak grid. [ABSTRACT FROM AUTHOR]

In this paper, a methodology is presented to derive the small-signal admittance of a converter-based control system in the $pn$ -frame. Such a methodology makes use of a set of derived equations that link the $qd$ -frame small-signal admittance data to the corresponding $pn$ -frame small-signal admittance terms. Compared to existing results providing the $pn$ -frame small-signal impedance of a grid-connected converter, the presented technique allows a calculation of the $pn$ -frame small-signal admittance (or impedance) when additional elements are present in the controller, as in many practical designs. The presented technique is therefore generic and provides a systematic way to calculate the $pn$ -frame admittance regardless of the used converter control scheme. In this study, the method has been applied to assess how different parts of the controller affect the $pn$ -frame admittance terms and, in particular, the cross-coupling that exists between its positive and negative sequence terms. Thereby, the results of the proposed methodology have been used to study the impact of the negative sequence current compensator on the stability performance of a grid-connected converter. Experimental tests using a real hardware setup are used to support the obtained results. [ABSTRACT FROM AUTHOR]

High efficiency and low cost power converters for interfacing energy storage have become critical in renewable energy systems. In this paper, a fractional charging converter (FCC) is proposed to reduce power rating as well as cost of the dc–dc converter for hydrogen production by alkaline electrolyzer cells. The FCC configuration only processes the partial power resulting from the voltage difference between the source and the energy storage element.  Moreover, the converter employed in such configuration can be either isolated or non-isolated, which simplifies topology selection. An analysis and comparison of two dc–dc topologies using a high-frequency transformer based on component stress factor (CSF) is performed to determine the optimal solution for the evaluated application. Based on the results of the CSF analysis, and due to its capability of handling wide input voltage, the isolated full-bridge boost converter is designed, built, and tested. Experimental results prove the feasibility of the fractional charging configuration with a reduction of 80% of the power rating compared to the traditional interconnection, which implies a reduction in cost, weight, and an increase in efficiency. The converter's maximum voltage gain achieved is 25 and the highest measured system efficiency is 98.2%. [ABSTRACT FROM AUTHOR]

The capacitance of sub-module capacitor has a great impact on the cost, size, and operation of the modular multi-level converter (MMC). However, the capacitance selected by the existing methods does not always meet the requirement in practice. To find out the reasons for this improper selection, the existing selection methods are analyzed in this paper. Based on the analysis, a new capacitance-selection method is proposed. In the new method, the problems of the existing methods are solved, and the calculation of capacitor voltage is based on a proposed capacitor-voltage model whose calculation error can be smaller than 0.1%. Furthermore, the Secant Method is used in the capacitance selection to quickly calculate the required capacitance. The new capacitance-selection method can be applicable to the MMC not having a circular operating region. In addition, this paper found that the capacitor voltage and the capacitor-voltage ripple reach their maximum values when the power-factor angles of the MMC are –π/2 and π/2, respectively, and the dc component in the capacitor voltage changes according to the operating condition of the MMC. Finally, the proposed selection method and theoretical analyses are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

The continuous increasing share of power-converter-based renewable energies weakens the power system inertia. The lack of inertia becomes a main challenge to small-scale modern power systems in terms of control and stability. To alleviate adverse effects from inertia reductions, e.g., undesirable load shedding and cascading failures, three-phase grid-connected power converters should provide virtual inertia upon system demands. This can be achieved by directly linking the grid frequency and voltage references of dc-link capacitors/ultracapacitors. This paper reveals that the virtual inertia control may possibly induce instabilities to the power converters under weak grid conditions, which is caused by the coupling between the d- and q-axes as well as the inherent differential operator introduced by the virtual inertia control. To tackle this instability issue, this paper proposes a modified virtual inertia control to mitigate the differential effect, and thus, alleviating the coupling effect to a great extent. Experimental verifications are provided, which demonstrate the effectiveness of the proposed control in stabilizing three-phase grid-connected power converters for inertia emulation even when connected to the weak grid. [ABSTRACT FROM AUTHOR]

One of the next challenges for modular multilevel converters (MMCs) is how to the size the critical components to their limits with reduced design margins, while at the same time fulfilling the reliability target. To do it confidently, better thermal modeling with quantitative uncertainty analysis is necessary to support the decision-making during the product design stage. Regarding the conversion of long-term mission profiles into thermal profiles for reliability evaluation, this paper proposes a computationally efficient thermal modeling method for insulated-gate bipolar transistor modules in MMCs. The proposed method considers the impact of the inherent thermal unbalance and has minimum computation with quantitative error analysis. Finally, both simulations and experiments have verified the theoretical results. [ABSTRACT FROM AUTHOR]

In this paper, a single-inductor dual-output (SIDO) dc–dc converter is proposed. The significant feature of the proposed converter is feeding a constant power load in low-voltage side (LVS) port, where even feeding a variable load at LVS does not have any cross regulation to high-voltage side port with the desired approximation. Magnificently, both merits are obtained in open-loop manner, which is an outstanding characteristic in comparison with that of the existed converters. In this paper, soft commutation and soft switching of switches and diodes are investigated along with the aforementioned main novelty. Moreover, detailed theoretical analyses of the proposed SIDO dc–dc converter in continuous conduction mode are presented besides the comparisons with some other structures. Finally, theoretical analyses are verified through a 1500 W experimental prototype results. [ABSTRACT FROM AUTHOR]

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn-on of part power switch and soft turn-off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

This paper proposes an “isolated soft switching current fed LCC-T resonant dc–dc converter for PV/fuel cell applications.” This converter is able to achieve zero voltage switching for front-end inverter switches and zero-current switching for voltage doubler diodes. The majority of dc–dc converters have compact capacitive (C) filter in output, but high harmonic currents through transformer makes them bulky. The proposed converter attempts to improve harmonic content through a transformer under wide load and input variations as well as it can significantly reduce required turns ratio of transformer to achieve required output voltage. For the above reasons, the proposed converter can offer better footprints and therefore it can be a potential candidate for PV/fuel cell applications. This paper presents basic operating principal, detailed analysis, control, and design of the proposed converter with the help of an example. This converter operates in two modes, i.e., constant duty cycle mode and constant frequency mode, depending on load demand, and is explained through operating curves. Finally, experimental results are included for justifying the proposed theory. [ABSTRACT FROM AUTHOR]

Reduced switch active phase converters (APC) are cost-effective solutions for running three-phase loads from single-phase grids. This paper proposes a novel auxiliary-capacitor-based APC (AC-APC) for this application. The combination of the topological location of the auxiliary capacitor and the control of the AC-APC reduces current stress on the semiconductor devices. In this paper, a selection criterion for the optimal auxiliary capacitor value is formulated to reduce the device currents in such a way that the overall efficiency is enhanced. This paper presents a comparative analysis of converter volt-ampere (VA) rating and device power loss for conventional H-bridge active front-end and inverter-based topology, APC, and AC-APC. To evaluate the efficacy of the proposed AC-APC, an experimental study is conducted on the APC and the AC-APC feeding a 3-hp three-phase induction motor. At a full load of $\text{2.5}\,\text{kW}$ and $\text{0.8 } \text{power factor}$ , the measured maximum efficiency of the AC-APC is $2\%$ higher than that of the APC. Analytical evaluation of converter currents and device power loss are in close agreement with experimental observations. [ABSTRACT FROM AUTHOR]

A dual active bridge (DAB) converter promises high power density. The highest power transfer can be achieved by phase shift modulation inside the zero-voltage switching boundaries. This paper analyzes the transients of DAB commutation. Although commutation has been previously analyzed for DAB with the linear turn-off snubbers, in today's industries, the output capacitors of the switches are utilized as the snubberless approach. The presence of these time-variant capacitors leads to nonlinear equations. This paper applies a piecewise linear model for analyzing the commutation of the ac-link current into the switches. The study is inspired by practical experiments, and the results are experimentally verified. [ABSTRACT FROM PUBLISHER]

Peak-current-mode (PCM) control was published first time in open literature in 1976. The observed peculiar behavior caused by the application of PCM control in a power electronic converter have fascinated the researchers to attempting to capture the dynamics associated to it. It is commonly assumed that the peculiar phenomena originate from the sampling process in the PCM control. A resistor is usually connected as a load, when modeling the converter dynamics and during the frequency-response measurements. The load resistor will actually dominate the frequency responses and hide the real dynamics associated to PCM control. Other measurement problems will arise from the nonmodeled circuit elements dominating, especially, the high-frequency dynamic behavior of the converters. As a consequence of these problems, the PCM models are not usually properly validated. The investigations, in this paper, show the following: 1) the PCM models have to be accurate also at the low frequencies for ensuring, for example, stable design of output-current-feedback-controlled converters; 2) the high low-frequency accuracy can be obtained only by means of duty-ratio gain becoming infinite at the mode limit; 3) the high-frequency accuracy of the PCM models can be obtained by means of different high-frequency extensions; 4) the key for the PCM modeling lies in the proper duty-ratio constraints; and 5) the high-frequency magnitude and phase behaviors are caused by the second-harmonic-mode operation of the converter due to the frequency-response-measurement injection signal. The main objective of this paper is to show that such a modeling technique, which fully matches the aforementioned criteria, has been developed already in early 1990s and later elaborated for more a general form. Validation of the dynamic models is performed by simulation, where the converter and its operational environment are perfectly known. The load-resistor effect is removed computationally for performing the complete validation. A PCM-controlled buck converter is used as an example. [ABSTRACT FROM AUTHOR]

The development of voltage-source-converter (VSC)-based high-voltage direct current (HVDC) systems has increased significantly. However, the implementation of VSC-HVDC systems is limited for lacking fast, low-loss, and reliable circuit breakers. Hybrid dc circuit breakers (DCCBs) may help to improve this situation. In this paper, an efficient modular multilevel converter (MMC) HVDC system model based on the Zhangbei–Beijing \pm \text500\,\textkV bipolar MMC-HVDC transmission (overhead line) project is first established. Then, the system transient characteristics are investigated involving permanent line-to-ground faults (LGFs), permanent short-circuit faults (SCFs), temporary LGFs, and temporary SCFs with either ac circuit breakers (ACCBs) or DCCBs in service. Finally, the performances, including the fault clearance and recovery, comparison of DCCBs with two different breaking methods, and comparison of ACCBs and DCCBs, in the MMC-HVDC system are presented. This paper provides a deep understanding of LGF and SCF in the MMC-HVDC systems, operation of DCCB, and comparison of faults clearance and recovery under these faults conditions using ACCB and DCCB, respectively. Results also benefit the application of the DCCB and the operation strategies in high-voltage and high-power MMC-HVDC systems with overhead lines. [ABSTRACT FROM AUTHOR]

With the power of high-orbit satellites now reaching dozens of kilowatts, solar energy sources play an important role in nonterrestrial applications. However, most of the existing high-power solar array simulators (SASs) are designed for simulating energy sources in terrestrial applications, and may not have suitable dynamic performance for nonterrestrial applications. This paper proposes a design for a high-power high-dynamic-performance space solar array simulator (SSAS) system, which combines a linear power stage unit and a multilevel bus tracking converter unit, in order to achieve a fast step-switching capability and high-power-handling capacity. In this paper, we consider the SSAS power system as two separate parts: the I–V power curve simulator that uses a linear power stage with 20 linear voltage-controlled current paths in parallel; and the multilevel bus tracking converter unit that provides the variable voltage levels tracking the SSAS output voltage, in order to decrease the power dissipation in the linear power stage. This paper establishes a mathematical model for the multilevel converter under this particular system architecture, and presents the application qualification conditions and system design principles. The proposed 2.4-kW SSAS can react quickly to a load step between the short-circuit and open-circuit states, which are the most challenging working conditions, at a stepping frequency of 3 kHz; this is a superior dynamic performance compared to other similar devices. The experimental results of testing the spacecraft power supply with a shunt regulator architecture demonstrating better performance, when compared to the results from four SAS modular products in parallel. [ABSTRACT FROM AUTHOR]

This paper presents a four-phase buck converter with capacitor-current-sensor (CCS) calibration for load-transient-response optimization that targets the theoretically minimal output-voltage undershoot \Delta V\mathrm {US} , overshoot \Delta V\mathrm {OS} , and settling time tS when large and rapid load-current transients \Delta I\mathrm {load} occur. The proposed CCS calibration calibrates the CCS’ equivalent impedance to emulate a scaled replica of the output capacitor’s impedance Z\mathrm {Co} . Thus, the CCS can accurately sense the output-capacitor current I\mathrm {Co} despite Z\mathrm {Co} variations due to different output voltages, fabrication variations, and printed-circuit-board parasitics. Moreover, a load-transient optimizer is proposed to utilize the accurately sensed I\mathrm {Co} to instantly detect the large and rapid \Delta I\mathrm {load} , and synchronously control the charging and discharging durations of the output inductors in all four phases, resulting in small \Delta V\mathrm {US}/\Delta V\mathrm {OS} and short \texttS . The converter is implemented in a 0.18- \mu \textm CMOS process with 1.93-mm2 chip area. For a 1.8-A/5-ns step-up (step-down) \Delta I\mathrm {load} , the measured \Delta V\mathrm {US} ( \Delta V\mathrm {OS}) and \texttS are 92 mV (75 mV) and 133 ns (110 ns), respectively. Compared with other state-of-the-arts, both the measured \Delta V\mathrm {US} ( \Delta V\mathrm {OS}) and \texttS in this paper are the closest to their respective theoretical limits, i.e., the fastest load-transient response with the smallest \Delta V\mathrm {US} ( \Delta V\mathrm {OS}) and the shortest tS under the same input voltage, output voltage, output inductance, and output capacitance. [ABSTRACT FROM PUBLISHER]

The digital-to-analog converter (DAC) in SAR anolog-to-digital converters (ADCs) is often dominant for both power consumption and linearity. Dedicated switching schemes can save power, but mostly focus on conversion energy, whereas the DAC reset can consume significant energy as well. This paper presents an energy-free DAC reset scheme, “swap to reset,” for charge-redistribution SAR ADCs. It is widely applicable to existing low-power switching schemes. Additionally, to limit complexity while maintaining most of the energy savings, it can be utilized for the MSBs of the DAC only while the LSBs use conventional reset. To demonstrate the scheme, it is applied to the 2 MSBs of a 12-b SAR ADC using a split-monotonic DAC in 65-nm CMOS, resulting in an energy saving of 33% for the DAC or 18% for the whole ADC. Besides the “swap to reset,” a rotation is also applied to the 2 MSBs, hence enhancing the linearity to 88-dB spurious free dynamic range. The SAR ADC operates at 0.8-V power supply and 40 kS/s, achieving an signal to noise and distortion ratio of 64.2 dB and a Figure of Merit of 7.1-fJ/conversion step. [ABSTRACT FROM AUTHOR]

A hybrid switched-capacitor/interleaved boost converter able to provide a high voltage gain and to cancel the input current ripple at a preselected duty cycle was recently presented in the literature. This paper extends that work by proposing an optimized switching strategy for operating conditions at other values of duty cycle. The switching strategy effect on the converter's voltage gain and input current ripple is quantified and compared against the performance under the conventional switching strategy. The approach is validated in the laboratory through hardware prototyping. [ABSTRACT FROM PUBLISHER]

A 12-V motor drive system using an onboard battery is promising in vehicle applications, e.g., to rotate an air pump to adjust its air delivery to the burner, thereby providing autonomous exhaust temperature control for the conventional diesel engine vehicle. The 12-V/1-kW motor drive system proposed in this paper consists of a series-resonant LLC MOSFET full-bridge converter, which provides high-efficiency power transfer by implementing zero voltage switching and boosts the dc bus to $\sim$300 V, and an insulated-gate bipolar transistor inverter, which provides the high-side phase currents to a 1-kW/6000-r/min brushless dc motor (BLDC). This design secures the high efficiency, low cost, and low volume. Meanwhile, with the variable output voltage of this dc/dc converter, this paper realizes a commutation torque-ripple reduction method, which will minimize the mechanical vibration. Experimental results on this prototype system demonstrate that: 1) the LLC dc/dc part efficiency is 97.6% with 92% of the inverter efficiency; and 2) the motor commutation torque ripple is reduced close to zero. [ABSTRACT FROM PUBLISHER]

Power quality is described by voltage fluctuation measures. Voltage fluctuation is understood as “a series of voltage changes or a continuous variation of the rms or peak value of the voltage.” Voltage variation is most often manifested by flicker, which might become obnoxious at a high enough intensity. One of the standard measures of voltage fluctuation is \boldsymbol Pst indicator. One of its major flaws is its limited diagnostic capabilities. Voltage fluctuation indices are the measure, which provides much bigger range of diagnostic capabilities. However, it has not been acknowledged as a standard measure. The initial part of this paper includes the description of the accepted method of reproducing voltage variation. It also presents general characteristics of the \boldsymbol Pst indicator and voltage fluctuation indices. The next part of this paper describes the methods of converting voltage fluctuation indices into \boldsymbol Pst indicator and vice versa. The capability of estimating the \boldsymbol Pst indicator on the basis of the indices has been confirmed. Three examples of measurement results of both these measures in low-voltage (LV) power grids have been presented. These results have proved the connection between the estimated values (on the basis of voltage fluctuation indices) and the results of the \boldsymbol Pst indicator measurements. [ABSTRACT FROM AUTHOR]

As the key equipment of ultra-high-voltage direct-current (UHVDC) transmission systems, the converter valve would bear different forms of overvoltage. Consequently, a wideband model for the $\pm $1100 kV UHVDC converter valve is essential for the converter system to make overvoltage analysis, insulation design, and electromagnetic disturbance prediction. This paper proposed a wideband modeling method for the $\pm $1100 kV converter valve. First, the physics-based wideband model for the key component in the converter valve module is built, of which the parameters could be obtained through genetic algorithm. Second, the parasitic capacitances are obtained through a simplified boundary-element method according to the given structure of the $\pm $1100 kV converter valve. By combining wideband models for key components in the converter valve module and the parasitic capacitances of the valve tower, the integrated wideband model for the converter valve could be obtained. The systematic modelling method proposed in this paper could also be of reference value to the modelling of other large-scale complex high-voltage power-electronic equipment. Finally, the experiments for converter valve module and converter tower are carried out, and the corresponding results justified the effectiveness and correctness of the proposed wideband model for the converter valve tower. [ABSTRACT FROM PUBLISHER]