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Multi-machine, single-inverter induction motor drives are attractive in situations in which all machines are of similar ratings, and operate at approximately the same load torques. The advantages include small size compared to multi-inverter system, lower weight and overall cost. However, field oriented control of such drives is a challenge since no two motors will have exactly the same operating conditions at any time. In general, at least some motors in the system will operate away from perfect field orientation. It is therefore important to analyse their torque dynamics carefully. This paper discusses existing multi-machine field-oriented control methods, and analyses and compares them from the viewpoint of dynamic performance. For this, an analytical framework based on small-signal analysis is developed to compare multi-machine control methods. This analysis is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Accurate modeling of CMOS logic gates for timing and power characterization is a very important task in integrated circuits technology since it facilitates significantly the design phase. Parametric models provide flexibility in determining the circuit performance in various design corners. However, the direct analysis of a complex CMOS gate aiming in an analytical and parametric model is a difficult and cumbersome task. An alternative way to model these gates is by using the equivalent inverter approach. According to this, an inverter with appropriate transistor widths is defined in order to present the same response with the complex gate it models. The challenge with this approach is to propose a simple method to predict the appropriate transistor widths of the equivalent inverter. Then, an analytical model for the CMOS inverter can be used to provide estimates for the complex gates. In this paper, a macro-modeling method is proposed for determining the transistor widths of the equivalent inverter and a technique for providing parametric expressions for these widths in terms of input transition time, output capacitive load, initial transistor width, supply voltage and temperature. A tool is developed to provide timing and power characterizations for the cells of a digital cell library, much faster than conventional numerical circuit simulators. The results prove the efficiency of the equivalent inverter approach in modeling complex gates. [ABSTRACT FROM AUTHOR]

In this paper, a new control strategy for zero-current transition technique is suggested to constant voltage constant frequency sinusoidal PWM inverter. This strategy consists of a resonant arm and auxiliary switches, which are connected to a standard single-phase full-bridge voltage source inverter and also to a proportional integral voltage controller. The main and auxiliary switches can be separately controlled. The suggested strategy is able to reduce switching losses successfully, and also it does not need any snubber circuit. By using appropriate switching algorithms, the strategy can be applied to uninterruptible power supplies, photovoltaic systems and DC/AC inverters as well. In this study, not only the theoretical analysis but the simulations of the suggested strategy have been carried out effectively. From the simulation results, it has been shown that the suggested strategy yields 30% less switching losses and has better performance when compared with the hard switching strategy for the same operating condition, including the conditions of the load and the switching frequency. Eventually, the suggested control scheme verified by the simulation results proves that it can achieve low THD values in addition to less switching losses. [ABSTRACT FROM AUTHOR]

A power distribution system operates most efficiently with voltage deviations along a feeder kept to a minimum and must ensure all voltages remain within specified limits. Recently with the increased integration of photovoltaics, the variable power output has led to increased voltage fluctuations and violation of operating limits. This paper proposes an optimization model based on a recently developed heuristic search method, grey wolf optimization, to coordinate the various distribution controllers. Several different case studies on IEEE 33 and 69 bus test systems modified by including tap changing transformers, capacitors and photovoltaic solar panels are performed. Simulation results are compared to two other heuristic-based optimization methods: harmony search and differential evolution. The simulation results show the effectiveness of the method and indicate the usage of reactive power outputs of PVs facilitates better voltage magnitude profile. [ABSTRACT FROM AUTHOR]

In the paper, Step sinus pulse width modulation (SSPWM) three phase inverter is tested on a nonlinear device which can produce harmonics. There are 12 switches on active and passive cases. On the inverter, operations of switches are provided by arranged SSPWM which can be calculated with similarity rules of triangles. A mathematical model of inverter is obtained with operating characteristics of the switches determined. SSPWM technique is used to control non-linear devices as thyristor and rectifiers which are widely used in electronic systems. So, single phase alternating voltage is converted to direct voltage with rectifier circuit to provide input voltage of inverter. After that, Six switches of common three phase inverter model are connected to six thyristors controlling inputs and outputs of three phase loads so that performance of SSPWM can be investigated on high level harmonic of loads. The inverter load of resistive (R) and inductive (L) are performed at the MATLAB Simulink so that SSPWM technique could be showed the reducing effect of the harmonic on loads. So, SSPWM and SPWM controlling inverter are performed on frequencies. Then, performances of common SPWM and SSPWM running nonlinear loads are compared with results. [ABSTRACT FROM AUTHOR]

In this paper, a new active element called voltage differencing inverting buffered amplifier (VDIBA) is presented. Using single VDIBA and a capacitor, a new resistorless voltage-mode (VM) first-order all-pass filter (APF) is proposed, which provides both inverting and non-inverting outputs at the same configuration simultaneously. The pole frequency of the filter can be electronically controlled by means of bias current of the internal transconductance. No component-matching conditions are required and it has low sensitivity. In addition, the parasitic and loading effects are also investigated. By connecting two newly introduced APFs in open loop a novel second-order APF is proposed. As another application, the proposed VM APF is connected in cascade to a lossy integrator in a closed loop to design a four-phase quadrature oscillator. The theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 CMOS process parameters with ±0.9 V supply voltages. Moreover, the behavior of the proposed VM APF was also experimentally measured using commercially available integrated circuit OPA860 by Texas Instruments. [ABSTRACT FROM AUTHOR]

Abstract  A new operational transconductance amplifier (OTA) builds with CMOS inverters only is proposed in this paper. Simulations with typical BSIM3V3 parameters of a 0.35 μm CMOS process have shown a 3.56 GHz gain-bandwidth product under 2.5 V supply voltage. The corresponding total harmonic distortion is equal to 0.46% for 2 V peak–peak differential output voltage. At the same supply voltage, the circuit can provided at each output a voltage swing of 2.25 V peak–peak. From VDD = 2 V to VDD = 2.5 V the differential transconductance varies from 72 to 108.4 μΩ−1. The corresponding common mode rejection ratio and the total power consumption are always lower than −31 dBc and 800 μW, respectively. Typical application of a biquad filter is proposed to illustrate the circuit capabilities. [ABSTRACT FROM AUTHOR]

The recent increase in the use of speed control of ac induction motor for variable speed drive using pulse width modulation (PWM) inverter is due to the advent of modern power electronic devices and introduction of microprocessors. There are many advantages of using ac induction motor for speed control applications in process and aerospace industries, but due to fast switching of the modern power electronic devices, the parasitic coupling produces undesirable effects. The undesirable effects include radiated and conducted electromagnetic interference (EMI) which adversely affect nearby computers, electronic/electrical instruments and give rise to the flow of bearing current in the induction motor. Due to the flow of bearing current in the induction motor, electrical discharge machining takes place in the inner race of the bearing which reduces the life of the bearing. In high power converters and inverters, the conducted and radiated emissions become a major concern. In this paper, identification of bearing current due to conducted emission, the measurement of bearing current in a modified induction motor and to minimize the bearing current are discussed. The standard current probe, the standard line impedance stabilization network (LISN)), the electronics interface circuits are used to measure high frequency common mode current, bearing current and to minimize the conducted noise from the system. The LISN will prevent the EMI noise entering the system from the supply source by conductive methods, at the same time prevents the EMI generated if any due to PWM, fast switching in the system, will not be allowed to enter the supply line. For comparing the results with Federal Communications Commission (FCC) and Special Committee on Radio Interference (CISPR) standards, the graphs are plotted with frequency Vs, line voltage in dBμV, common mode voltage in dBμ V and the bearing current in dBμ A with out and with minimizing circuits. [ABSTRACT FROM AUTHOR]

Time-domain Electro Magnetic (TEM) systems, are used for remote sensing of conductive mineral deposits buried under the surface of the earth. A low frequency trapezoidal current excitation set-up in an exciter coil loop causes a flux that penetrates deep into the earth. When the excitation is cut off sharply, conductive deposits in the earth carrying flux react by causing eddy current flows within them. The flux produced by such eddy currents is picked up by a sensor coil. By comparing the emf induced in the sensor coil with a priori known emf patterns for mineral deposits, the presence of mineral deposits can be ascertained. The voltage, current and energy levels of the TEM system, require special type of excitation technique. Power converters for such non-standard requirements are not reported in the literature, particularly for TEM applications. This paper introduces TEM systems to the reader and presents the requirements for excitation. A converter topology to meet the requirements, it's analysis, control and performance are presented. Among other alternatives that the authors have attempted, the topology presented features reduced number of passive elements, high voltage gain and low losses. These features enable the sensor head to be operated from the normal low level battery. [ABSTRACT FROM AUTHOR]

Owing to the tremendous advances in the digital technology, and improved reliability and performance of the digital control mechanisms, this paper focuses on design and implementation of digital controller using FPGA-based circuit design approach. The digital controller proposed is designed for series resonant inverter used in DC-DC converter applications. Phase modulation technique is proposed for the realization of digital controller on FPGA. The Series Resonant Converter (SRC) is considered in this paper as a preferred converter topology for high power, high voltage power supplies. This paper studies the implementation of phase shift modulation technique using FPGA. The inverter designed, is IGBT based, and Zero Voltage Switching (ZVS) technique is implemented due to reduced stresses on devices and increased efficiency. The phase modulated series resonant inverters (PM-SRC) promotes ZVS operation when its switching frequency is greater than resonant frequency. The designed PM controller is realized using FPGA on which control algorithm and other features of a controller are developed. The series resonant inverter is built and tested for full load under open loop and closed loop conditions at a switching frequency of 20 kHz. The results are presented under varying load conditions. The simulation and the experimental results were found to match closely. [ABSTRACT FROM AUTHOR]

Starting-up of photovoltaic (PV) inverters involves pre-charging of the input dc bus capacitance. Ideally, direct pre-charging of this capacitance from the PV modules is possible as the PV modules are current limited. Practically, the parasitic elements of the system such as the PV module capacitance, effective wire inductance and resistance determine the start-up transient. The start-up transient is also affected by the contactor connecting the PV modules to the inverter input dc bus. In this work, the start-up current and voltages are measured experimentally for different parallel and series connections of the PV modules. These measurements are used to estimate the stray elements, namely the PV module capacitance, effective inductance and resistance. The estimation is based on a linear small-signal model of the start-up conditions. The effect of different connections of the PV modules and the effect of varying irradiation on the scaling of the values of the stray elements are quantified. The System model is further refined by inclusion of connecting cable capacitance and contactor resistance. Dynamics of the resulting fifth-order model are seen to be consistent with those of the simplified third-order model. The analysis of this paper can be used to estimate the expected peak inrush current in PV inverters. It can also be used to arrive at a detailed modelling of PV modules to evaluate the transient behaviour. [ABSTRACT FROM AUTHOR]

The paper presents an analysis of a hybrid 13-level inverter, which consists of three cascaded H-bridges per phase. Each H-bridge produces 5-level voltages. The proposed approach can be extended to any desired number of levels. Extensive simulation results of the proposed inverter are presented. Several aspects as total harmonic distortion factor of the inverter output currents, and voltages, harmonic content, frequency spectrum distribution, and switching power losses are studied to determine an optimal operation point of the inverter. The simulations are validated by hardware-in-the-loop experimental results. [ABSTRACT FROM AUTHOR]

This study presents a new single-phase transformer-less grid-connected inverter based on a six-phase interleaved dc/dc converter as a suitable topology for PV applications. The proposed topology consists of a dc input and multi-output in the dc-link side which results in production of six levels per half cycle. The voltage of the inverter at output side is 7-level that is injected into the network. The voltage of PV panels is low and this problem is solved by increasing the voltage level in the interleaved converter. Besides, the input current ripple of the interleaved dc/dc converter is very low which causes to improve the quality of the injected current into the grid through a PV panel. For control of the power switches and active/reactive power flows, the model predictive control (MPC) method is applied. The proposed system is capable of creating different voltage levels in step-up/down at the dc-link side and this will make it suitable for working in a wide range of power in the grid-tied. Besides, the total voltage blocking (TVB) of the power switches at the inverter side is greatly decreased. Consequently, the efficiency of the proposed system is high. To prove the accuracy of theoretical calculations, the proposed topology for a 900 W prototype at an operation of 50 Hz is built and tested in the laboratory. [ABSTRACT FROM AUTHOR]

A low pass filter, an invariable constituent of a PWM based voltage source inverter, poses several challenges in its design. With a higher rating of the inverter, the volume as well as the cost of the components increases. With time, the filter design has evolved from the simpler first order filter to higher orders, the most popular being the third order LCL filters. Though the attenuation of high frequency components, offered by the higher order filters, has resulted in improved efficiency, the inherent instability of the higher order filter systems requires complex controls for proper functioning. Keeping this in mind, the paper describes the design methodology of a second order LC filter system based on certain performance indices that reflect the ratings of the components. [ABSTRACT FROM AUTHOR]

This paper presents a control scheme for single phase grid connected photovoltaic (PV) system operating under both grid connected and isolated grid mode. The control techniques include voltage and current control of grid-tie PV inverter. During grid connected mode, grid controls the amplitude and frequency of the PV inverter output voltage, and the inverter operates in a current controlled mode. The current controller for grid connected mode fulfills two requirements - namely, (i) during light load condition the excess energy generated from the PV inverter is fed to the grid and (ii) during an overload condition or in case of unfavorable atmospheric conditions the load demand is met by both PV inverter and the grid. In order to synchronize the PV inverter with the grid a dual transport delay based phase locked loop (PLL) is used. On the other hand, during isolated grid operation the PV inverter operates in voltage-controlled mode to maintain a constant amplitude and frequency of the voltage across the load. For the optimum use of the PV module, a modified P&O based maximum power point tracking (MPPT) controller is used which enables the maximum power extraction under varying irradiation and temperature conditions. The validity of the proposed system is verified through simulation as well as hardware implementation. [ABSTRACT FROM AUTHOR]

This paper presents two inverter-based low-noise, low-power, single-ended to differential switched-capacitor variable gain amplifiers (SC-VGAs) for 2-6-MHz second harmonic cardiac ultrasound imaging probes fabricated with 0.18 µm complementary metal-oxide-semiconductor technology. By employing inverters in class C mode instead of operational trans-conductance amplifiers, the power consumption of 150 µW at a supply voltage of 1 V is achieved for both VGAs; −75 and −72 dBm of integrated noise with 2-6-MHz bandwidth at maximum gain and a sampling frequency of 30 MHz are achieved for VGA1 and VGA2, respectively. Both VGAs have two stages. VGA1 uses a fully switched-capacitor approach for gain control, and the gain range is −21-21 dB with 12-bit capacitor arrays. VGA2 adopts an inverter-based SC-VGA in the first stage with a 6-bit capacitor array to tune the gain from −9 to 9 dB, and the second stage is a differential amplifier with a 4-bit thermometer-coded resistor array to tune the gain from 0 to 13 dB. Both SC-VGAs complete the single-ended to differential conversion in the second stage to suppress the second harmonic distortion (HD2). Both VGAs have HD2 less than −50 dB. The die size of VGA1 is 245 µm × 134 µm, and the die size of VGA2 is 109 µm × 164 µm. [ABSTRACT FROM AUTHOR]

Delay has a significant role to play in the implementation of the predictive current control scheme as large amount of calculations are involved. Compensating delay in the predictive current controller design can lead to an improved load current total harmonic distortion (THD) and also an increased switching frequency. Minimization of switching frequency while maintaining the lower value of load current THD requires multiple objective optimization which is achieved by optimizing a single objective function, constructed using weighting factors as a linear combination of individual objective function. The effect of weighting factor on the switching frequency minimization and the current tracking error with delay compensation for the two level voltage source inverter (VSI) are investigated in this paper. The outcomes of the predictive current control using an optimized weighting factor which is calculated using branch and bound algorithm with the delay compensation are compared with the PWM based current control scheme. The experimental tests are conducted on a 2.2 kW VSI to verify the simulation observations. [ABSTRACT FROM AUTHOR]

Fossil fuels will eventually be phased out because they are unsustainable, and their combustion releases harmful pollutants. Therefore, renewable energy sources (RES) are used instead of fossil fuels to generate electricity. The most important aspect of RES is its unlimited and infinite supply. In addition, the RES, including wind, solar, geothermal, tidal, hydroelectric, and others, offers clean, environmentally favorable energy sources. Photovoltaic (PV) systems are widely used in power systems due to their accessibility and low maintenance requirements. Solar energy is abundant and produces clean energy compared to other renewable energy sources. The ambient temperature and irradiance substantially impact the energy produced by solar PV (SPV). The atmosphere rapidly modifies the temperature and irradiance. This article employs maximum power point tracking (MPPT) strategies to boost energy production. The MPPT controller is used to produce maximum power from the RES. The incremental conductance is combined with the emperor penguin optimization algorithm to utilize the greatest SPV power. The buck converter reduces the voltage using the extracted peak power of the SPV. To provide a reduced harmonic voltage waveform in the output, multi-level inverters are used. Increasing the level counter of a staircase waveform improves the output voltage quality. A 51-level inverter is utilized for this, which consists of many MOSFET switches to produce a 51-level output waveform. The 51-level inverter's current is controlled by the proportional resonance-based rain optimization algorithm (PR-ROA) controller, which also provides efficient switch tuning. In this situation, ROA adjusts the settings of PR and leads to reduced total harmonic distortion output signals. [ABSTRACT FROM AUTHOR]

Leakage power consumption is a major technical problem faced in nanometer or deep submicron CMOS circuit technology. A new circuit technique based on 'lector stacking' is proposed in this paper for reducing the subthreshold and gate oxide leakage currents in the idle and non-idle modes of operation for domino circuits. In this technique a p-type and an n-type leakage control transistor (LCT) are introduced between the pull-up and pull-down network, and the gate of one is controlled by the source of the other. For any combination of inputs, one of the LCTs will operate near its cut-off region and will increase the resistance between supply voltage and ground, resulting in reduced leakage current. Lector stacking retains the logic state during the idle mode as in the conventional footerless domino logic. Furthermore, the leakage current is suppressed at the output inverter circuit by adding a diode-footed transistor below the n-type transistor of the inverter, offering a more resistive path between supply voltage and ground.The proposed circuit technique for AND2, OR2, OR4, and OR8 circuits reduces the active power consumption by 13.66 % to 44.45 % and by 12 % to 33 % at the low and high die temperatures, respectively, compared to the standard footerless domino logic circuits. During idle mode for the same logic gates, 1.64 % to 79.39 % and 1.2 % to 35.19 % reduction of leakage current is observed with low and high inputs at 25 °C and 110 °C respectively. Similarly, during non-idle mode 0.94 % to 99.3 % and 1.57 % to 98.58 % is observed with low and high inputs at 25 to 110 °C, respectively, when compared to standard footerless domino logic circuits. [ABSTRACT FROM AUTHOR]

The equivalence of triangle-comparison-based pulse width modulation (TCPWM) and space vector based PWM (SVPWM) during linear modulation is well-known. This paper analyses triangle-comparison based PWM techniques (TCPWM) such as sine-triangle PWM (SPWM) and common-mode voltage injection PWM during overmodulation from a space vector point of view. The average voltage vector produced by TCPWM during overmodulation is studied in the stationary (a-b) reference frame. This is compared and contrasted with the average voltage vector corresponding to the well-known standard two-zone algorithm for space vector modulated inverters. It is shown that the two-zone overmodulation algorithm itself can be derived from the variation of average voltage vector with TCPWM. The average voltage vector is further studied in a synchronously revolving (d-q) reference frame. The RMS value of low-order voltage ripple can be estimated, and can be used to compare harmonic distortion due to different PWM methods during overmodulation. The measured values of the total harmonic distortion (THD) in the line currents are presented at various fundamental frequencies. The relative values of measured current THD pertaining to different PWM methods tally with those of analytically evaluated RMS voltage ripple. [ABSTRACT FROM AUTHOR]

This paper presents a CMOS inverter-based class-AB pseudo-differential amplifier comprising current-mode common-mode feedback (CMFB). The circuit employs two CMOS inverters and the complementary CMFB consisting of current-mode common-mode (CM) detector and transimpedance amplifier. The circuit has been designed using 0.18 μm CMOS technology and operates at 1 V supply. The simulation results demonstrate rail-to-rail operation with low CM gain (−15 dB). The power dissipation of the circuit is 102.5 μW. [ABSTRACT FROM AUTHOR]

A new technique for CMOS inverter-based tunable transconductors is proposed in this paper. The proposed technique employs the master-slave approach and offers large transconductance tuning range using a control current. The transconductor was designed using triple-well 0.13 μm CMOS process under the ultra low supply voltage of 0.5 V. The circuit features 37 dB open loop gain, CMRR = 31 dB at each output node, PSRR = 90 dB and GBW = 530 MHz for 120 μA current consumption. [ABSTRACT FROM AUTHOR]

In variable speed applications of high-power induction motors, current source inverters are usually used instead of voltage source inverters. Power switches delay and switching losses in high-power ranges, prevents inverters to operate properly in high frequencies. So the voltage and current waveforms of the motor supply consist of high harmonic content causing a high-torque ripple. One of the parameters that influences the torque ripple most is the stator flux reference value. Motors do not usually operate in their nominal load. Therefore, the optimum value of the flux is not equal to the nominal value. In this paper, an optimal i reference for vector control system of current source inverter fed induction motor is produced by applying a simple estimator. Simulation results show that torque ripple has been reduced, especially in the loads less than their nominal power, as significantly as power factor has been improved. Also flux reduction causes to noticeable reduction in core and switching losses. [ABSTRACT FROM AUTHOR]

The monostable-bistable transition logic element (MOBILE) is a promising application for negative differential resistance (NDR) circuit. Previously reported MOBILE is constructed by resonant tunneling diode (RTD) that is implemented by the molecular beam epitaxy (MBE) process. However in this paper, we first propose a NDR circuit composed of standard Si-based metal-oxide-semiconductor field-effect transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT). Then we demonstrate the inverter, NAND, and NOR gate operations using this MOS-HBT-NDR-based MOBILE circuit. The great advantage of this NDR-based application is that we can implement it using the standard SiGe BiCMOS process without the need for the MBE system. [ABSTRACT FROM AUTHOR]

This paper proposes two current-control strategies adopting the sliding-mode concept for single-phase current-source inverters (CSI) feeding a resistive load. The first strategy is based on forming a general sliding surface using the error variables of the inductor current and capacitor voltage. However, it is observed that with this type of control there exists a steady-state error in the capacitor voltage. Therefore, an integral sliding-mode-based current control using an additional integral term of the error variables in the sliding surface is proposed. It is observed that the additional integral term alleviates the steady-state error in the capacitor voltage. The existence conditions for stability are determined for both control strategies. It is shown that the compliance of the existence conditions for full operating range of the CSI can be assured if the complete ranges of operating conditions are taken into consideration. In order to reduce the switching losses and improve the quality of the output voltage, the three-level hysteresis function is implemented as two separate two-level functions for the switching devices. Computer simulations are performed to verify the theoretical results and for comparison with existing methods. Experimental results are also presented to support the theoretical considerations. [ABSTRACT FROM AUTHOR]

Using the results on transposition, it is shown that many of the realizations using current conveyors given for the various mutators in a recent paper by Soliman are intimately related. Some new types of mutators are introduced, and their realizations using two or three current conveyors are given. These results are then extended to the case of generalized impedance converters and inverters. [ABSTRACT FROM AUTHOR]

Currently, the use of Field Programmable Gate Array (FPGA) devices as control platforms is common in areas where real-time control is important, as renewable energy system. Grid-connected photovoltaic systems require control strategies to optimize the performance of the complete system. This article presents the implementation of a control strategy on a FPGA platform working with a single-phase grid-connected photovoltaic system developed in MATLAB/Simulink environment. The control strategy of the system consists of a variable-step MPPT algorithm with a predictive current control to operate a boost converter on the first stage. In the second stage, a simplified active and reactive power control ensures that the maximum power is transferred to the grid trough a cascaded H-bridge multilevel inverter. A single-phase PLL based on the PQ theory is used to track the frequency of the grid. The results obtained in the simulation allow to validate the proposed strategy. [ABSTRACT FROM AUTHOR]

Abstract  This paper proposes a new pulse-frequency-modulation (PFM) digital pixel sensor (DPS) with a variable reference voltage. An in-pixel variable reference voltage generator is employed to ramp the reference voltage of the comparator locally such that the comparison of photo diode current and the reference voltage can take place earlier. This expands the dynamic range of the pixel sensor when the level of illumination is low. The complexity of routing of the proposed pixel sensor are comparable to that of digital pixel sensor with a constant reference voltage. The additional hardware cost of the proposed digital pixel sensor is only a capacitor and two static inverters, resulting in a fill factor that is comparable to those of digital pixel sensors with a constant global reference voltage. Factors that are critically to the performance of the proposed pixel sensor are examined in detail. The proposed digital pixel sensor has been designed in TSMC-0.18 μm 1.8 V CMOS technology and analyzed using Spectre with BSIM3V3 device models. Simulation results demonstrate that the proposed PFM digital pixel has a dynamic range of 120 dB when the integration time is set to 60 μs, approximately 40 dB more than the corresponding PFM digital pixel sensor with a constant reference voltage. The fill factor of the proposed pixel sensor is 20%, comparable to that of pixel sensors with a constant reference voltage. [ABSTRACT FROM AUTHOR]

In this paper, a three-level inverter-fed induction motor drive operating under Direct Torque Control (DTC) is presented. A triangular wave is used as dither signal of minute amplitude (for torque hysteresis band and flux hysteresis band respectively) in the error block. This method minimizes flux and torque ripple in a three-level inverter fed induction motor drive while the dynamic performance is not affected. The optimal value of dither frequency and magnitude is found out under free running condition. The proposed technique reduces torque ripple by 60% (peak to peak) compared to the case without dither injection, results in low acoustic noise and increases the switching frequency of the inverter. A laboratory prototype of the drive system has been developed and the simulation and experimental results are reported. [ABSTRACT FROM AUTHOR]

The loss of zero-voltage-switching (ZVS) of active switches has been a serious limitation of full-bridge (FBZVS) converters. Many techniques have been proposed in the past to extend the range of ZVS operation over the wider and also the full range of operation. However, in these techniques ZVS is achieved at the expense of additional conduction loss in active switches and losses in the auxiliary components. In this paper, the analysis for the additional losses in various full-range FBZVS DC-DC converters and their comparative evaluation is reported. Closed form expressions are derived for average value of device currents and losses. The loss curves for various topologies are plotted and compared. The analytical results are found to be consistent with the experimental efficiency tests performed on 500W, 100 kHz prototype. It is concluded that a recently proposed new topology has the least penalty of additional losses. [ABSTRACT FROM AUTHOR]

We present a high-speed differential clocked voltage switch logic inverter operating at ultra-low supply voltages (ULV). Simulated data for the new gate are presented and compared to modified clocked voltage switch logic (CVSL). Preliminary measurements for ULV gates are presented. The increase in speed for supply voltages below 300 mV for the ULV gate presented is between 10 and 20 times compared to modified CVSL logic. [ABSTRACT FROM AUTHOR]

In a distributed generation system, the nonlinear dynamics of a grid-interfaced inverter (GII) cause dynamic instability and power quality issues. Because traditional linear approaches rely on parametric fluctuations in controller parameters, adequate tuning is required. Some of the foregoing issues can be addressed using feedback and feedforward damping methods, but they require extra sensors and are ineffective in maintaining resilience against grid impedance variations and system parametric changes. Due to the digital control delay, they also add negative damping in a given frequency band, resulting in non-minimum phase behavior. The suggested control solution adds an observer-based adaptive control architecture to the existing inverter control. The concept of an energy function is used to depict grid dynamics at the GII terminals. On this dynamic energy signal, the nonlinear function will act to derive an ideal control parameter for the enhanced control algorithm. The proposed algorithm, which considers the system's nonlinearities, provides more robustness amid high- and medium-frequency grid dynamics, as demonstrated by simulation and experimental studies. [ABSTRACT FROM AUTHOR]

This study introduces a nine-level multilevel (MLI) inverter based on the switched-capacitor method. Not only does the suggested inverter ensure that the switches' maximum voltage stress is lower than the incoming voltage, but it also includes a voltage double boost capacity. As a result, it is indeed appropriate for high-voltage tasks. The suggested inverter has horizontal extension strategies that assist it to reach a higher level of output with voltage boost. This nine-level inverter could be made with two capacitors owing to a benefit of low voltage stress and devices with cheap power consumption. Furthermore, the self-balancing capability of capacitor voltage helps reduce control circuit complexity. The topology, working principles, modulation approach and the evaluation of the inverter's capacitor are presented. The proposed inverter's superiority is explored by comparing it to recently suggested hybrid and switched-capacitor multilevel inverters. Finally, a nine-level prototype is built to verify the theoretical analysis' accuracy as well as the suggested inverter's feasibility and efficiency. [ABSTRACT FROM AUTHOR]

For AC transmission lines connected to an LCC-HVDC inverter station, commutation failure can lead to the wrong operation of traditional protection. To solve the problem, this paper proposes a fast protection scheme using transient information from one end of the AC line. The boundary frequency characteristics of the AC line connected to LCC-HVDC inverter are analyzed first. This reveals the existence of significant attenuation on both high frequency signals and some specific frequency signals. Based on the boundary characteristics, a novel boundary protection principle utilizing a backward traveling wave is then proposed. A PSCAD/EMTDC simulation model of a ± 800 kV LCC-HVDC and 500 kV AC transmission system is established, and different fault cases are simulated. The simulation results prove that the novel protection principle is immune to commutation failure, fault resistance and fault type. [ABSTRACT FROM AUTHOR]

Based on classical impedance source inverter concept, this paper presents a modified impedance source inverter controlled by different pulse width modulation control strategies for solar PV/battery-powered applications. A brief topology analysis, generalized discussion and design of impedance network elements are presented. Comparison with the classical impedance source inverter is presented. Using simulation, analytical results are presented that ensure stability. The proposed voltage type inverter has reduced inrush current at startup, less capacitor voltage stress and minimum inductor current ripples. DC link voltage boost, reduced total harmonic distortion of output current and voltage, better voltage gain and wide range of output voltage control can be achieved easily with improved power quality. Experimental set-up of the modified impedance source inverter with Field Programmable Gate Array (FPGA) controller has been constructed to ascertain the results. [ABSTRACT FROM AUTHOR]

Genetic Algorithms (GA) has always done justice to the art of optimization. One such endeavor has been made in employing the roots of GA in a most proficient way to determine the switching moments of a cascaded H-bridge seven level inverter with equal DC sources. Evolutionary techniques have proved themselves efficient to solve such an obscurity. GA is one of the methods to achieve the objective through biological mimicking. The extraordinary property of crossover is extracted using Random 3-Point Neighbourhood Crossover (RPNC) and Multi Midpoint Selective Bit Neighbourhood crossover (MMSBNC). This paper deals with solving of the selective harmonic equations (SHE) using binary coded GA specific to knowledge based neighbourhood multipoint crossover technique. This is directly related to the switching moments of the multilevel inverter under consideration. Although the previous root-finding techniques such as N-R or resultant like methods endeavor the same, the latter offers faster convergence, better program reliability and wide range of solutions. With an acute algorithm developed in Turbo C, the switching moments are calculated offline. The simulation results closely agree with the hardware results. [ABSTRACT FROM AUTHOR]

In this study, a finite control set model predictive control strategy is proposed for a nine-switch converter system. The predictive control routine with discrete-solution space in energy transformation applications is widely used and offers a satisfactory closed-loop operation. However, the stability analysis of the predictive control method is a challenging task, and the practical stability approaches are applied to examine the closed-loop stability characteristics. Designing the guaranteed-stability predictive control is not an easy task since even the norm choice of the objective function may result in closed-loop instability. Regarding closed-loop stability, stability-guaranteed predictive sliding surface control approach is introduced in this study. The multi-objective cost function is reformulated in the proposed method as a sliding surface function usually used in sliding mode control methods. Thus, the best-suited control input that meets the sliding mode control stability criterion is picked. The proposed reformulation process enables the sliding surface function as an objective function, and the sliding surface function is gauged for each legitimate switching combination. The proposed control method is experimentally verified by using a 3.2 kW silicon carbide nine-switch inverter prototype. The experimental results prove that the proposed method guarantees closed-loop stability, and dual-AC load control is achieved. [ABSTRACT FROM AUTHOR]

Partly because of advances in power electronic converters, the share of renewable energy in power generation is steadily increasing. The main medium of interface for integrating renewable energy sources to the utility grid is the power electronic inverter. Virtual oscillator control (VOC) is a time-domain approach for controlling parallel inverters in a standalone microgrid (MG). The concept is to simulate nonlinear deadzone oscillator dynamics in a system of inverters to ensure a stable AC MG in the absence of communication. VOC is a time-domain and self-synchronizing controller that simply requires the measurement of filter current, whereas traditional droop control and the virtual synchronous machine (VSM) require low pass filters for active and reactive power calculations. In this work, a particle swarm optimization (PSO)-based VOC method (VOC-PSO) is proposed, in which the parameters of the VOC are designed using the PSO algorithm. The system performance using droop, VSM, VOC, and VOC-PSO controllers are investigated using MATLAB and Opal-RT real-time digital simulator platforms. The results show that the proposed VOC-PSO gives improved performance over other control strategies. The efficacy of the proposed VOC-PSO control method is also demonstrated by the experimental results. [ABSTRACT FROM AUTHOR]

Dynamic logic families are commonly used in high speed applications, but they are susceptible to single event errors. This paper presents and evaluates three techniques of hardening dynamic logic-layout manipulation using charge sharing, addition of a feedback capacitor across the static inverter, and dual-rail domino logic with differential keepers. The layout-based design has better single event tolerance by sharing charge between NFET devices of the dynamic and static inverters; the design with a feedback capacitor makes the keeper more effective in recovering the hit node because of the increased propagation delay; the differential-keeper structure shows superior SET performance because the hit node could recover through the restoring path in the case of charge loss. These proposed designs along with the reference traditional keeper-based design were fabricated in a 130 nm technology node as shift register chains and then irradiated by heavy ion particles. Experimental results verified the mechanisms and effectiveness of these proposed designs. [ABSTRACT FROM AUTHOR]

The ant colony optimization (ACO) algorithm is generally used to create an optimal PI regulator added to the pulse width modulation (PWM) strategy for a five-level neutral-point-clamped (NPC) inverter implemented in electric vehicle (EV). As heavy transportation is our main focus, the proposed system was formed by two induction motors (IMs); each of which was fed by one NPC inverter. The two IMs were fixed to the front axle and the rear axle, respectively. The PDC-PWM (Phases Disposition Carrier-PWM) strategies for the three-phase five-level NPC inverter was employed in the rotor-flux-oriented control (FOC) of the induction motor (IM). Special interest was given to the analysis of the total harmonic distortion (THD%). Considering the dynamic loading conditions of an EV driven by an IM, the proposed ACO algorithm effectively calculated the required PI parameter to find the best PI regulator gains values. These optimizations were applied to the PDC-PWM strategy in order to obtain the minimum THD% in both current and voltage outputs. The effectiveness of the introduced system for a wide range of torque/speed variations was proven through simulation by developing a model of an IM traction inverter drive with the FOC strategy for closed-loop control. As the experimental test realization of the designed system was not possible because it is very expensive, the ACO optimization performance was confirmed by means of MATLAB/SimPower Systems simulations. [ABSTRACT FROM AUTHOR]

This work presents an Operation Transconductance Amplifier with improved common mode rejection based in both Nauta's and Vieru's push–pull based OTAs operating at a 0.5 V power supply in the 180 nm CMOS process, with an additional biasing circuit that employs an adaptive body bias technique for calibration of output common mode voltage. Equal size CMOS push–pull pair inverter cells comprised by rectangular and trapezoidal transistor arrays are simulated and compared, showing that trapezoidal arrays designs have a higher DC voltage gain while rectangular arrays are more tolerant to process variability. Two new adaptive body bias circuits for CMOS circuits are proposed, which are used to minimize the inverter cells PVT variability and at the same time control the push–pull based OTAs common mode output voltage and transconductance. A schematic-level simulation of a hybrid Nauta–Vieru OTA prototype was run and achieved as result a differential voltage gain of 58 dB, a CMRR of 108 dB, a total power consumption of 375 nW, unity gain-bandwidth product of 100 kHz for a capacitive load of 10 pF, and a total area of 13,650 μ m 2 . The same OTA was fabricated and its DC transfer functions were measured, showing a maximum 52 dB voltage gain, 73 dB CMRR and 11 μ V/A transconductance at a 0.5 V voltage supply. [ABSTRACT FROM AUTHOR]

One of the most critical elements in the connection of photovoltaic (PV)-based systems used to generate electricity from solar energy is the inverter. The harmonic effects of the inverters to be connected to the grid should be as low as possible, and the total harmonic distortion (THD) should be less than 10%. A high THD value will distort the power quality on the grid side. For this reason, the THD value of the inverters in the grid connection approaches must be determined by spectral analysis to ensure that the necessary protection and improvements are made technically. In this study, a novel inverter topology, including six power switches and two power diodes, is presented, and the voltage data obtained from a grid-connected inverter are acquired in real time, and spectrum analysis is performed with the software developed with LabVIEW. The power efficiency of the proposed inverter is compared with conventional inverter types such as HERIC, H5, and H6 inverters. One of the novelty aspects of the proposed inverter topology is forming a proper freewheeling path including switches and diodes in the inverter branches that can provide a separate DC and ac components, and as a result, this prevents the following the PV side leakage currents to the ac grid side. In the spectrum analysis, the chirp Z-transformation (CZT) was used along the contours of the Z-transformation outside the unit circle. Using CZT, the z-transform was calculated for the inverter output voltage along the spiral lines in the z-plane. Besides, spectrum analysis was performed with fast Fourier transform (FFT) and compared with CZT. The results show that the CZT transformation is more efficient than the FFT algorithm and is useful in calculating a subset of FFT for a sequence. The performance of the proposed inverter is compared with conventional topologies. Hardware implementation and the output signals and the leakage current waveforms are also presented. [ABSTRACT FROM AUTHOR]

A bias stabilization scheme for inverter is introduced. The conventional inverter structure has lent itself as a power-efficient amplifier block for low-power, low-voltage applications. However, its application is restricted due to the limits in its biasing method. This letter introduces an efficient biasing scheme based on forward body bias technique. The proposed biasing scheme relaxes most of the problems associated with the unreliable conventional biasing method. Spectre simulation utilizing TSMC 180 nm technology are utilized to compare the performance of the proposed circuit with that's of conventional inverter and also with well-known common-source amplifier. All three versions are biased with 0.4 V power supply and 3 µA bias current. In addition to the performance examination, full process, voltage, and temperature analysis is also conducted through Monte Carlo and corner simulations. The results validate the well-performance of the proposed structure under various operating conditions. [ABSTRACT FROM AUTHOR]

To improve the robustness and performance of the dynamic response of a cage asynchronous motor, a direct torque control (DTC) based on sliding mode control (SMC) is adopted to replace traditional proportional-integral (PI) and hysteresis comparators. The combination of the proposed strategy with sinusoidal pulse width modulation (SPWM) applied to a three-level neutral point clamped (NPC) inverter brings many advantages such as a reduction in harmonics, and precise and rapid tracking of the references. Simulations are performed for a three-level inverter with SM-DTC, a two-level inverter with SM-DTC and the three-level inverter with PI-DTC-SPWM. The results show that the SM-DTC method achieves better performance in terms of reference tracking, while adoption of the three-level inverter topology can effectively reduce the ripples. Applying the SM-DTC to the three-level inverter presents the best solution for achieving efficient and robust control. In addition, the use of a sliding mode speed estimator eliminates the mechanical sensor and this increases the reliability of the system. [ABSTRACT FROM AUTHOR]

High component count and subsequent effects on volume and reliability have been the major concerns for practical applications of multilevel inverters (MIs). Recent emergence of the so-called reduced component count MIs (RCC-MIs) has been driven by the attempts to reduce the number of power switches for multilevel power conversion. In many of such topologies, the aspect of fault tolerance has not been given full consideration. In this work, some of the recently proposed RCC-MI topologies have been considered and analyzed in the light of imparting fault tolerance capability in the case of open-switch failure of any one of the power switches. In an RCC-MI, the occurrence of an open-circuit fault in a power switch would often lead to shut down due to the lack of redundant switching states. To overcome these occurrences, an optimal addition of power switches is described in this work so that the desired redundant states can be synthesized. The modified RCC-MI topologies so obtained have been analyzed under the normal and faulty conditions and computer simulations have been carried out using MATLAB/Simulink, and corresponding results have been presented. The results so obtained are experimentally validated to prove the feasibility of the proposed fault-tolerant topologies. [ABSTRACT FROM AUTHOR]

This manuscript discusses a novel harmonic current excitation technique for a wound rotor synchronous machine based on control of the time harmonic magneto-motive force (MMF) for brushless operation. Two inverters are used to feed the armature winding in such a way that at a time, one inverter supplies the current to armature winding. The two inverters are 180° phase-shifted. The inverter assignment is based on time-division multiplexing technique to generate continuous armature currents containing reasonable third-harmonic component beside fundamental component. This third-harmonic current component generates pulsating MMF and is induced in the rotor harmonic winding; the induced current is rectified and applied to rotor field winding to generate rotor field. The rotor field interacts with armature fundamental current component for torque generation. Finite element analysis is performed to verify the idea. [ABSTRACT FROM AUTHOR]

A speed-sensorless control strategy is investigated in a wide speed range based on extended Kalman filter (EKF) and direct torque control with space vector modulation (DTC-SVM) for three-level cascaded H-bridge inverter-fed permanent magnet synchronous motor drives. The implementation of conventional SVM technique to the multilevel inverters is considerably complicated and leads to high computational burden. A three-level SVM technique simplified on the basis of two-level voltage vector diagram is proposed to reduce this computational complexity, and in addition, to satisfy some requirements for the safe operation of the inverter such as smooth commutation and minimum number of switching. The estimations of rotor position and speed are achieved using an EKF without high-frequency signal injection, especially at very low and zero speeds. The load torque is also estimated simultaneously to account for the mechanical frictions at steady state to improve the estimation performance. Furthermore, the flux trajectory control based on maximum torque per ampere algorithm is implemented to ensure maximal efficiency for constant torque region. The feasibility and effectiveness of the proposed drive system is tested under different operating conditions and verified by the simulation results. [ABSTRACT FROM AUTHOR]

Wireless power transmission is one of the most active research direction which has a broad application prospect and huge development potential. A wireless charging system based on wireless power transmission consists of a transmitting coil at the charging station and a receiving coil in the electric vehicle. We calculate the mutual inductance between the transmitting coil and the receiving coil and analyze the trend of mutual inductance with the offset distance. Finally, we point out wireless charging system is very sensitive to an imperfect positioning of the vehicle. We think electric vehicles imperfect positioning is on a detuning state. So put forward a method that the operating frequency of the inverter is automatically adjusted to track the resonant frequency. Using the theory of reflection impedance, it is shown that the true reason for the decreases of transmission efficiency is that imaginary part impedance. It caused by the system offset. So the transmission efficiency of the system can reach a maximum when the imaginary part impedance is the smallest. Different migration of coil is verified by experiment; using MATLAB software for computer-aided analysis, we built an experimental platform of the 3.5 kW wireless charging. The experimental results verify the correctness of this view that the inverter tracks the output frequency by itself, which provides the theoretical basis for the further research in this field. [ABSTRACT FROM AUTHOR]

This letter presents a charge-transfer relaxation oscillator that achieves ultra-low power operation without comparator. The oscillator is implemented by charging or discharging the negative plate of the capacitor to a reference voltage through charge-transfer technique and the positive plate of the capacitor by a constant reference current, respectively. A special sawtooth waveform is generated, and a pseudo-inverter chain with delay compensation is adopted to determine the oscillation state. In the proposed structure, a conventional comparator has been eliminated to avoid comparator offset effect. The oscillator has been implemented with TSMC 0.18 μm CMOS process. The circuit operates in subthreshold region and consumes a total power of 85 nW. The circuit demonstrates a frequency variation less than 0.8%/V over 1.2-1.8 V, leading to a temperature coefficient of 33 ppm/∘C over − 40 to 80 ∘C. [ABSTRACT FROM AUTHOR]

In this work, we propose a novel procedure to generate and select threshold inverter quantized (TIQ) comparators for TIQ Flash ADCs. The new procedure generates more TIQ comparators than the procedure designed by Lee , Yoo, and Choi (LYC) (Proceedings of International Symposium on Quality Electronic Design, 2002). Two 6-bit TIQ Flash ADCs were designed, the LYC flash ADC, which selects its TIQ comparators using the current threshold selection algorithm, and the AC TIQ Flash ADC, which selects its TIQ comparators using the threshold selection algorithm proposed herein. Both ADCs were designed in $$0.5\,{\upmu }\hbox {m}$$ CMOS technology and compared against the process, voltage source, and temperature (PVT) variations. Proposed TIQ selection procedure allows the designer to select the optimum TIQ set for desired ADC. AC ADC has a DNL values ±0.015 LSB and INL values between $$\pm 0.0225$$ compared to ±0.1 LSB and 0.3 to −0.1 LSB for DNL and INL values of the LYC ADC. ENOB and SNDR for the AC were improved by at least $$31.3\%$$ compared to LYC ADC, at typical process settings. For process, voltage source, and temperature (PVT) variations, in overall the AC ADC has at least better the DNL values by at least $$22.5\%$$ and reduced INL values by at least $$35\%$$ . Over PVT variation, AC ADC has maintained ENOB value greater than 5.3 bits for all 16 variation corners. ENOB was improved by at least 1.5 bits over all corners. SNDR and SFDR were increased by at least 4 dB over the PVT corners. Proposed AC procedure shows scalability feature by generating extra threshold points for the $$65\hbox {-nm}$$ TIQ comparators. [ABSTRACT FROM AUTHOR]