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The performances of conventional shunt active power filters heavily depend on accurate active filter current sensing. A sudden failure in one of the active filter current sensors decreases the filter performances. Moreover, if the fault is not detected and compensated for quickly, its effect leads to disconnection or hard failure of the active filter. Hence, to reduce the failure rate and to prevent unscheduled shutdown, a real-time fault detection, isolation and compensation scheme could be adopted. This article introduces a new fast and robust current sensor fault detection and compensation method for three-phase shunt active power filters. The proposed current sensor fault detection is achieved with a predictive model associated with a logical decision. The satisfactory performances obtained by experimental 'FPGA in the loop' prototyping validate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In this article, the authors detail a top-down design methodology for a power electronic fully digital controller based on a field programmable gate array (FPGA). This design flow uses the very high speed hardware description languages-analogue mixed signal (VHDL-AMS) language. The case of a shunt three-phase active filter is studied. An optimised architecture is designed and each step is detailed. Each block of the architecture is modelled in the VHDL at several levels of abstraction, from real data format to specific binary format. To achieve closed-loop simulation, analogue and power elements are modelled in the VHDL-AMS. The whole closed-loop system is successfully validated at various levels of abstraction of the digital control, using the ADVanceMS computer-aided design tools. An experimental validation of the proposed architecture, implemented on the target Xilinx Virtex-II 2V4000bf95 FPGA is discussed. [ABSTRACT FROM AUTHOR]