Search

The modular multilevel converter (MMC) is one of the most attractive topologies for high-voltage and high-power applications. Reliability is an important challenge for MMCs due to large amounts of power switches in the phase leg of the MMC. To enhance the reliable performance of MMCs, an effective and accurate fault detection and localization strategy for MMCs with the nearest level modulation is proposed in this paper. According to the general characteristics of the MMC, the capacitor voltage of the faulty submodule (SM) is higher than the healthy ones’. Based on the sorting algorithm, the faulty SM will have the maximum voltage and it will be identified by the proposed fault detection method. The auxiliary monitoring is supplemented to the detection algorithm for the cases of faults occurring in multiple SMs. The faulty SM localization strategy is based on the differences of capacitor voltages. The faulty switches are located by the distinctions of capacitor voltage in different current intervals. The proposed strategy could be applied under the cases of single or multiple SMs failures and identifies three kinds of the power switches faults in the faulty SM. The validity of the proposed strategy is verified by the simulation results in MATLAB/Simulink. [ABSTRACT FROM AUTHOR]

Transient voltage and current stresses are essential for the design and protection of multi-terminal DC (MTDC) transmission systems, especially under the short-term dynamics after severe grid faults. In this paper, we propose a discrete-time model for the modular multilevel converter based MTDC (MMC-MTDC) system considering the DC-side disturbances in the system. Based on the piecewise linear modeling, the state variables such as the transient voltage on the sub-module (SM), arm current, etc., can be calculated analytically for the critical short term (within 10 ms) after the severe DC fault while the system protection is yet to be activated. Parameter sensitivity analysis is also performed to give a better system design guideline. The estimation results are validated by detailed electromagnetic (EMT) circuit simulations and the scaled-down experimental laboratory prototype. [ABSTRACT FROM AUTHOR]

In this article, a high-power-density off-line light-emitting diode (LED) driver is proposed. The proposed ac–dc driver is the novel integrated buck and boost converter (IBBC). Besides the high-power-density, the converter shows a high power factor (PF), and a low total harmonic distortion (THD). The IBBC is a two-stage driver that features just one controlled switch, which leads to high PF and low THD operation ensuring high efficiency, and size and cost reduction. Moreover, the switch current is minimized as it conducts the higher of the buck or boost converter, but not the addition of both as in other integrated converters. Moreover, for a further increase of the power-density, a magnetic integration is made by integrating the two inductors of both the buck and boost converters in one core. Thus, the proposed converter has been named as fully integrated buck and boost converter (FIBBC). In this paper, the IBBC is analyzed, and a design methodology is proposed. Also, this article presents a magnetic analysis of the novel FIBBC. In addition, a comparison between two prototypes is presented, one for the IBBC and another for the FIBBC, both of them supplying an LED luminaire of 46 V/ 0.575 A. The FIBBC shows a high PF equal to 0.994, very small THD of 10%, output current ripple of 6%, and efficiency of 92.62%, which represents a landmark on the efficiency of integrated converters. [ABSTRACT FROM AUTHOR]

This paper presents a new modular ac/dc step-up soft-switched converter with unity turns ratio high-frequency transformers for medium-voltage (MV) dc grid in wind energy systems. In the proposed converter, the three-phase boost rectifier is combined with step-up resonant circuits and high-gain output rectifier modules (called voltage quadrupler modules) to form a modular step-up power conversion unit. As a result, the proposed converter is able to achieve very high voltage gain without using any medium-to-high frequency transformers with very large turns ratio, which greatly simplifies the insulation requirement and design of the high-frequency transformer. In addition, soft-switching operations are achieved in all the semiconductor devices to maintain high efficiency. The techniques to ensure voltage balancing across the dc-link capacitors and to achieve output short-circuit protection will be discussed in this paper. To realize high-frequency MV operation, silicon carbide (SiC) devices are utilized in the converter implementation on a 1.5 MW, 690 VAC/40 kV converter system to validate the performance of the proposed circuit. Experimental results on a 3.5 kW, 145 VAC/6.2 kV, 95.4% efficiency SiC-based laboratory-scale proof-of-concept prototype are then provided to highlight the merits of this work. [ABSTRACT FROM AUTHOR]

Multilevel converters with floating capacitors (FCs) are widely applied in recent years in a wide range of industrial applications from high-voltage direct current systems to high power drives. However, some FC topologies lack complete FC voltage balancing capability due to the inherent topology limitation or the insufficient switching state for capacitor balancing. This will result in large ripples on capacitors at low frequency (such as fundamental frequency), limiting their performance and application, particularly, when the fundamental frequency is very low in low-speed drive operations. Typical examples of those multilevel converters are modular multilevel converters (MMC), nested neutral-point-clamped (NNPC) converter, etc. In order to improve the FC balancing for this kind of multilevel converters, this paper proposes a carrier-based pulse-width modulation (PWM) method, named stair edge PWM method. This method can obtain sufficient redundant switching states for FC voltage balancing by producing multiple levels in one PWM period. The FC voltage balancing is thus achieved at switching frequency, which can greatly reduce the capacitor voltage ripple and therefore enable the use of much smaller FCs. Meanwhile, the voltage stress on each device and low $dv/dt$ feature are still the same as the normal multilevel operation, reserving two of the most salient features of multilevel converters. The proposed method also features much simpler and easier implementation compared with space-vector-based approaches, particularly when high-level converters are considered. An application example using a four-level NNPC converter is provided in this paper. The effectiveness and performance of the proposed method are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

The soft-switching solid-state transformer (S4T) employs only 12 main active devices and an auxiliary resonant circuit to implement a bidirectional solid-state transformer, with an attractive feature of achieving a full range of zero-voltage-switching conditions for all the main devices. This paper covers detailed design of the power stage, auxiliary resonant circuit, and control of the S4T. The high-frequency transformer is an essential element for the S4T, and it has a unique feature of dc-biased flux. Design of such a high-frequency transformer is also discussed in detail in this paper. Soft startup, shutdown, and fast dynamic response under load transients are also attractive behaviors because of the low inertia of the S4T. Experimental results from a 208-V/10-kV·A S4T unit are presented. [ABSTRACT FROM PUBLISHER]

This paper introduces a non-isolated high step-up dc–dc converter with dual coupled inductors suitable for distributed generation applications. By implementing an input parallel connection, the proposed dc–dc structure inherits shared input current with low ripple, which also requires small capacitive filter at its input. Moreover, this topology can reach high voltage gain by using dual coupled inductors in series connection at the output stage. The proposed converter uses active clamp circuits with a shared clamp capacitor for the main switches. In addition to the active clamp circuit, the leakage energy is recycled to the output by using an integrated regenerative snubber. Indeed, these circuits allow soft-switching conditions, i.e., zero voltage switching and zero current switching for active and passive switching devices, respectively. The mentioned features along with a common ground connection of the input and output make the proposed topology a proper candidate for transformer-less grid-connected photovoltaic systems. The operating performance, analysis and mathematical derivations of the proposed dc–dc converter have been demonstrated in the paper. Moreover, the main features of the proposed converter have been verified through experimental results of a 1-kW laboratory prototype. [ABSTRACT FROM PUBLISHER]

In this paper, a new structure of nonisolated boost dc–dc converters based on voltage-lift technique is proposed. In comparison with conventional nonisolated boost dc–dc converters, the proposed converter generates higher voltage gain. In this paper, the relations between voltage and current of all elements in continuous conduction mode and discontinuous conduction mode are calculated as well as voltage gain in each mode. Then, the critical inductance and stress of switch current are extracted. Finally, the validity of given theories is examined by using the experimental results. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper analyzes the combination in a cascaded H-bridge multilevel inverter (CHBI) based on transformers with the different turn ratios for increasing the voltage level and proposes the switching method for achieving the output voltage distribution among H-bridge cells (HBCs). The transformers used in this paper are connected to the output of the respective HBCs, and the secondary sides of all the transformers are connected in series for generating the final output voltage. Only one of the transformers, in particular, has a different turn ratio for increasing the output voltage level. In this paper, the possible turn ratio of the special transformer with a different turn ratio is discussed in detail, and a switching method based on the level-shifted switching method for the topology used in this paper is proposed. To verify the effectiveness of the proposed method, a three-phase 21-level CHBI is experimentally tested. [ABSTRACT FROM PUBLISHER]

This paper proposes a single-phase power factor correction (PFC) rectifier to achieve high power factor, wide output voltage range, and ripple power decoupling without using electrolytic capacitors. It consists of two parts: PFC circuit and output voltage regulation circuit. The load side is involved in both parts, which is different from the regular two-stage conversion structure. The proposed rectifier can be directly applied to low voltage cases due to the wide output voltage range. And the decoupling capacitor voltage can be smaller than the peak grid voltage, which reduces the voltage stress. Besides, the low-frequency ripple power buffer is implemented without a dedicated power-buffering controller. This paper first introduces the circuit structure, operation principles, and control method. Then, the system design consideration is given. Finally, the effectiveness of the proposed topology is verified by the simulations and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a single-stage nonisolated switched capacitor ac–dc converter for power-factor correction (PFC). This converter features reduced passive components, single switch, transformerless high voltage gain, and improves the power factor, reduces total harmonic distortion, and voltage stress across the switch. The peak current mode with a dynamic resonant perturbation scheme compensates the subharmonics that exist at zero crossing of the source current is implemented for PFC. In this paper, the principle of operation, large signal modeling of the circuit, and control method for the proposed PFC converter are provided. [ABSTRACT FROM PUBLISHER]

This paper presents a new multilevel converter topology based on a variable or multilevel dc-link stage. This stage is shared by all inverter output phases, thus increasing the number of output voltage levels while reducing the overall number of active devices compared to traditional topologies; therefore, it is called a reduced multilevel converter (RMC). The converter is not capable of reducing the blocking voltage of the devices; hence, unlike other multilevel converters aimed at medium-voltage applications, this converter is interesting for low-voltage- and high-power-quality-demanding applications such as photovoltaic inverters, wind energy conversion systems, and uninterruptible power supplies. The main novelty behind the proposed concept is the basic dc cell used to generate the variable dc-link voltage, which includes a controlled path through the floating capacitors to provide the necessary degree of control to enable a shared multilevel dc link for all the output phases of the converter. The dc cells are connected in a multicell structure to increase the number of levels of the converter. A five-level version of the RMC topology is briefly compared to other five-level converters such as the five-level active neutral-point-clamped converter and the five-level flying capacitor converter. This paper presents the structure of the new topology with its operating principle, switching states, main characteristics, and experimental validation using finite-control-set model-predictive control. [ABSTRACT FROM PUBLISHER]

A new isolated single-stage soft-switching power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) is introduced in this paper. In the proposed LED driver, the switches voltage stress and also the dc-bus voltage is limited to the peak of the line voltage. Hence, low voltage rated mosfets and diodes can be used. The efficiency is improved because the switches are turned on under zero current switching (ZCS) condition and turned off under zero voltage zero current switching (ZVZCS) condition. Also, no current feedback is required since the converter provides an output current independent of output voltage. In this paper, operating principle of the proposed LED driver is presented and design considerations are discussed. To verify the theoretical analysis, a laboratory prototype of the proposed converter for supplying a 50 W/70 V LED module from 220 Vrms/50 Hz ac mains is implemented, and the experimental results are presented. Since current feedback is not used, dimming property and operation for universal voltage range is not achievable. [ABSTRACT FROM PUBLISHER]

This paper proposes a current-fed single-phase inverter without constant intermediate DC link. It eliminates electrolytic capacitor from the DC-link and introduces an intermediate pulsating DC bus. The proposed topology is modular with three full-bridges making it scalable for high-power applications. New pulsating-DC-modulation for back-end pulsating DC-link inverter and secondary modulation (SM) for front-end DC-to-pulsating DC converter is proposed. Soft-switching and device voltage clamping of both primary side and secondary side devices of front-end current-fed full-bridge converter is realized. A rotating partial hybrid pulsewidth modulation has been introduced. One leg of inverter is commutated at a low switching frequency, while the other leg is operated at a high switching frequency for partial period of a line frequency cycle. Thus, switching losses of the back-end inverter are considerably reduced. Rotating mechanism is used to equalize the switching losses of four switches of the inverter. This paper presents detailed operation and analysis of the topology with a proposed modulation scheme. Simulation and experimental results validate the effectiveness and accuracy of the proposed modulation scheme as well as soft-switching and performance of the converter. [ABSTRACT FROM PUBLISHER]

A switched-capacitor-based dual-switch dc–dc converter with a high-boost voltage gain is proposed in this paper. The proposed converter can obtain a high-voltage gain with a small duty cycle, which decreases the voltage stress and the conduction loss on the power switches. This paper presents the key waveforms, the operating principles at the continuous conduction mode and the discontinuous conduction mode, and the parameter design. Moreover, a comparison between the proposed converter and other nonisolated converters has been completed. To verify the operating principle, a 200 W prototype is constructed with an input voltage of 25–50 V and an output voltage of 200 V. The simulation and experimental results are shown. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

In this paper, new half-bridge and full-bridge topologies for a switched-boost inverter are proposed. These topologies have a high boost factor in comparison with conventional types. In addition, the proposed topologies have continuous input current and can generate zero-voltage level in output. In this paper, the operation of the proposed inverters in different operating modes is analyzed. Then, the values of inductors and capacitors are designed. Moreover, the used switching pattern and its logical diagram are introduced. A comprehensive comparison between the proposed and conventional topologies in terms of the boost factor, the number of elements, and the efficiency shows the good features of the proposed inverters. Finally, to verify correct operation of the proposed topologies and derived equations, simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

Fast and detailed calculations of harmonics, generated by three-phase uncontrolled rectifiers with finite dc smoothing, can be performed by using detailed analytical procedures (DAPs). Several DAPs are developed for continuous- and discontinuous-conduction modes (CCM and DCM) when balanced operation of the system is assumed. The authors of this paper have recently proposed a new DAP (model 1a) in which nonideal conditions, such as unbalances and even harmonic voltages on the ac side, are taken into account. However, only CCM is assumed in model 1a. The main objective of this paper is to overcome this limitation of model 1a so that a new DAP (model 1b) for DCM is presented, which is capable of considering unbalanced operation. Moreover, the boundary of the DCM is also estimated for model 1b under nonideal conditions. [ABSTRACT FROM PUBLISHER]

At 13.56 MHz, the circuit parasitic elements strongly affect the stability, performance, and efficiency of the inverter. In this paper, the effect of parasitic elements in the 13.56-MHz half-bridge inverter is analyzed in detail based on the point of view of the high-frequency ringing in the circuit. A proposed inverter design that aims to attenuate the influence of the parasitic elements is presented, including optimized printed circuit board (PCB) design and ringing damping design. The simulation and experiment results show that the proposed PCB design not only reduces the parasitic inductance in the ringing loop but also improves the stability of the inverter by avoiding the subresonant at low frequency and reducing the radiation electromagnetic interference noise. This paper also points out that the ringing current exists in the circuit even with the proposed optimized PCB design lead to the instability of the inverter at high voltage operating condition. The proposed damping circuit significantly suppresses the ringing in the circuit and improves the stability as well as the efficiency of the inverter. The experiment results confirm that by using the proposed design, the half-bridge inverter module using Silicon mosfet is stable at 13.56-MHz switching frequency and its efficiency obtains \text93.1\% at 1.2-kW output power. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid nonisolated dc–dc commutation cell, which is generated by the integration between conventional commutation cell and ladder-type passive switched capacitor (SC) cell. From the resulted hybrid cell are derived three different dc–dc converters: a buck-type, a boost-type, and a buck–boost-type. The three structures are analyzed in this paper and are presented the topological stages, static gain characteristics in continuous conduction mode and discontinuous conduction mode, steady-state analysis. The analyses are generalized in relation to the number of switched-capacitor cells employed, which allows the increase of the rated gain of the converters by adding more SC cells. In addition, the proposed hybrid nonisolated dc–dc commutation divides naturally the voltage stress among the semiconductors and capacitors of the power stage. A 1-kW prototype was developed to verify the operation of the three proposed converters and their theoretical analysis. For the buck-type topology, designed with an input voltage of 600 V and output voltage of 450 V, a peak efficiency of 99.2% and efficiency at rated power of 99% were obtained. [ABSTRACT FROM PUBLISHER]

The development of a high static gain dc–dc converter with the integration of the voltage multiplier cell and the coupled inductors operating with soft switching is presented in this paper. The use of coupled inductors and voltage multiplier techniques allow the operation with low switch voltage and low conduction losses. The switch turn-on commutation occurs with zero current switching due to the presence of the coupled-inductor leakage inductance. The leakage inductance also reduces the reverse recovery current of all diodes. The zero voltage switching at the power switch turn-off is obtained with the inclusion of only a diode and a snubber capacitor per phase, without the use of auxiliary switches. The soft-switching range is independent of the load and is maintained even with a light load. The theoretical analysis, design procedure, and experimental results are presented in this paper. A two-phase boost converter with one voltage multiplier and coupling inductors was built with an input voltage $V_{{\text{in}}}= { \text{24 V}}, output voltage Vo= { \text{432 V}}, and output power Po= { \text{400 W}}. The efficiency obtained is equal to 94.55% at the nominal power. [ABSTRACT FROM PUBLISHER]

Sheppard–Taylor power factor correction (ST-PFC) rectifier could obtain a high power factor due to its capability of overcoming the control detuning issue. However, it needs a bulky electrolytic capacitor at the load side to buffer the double-frequency ripple power (DFRP), which reduces the reliability and power density significantly. This paper proposes a control method to divert the DFRP to the small energy transfer capacitor. Consequently, the bulky electrolytic capacitor is replaced with a small film capacitor. The proposed method is carried out by introducing the freewheel state (one switch is turned on and the other is turned off) into the control. So no extra hardware is added, which makes the proposed method cost-effective. A low electromagnetic interference emission is also achieved due to the continuous input–output currents. In addition, the proposed method can be extended to other topologies easily. This paper first gives the detailed analysis of the proposed control method, and then introduces the controller design. The selection of the passive components is also briefly discussed. Finally, the simulation and experimental results verify the effectiveness of the proposed control method. [ABSTRACT FROM AUTHOR]

These days, constant on-time current mode (COTCM) control scheme is widely used in the voltage regulator (VR) controllers because it has a higher light-load efficiency and a higher BW design capability while maintaining a simpler compensation requirement. One issue plaguing the COTCM control is its slow transient response which is caused by its fixed TON operation. During the heavy-load step-up transient, the duty cycle becomes saturated and the inductor current increment becomes limited by TON and the minimum off time (TOFF$\_$ MIN) ratio, which can create a large undershoot at load step up. On the other hand, in the load step-down case, if the load step down occurs at the beginning of TON, a large overshoot can be created at the output. To solve this issue, this paper presents a method designed to increase the TON at load step up and then very quickly, decrease at load step down in order to reduce the undershoot and overshoot at output or otherwise save the output capacitor. In this proposed method, the increase or decrease of T ON is proportional to the output change which eliminates the chance of any overcorrection or ring-back problem unlike the methods presented in prior forums. This feature enables the control to work seamlessly in a high-frequency load repetitive case in VR applications. Since this TON change occurs only in the transient period when duty cycle is saturated, it does not affect the small-signal property of the COT control. Moreover, the proposed methods are very much compatible with the state-of-the-art single and multiphase COT control structures. Simulation and test results in both single and multiphase operations are also presented in the paper to verify the proposed concept. [ABSTRACT FROM PUBLISHER]

SiC mosfet has low on-state resistance and can work on high switching frequency, high voltage, and some other tough conditions with less temperature drift, which could provide the significant improvement of power density in power converters. However, for the bridge circuit in an actual converter, high dv/dt during fast switching transient of one mosfet will amplify the negative influence of parasitic components and produce the significant negative voltage spikes on the complementary mosfet, which will threaten its safe operation. This paper proposes a new gate driver circuit for SiC mosfet to attenuate the negative voltage spikes in a bridge circuit. The proposed gate driver adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series-connected capacitor to suppress the negative voltage spikes, which could satisfy the stringent requirements of fast switching SiC mosfets under the high dc voltage condition with low cost and less complexity. An analysis is presented in this paper based on the simulation and experimental results with the performance comparison evaluated. [ABSTRACT FROM AUTHOR]

A novel soft-switching interleaved coupled-inductor boost converter is proposed in this paper. Only a single active soft-switching module is needed to simultaneously achieve the soft-switching property of the two switches in the interleaved coupled-inductor boost converter. The better efficiency is achieved with the less components and cost. The two main switches can achieve the ZVT turn-on and smaller-current turn-off simultaneously when the single active soft-switching module is active. Due to the coupling characteristic of the inductors, the voltages across the two inductors are changed at the same time; therefore, the equivalent circuit is equal to the parasitic capacitors of the two main switches in parallel to resonate with the auxiliary inductor. By coupling two input inductors, the volume and cost of the circuit can be reduced. The interleaved coupled-inductor topology can also reduce the input and output current ripples and share the input and output currents. The operating modes, analysis, and design of the proposed circuit have been discussed in this paper. Simulation and experiments are finally conducted to verify the validity of the proposed circuit. [ABSTRACT FROM PUBLISHER]

In this paper, a nonisolated dc–dc converter with high voltage gain is presented. Three diodes, three capacitors, an inductor, and a coupled inductor are employed in the presented converter. Since the inductor is connected to the input, the low input current ripple is achieved, which is important for tracking maximum power point of photovoltaic panels. The voltage stress across switch S is clamped by diode D 1 and capacitor C1. Therefore, a main switch with low on-resistance RDS (on) can be employed to reduce the conduction loss. Besides, the main switch is turned on under zero current. This reduces the switching loss. The steady-state analysis of the proposed converter is discussed in this paper. Finally, the proposed converter prototype circuit is implemented to justify the validity of the analysis. [ABSTRACT FROM PUBLISHER]

DC electric springs (DCES) are emerging technologies for the (i) regulation of mains voltage against the intermittent renewable generations and (ii) harmonic cancellation in dc microgrids. When conventional converter topologies (e.g., half-bridge or full-bridge converter) are adopted as DCES, the battery storage of the DCES has to process both the dc power and the ac harmonic power. The pulsating ac power can severely reduce the lifetime of the battery. To address this issue, a hybrid-DCES (H-DCES) is proposed in this paper to perform (i) and (ii) in a decoupled manner. With a modified topology and control method, the H-DCES can divert the ac current to the ground and retains the function of manipulating noncritical load for dc voltage regulation. The immediate benefits of this H-DCES are the reduction of storage capacity and a prolonged lifetime of the battery. Both the operating principle and the mathematical model of the proposed H-DCES are analyzed in this paper. A prototype of the H-DCES is practically tested in a 48-V dc grid. The experimental results show that the H-DCES can realize the decoupled operation of dc voltage regulation and harmonic cancellation. Simulation studies further demonstrate that the H-DCES requires less storage capacity than its counterparts. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) with nearest level modulation (NLM) is widely used in the high voltage applications for low switching frequency and easy implementation. Existing literature has not provided a complete submodule (SM) fault ride-through scheme for MMC with NLM. In this paper, a strategy including fault detection, localization, redundancy, and recovery is proposed to ensure continuous operation of MMC under IGBT open-circuit faults conditions. It only requires a few hardware and software resources. The features of MMC and SMs with three types of failures are studied, respectively. Based on these, the fault detection method is proposed by using a simple hardware circuit, thus high computation complexity is avoided. Since current fault localization schemes are limited to MMC with carrier phase shifted pulse width modulation, this paper further proposes a strategy for MMC with NLM to locate the faulty SM and identify the fault type. After this, the fault redundancy and the proposed fault recovery method are applied to eliminate the fault and then exit the failure state. Therefore, the ability of SM fault ride-through can be realized. Analysis of failure characteristics are verified in simulation. Experimental results based on a single-phase MMC prototype with 11 SMs per arm are presented to demonstrate the validity of the proposed fault ride-through strategy. [ABSTRACT FROM AUTHOR]

In this paper, direct torque control (DTC) of five-phase induction motor (FPIM) is implemented using three-level neutral point clamped (TL-NPC) inverter. One of the advantages of three-level inverter over two-level one for DTC operation is the low torque ripple. Also TL-NPC inverter through space vector modulation technique gives low $ dv/dt$ transition with better voltage waveform. By applying conventional lookup table for DTC, the TL-NPC inverter does not ensures lower $dv/dt$ transition. In this paper, a novel switching scheme for DTC of FPIM using TL-NPC inverter is proposed that ensures the low $ dv/dt$ transition and balancing of dc-link capacitor voltages of TL-NPC inverter. To form the lookup table for DTC operation, instead of using voltage vectors directly, virtual vectors (VVs) are utilized. Two switching states are used in one sample time to generate a VV in $\alpha \beta$ plane, which gives zero resultant voltage in $ xy$ plane. The switching strategy ensures low number of transitions to reduce the switching losses. The switching state redundancies are used in a novel way to balance the dc-link capacitor voltages without using any additional hardware. The proposed technique to balance the dc-link capacitor voltage gives lower switching frequency. The MATLAB/Simulink environment is used for the simulation and the results are validated through experiments. [ABSTRACT FROM AUTHOR]

This paper presents a novel single source fed isolated gate driver circuit based on the dual-forward converter topology. The two forward converters are paralleled at the secondary side to achieve 0%–100 $\%$ duty cycle range together with galvanic isolation. The gate driver switching frequency is independent of the main pulse-width modulation frequency (PWM). As a result, the gate driver switching devices and magnetics are designed for high frequencies independent of the main PWM frequency. At high frequencies, problems of resonance due to parasitics become significant. This paper discusses this problem and proposes a novel solution to mitigate it. In addition, this paper also presents a novel solution and circuit to produce negative gate pulse for miller clamp. The proposed circuit can be used for any application, irrespective of switching frequency, thus making it a wide band generalized gate driver. The circuit is analyzed and verified experimentally. [ABSTRACT FROM PUBLISHER]

This paper presents three unidirectional step-up ac–dc converter topologies with voltage multiplication on their outputs. The first topology is the hybrid boost rectifier and the other two are novel bridgeless structures, all based on the integration of boost rectifier and the ladder switched-capacitor (SC) cell. The new hybrid structures provide high voltage gain with low voltage stress across the switches, high-power factor, and output voltage regulation. This paper presents the principle of operation, steady-state and dynamic analysis, design methodology, and experimental verification. A different approach is also presented for the design methodology of the SC cell and for the analysis of its influence on the dynamic model. Three 1000-W prototypes with a 220-V input voltage, 800-V output voltage, and 100-kHz switching frequency were designed to corroborate the theoretical study. The best efficiency was 97.1$\%$ in the proposed bridgeless versions and the voltage stress across the switches stands around 400 V. Furthermore, a comparison between the proposed structures and previous topologies is also presented. [ABSTRACT FROM PUBLISHER]

This paper proposes an analytical design procedure for the LLCL and the LCCL filters for grid integration of high-power voltage-source converters. The low switching frequency and stringent limits on grid-injected harmonics in high-power applications lead to large smoothing filters. In order to reduce the size and weight, high-order filters are already proposed and wise design procedures with the main goal of minimizing the overall filter size are being suggested. In this paper, the parameters of the LLCL and the LCCL filters are designed in the per-unit system to satisfy the requirements on the injected grid current and at the same time minimize the overall filter size through minimizing the total energy stored in the filter components. The experimental results of a downscaled laboratory prototype with a low switching frequency prove the effectiveness of the proposed design procedure. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper presents a hybrid seven-level converter based on T-type converter and H-bridge cascaded suitable for low-voltage and high-power-density applications. The operation principles and conduction paths are analyzed comprehensively. Voltage balance control of the floating capacitors is the key point of this paper. Mathematical expressions of capacitor voltage balance conditions are deduced based on sinusoidal pulse width modulation (SPWM). The results show that floating capacitor voltages are only balanced when the modulation index is below 0.82 under SPWM. In order to enlarge the modulation index ensuring the capacitor voltage balance, space vector modulation (SVM) is also applied to regulate floating capacitor voltages taking advantage of redundant switching vectors. Meanwhile, in SVM, there are no additional control requirements for the capacitor voltage. Taken both SPWM and SVM into consideration, the limit to the range of operation for this seven-level converter is presented, which is a function of the modulation index and the power factor. The merit of dc voltage utilization improvement in this topology is also analyzed based on simulation results. Simulations and experimental results under different modulation index and RL load are presented to verify the modulation strategies illustrated in this paper. [ABSTRACT FROM PUBLISHER]

An extended-duty-ratio (EDR) boost converter is studied extensively in this paper for high voltage gain applications with a wide input (and/or output) voltage range. The EDR is a unique combination of an interleaved, multiphase boost converter and switched capacitor configuration that achieves high voltage gain with significantly lower switch voltage stress and switching losses compared to conventional high-gain solutions. Most of the switches in the multiphase EDR experience only a fixed fraction of the output voltage ($1/M, 2/M$ , etc., where $M$ is the number of phases). Through extensive analysis over a wide operating range, it is shown here that the EDR boost converter has inherent current sharing among the phases only in a limited range of duty ratio— $(M-1)/M \leq D \leq 1$. As the duty ratio reduces beyond this range as required in wide input voltage applications, inherent current sharing property is lost. In this paper, techniques to ensure current sharing under all operating zones without requiring current sensors are presented. Instead of having equal duty ratio for each phase, it is adjusted for each phase according to the operating region of the converter. Extensive analysis is presented to derive the required duty ratio changes for the different phases. The proposed concept is validated with experimental results from a 250 W, 3-phase EDR boost, and GaN-based hardware prototype. [ABSTRACT FROM AUTHOR]

This paper presents the effect of stray capacitances in bipolar (negative and/or positive) pulses generated by the two different topologies of the solid-state Marx modulators. According to the analysis, the stray capacitances influence the energy transfer from the Marx modulator capacitors to the load affecting the bipolar (negative and/or positive) pulse rise time. This paper deals with the structure design to reduce the influence of the stray capacitance and to improve the pulse rise time of these bipolar solid-state Marx modulators. A four-stage laboratory prototype of the two topologies has been assembled using 1200-V insulated gate bipolar transistors and diodes, operating with 1000-V dc input voltage and 1-kHz frequency, producing 4-kV bipolar pulses, with 5- \mu \texts pulse duration and 120-ns rise time, into a resistive load. [ABSTRACT FROM PUBLISHER]

This paper proposes a wide-range zero-voltage-switching (ZVS) active-clamped current-fed push–pull converter for fuel cell application. The presented converter achieves ZVS for all of the primary switches and ZCS for secondary diodes from rated load to 10% full load over the wide input voltage variation, improving the overall efficiency. The ZVS of switches is realized by the energy stored in the transformer leakage inductance aided by the secondary parallel inductor. An additional active clamping circuit suppresses the voltage spike as well as assists in realizing ZVS of switches. Low-voltage-rated switches with low on-state resistance can be used. Moreover, the voltage-doubler rectifier is adopted to release the reverse-recovery problem of rectifier diodes and reduce turns ratio of the high-frequency transformer. Detailed steady-state operation, analysis, design, control, comparative study, and experimental results are discussed in depth in this paper. Finally, a 200-W prototype has been built in the laboratory to verify the effectiveness of the proposed converter. [ABSTRACT FROM PUBLISHER]

In this paper, two topologies are presented for the enhanced-boost quasi-Z-source inverters (qZSI), namely continuous input current configuration and discontinuous input current configuration of enhanced-boost qZSI with two-switched impedance networks. Similar to enhanced-boost impedance-source inverters (ZSIs), these proposed inverter topologies possess very high boost voltage inversion at low shoot-through duty ratio and high modulation index to provide an improved quality output voltage. Compared to enhanced-boost ZSIs with two-switched Z-source impedance networks, these proposed inverter topologies share common ground with source and bridge inverter, overcome the starting inrush problem, and draw continuous input current and the lower voltage across the capacitors. Moreover, the input ripple current is negligible. This paper presents the operating principles and analysis of continuous input current configuration enhanced-boost qZSI with two-switched impedance networks and compares with ZSI, switched inductor ZSI, DA/CA-qZSI, and enhanced-boost ZSIs. The theoretical analysis is done and is validated through simulation and experimental results. [ABSTRACT FROM PUBLISHER]

This paper proposes a family of soft-switching bidirectional converters. In many applications, the bidirectional converters operate over a wide range of duty cycle and load variations. In the proposed converters, in order to extend the zero-voltage switching operation range, two supplemental voltage sources utilizing passive components are implemented in the auxiliary circuit. By using this method, the soft-switching features are ensured for an extensive range of the converter duty cycles. This is achieved independent of the output power value or the converter operation mode, and so, soft switching is ensured within the entire converter operating region. In these converters, all semiconductors components are soft switched, and the auxiliary circuit does not contribute to the complexity of the control circuit. Also, no extra voltage stress exists on the main switches and the voltage stress on the auxiliary switches is lower than the main switches voltage stress. In this paper, the proposed bidirectional buck/boost converter is analyzed and to confirm the feasibility of the proposed method, experimental results of a 150-W prototype converter are presented. [ABSTRACT FROM PUBLISHER]

In this paper, a single-phase single-stage isolated zero current switched (ZCS) current-fed full-bridge ac/dc converter is proposed for IGBT-based high-power power factor correction (PFC) applications. By adding an additional commutation path and few resonant components, ZCS operation is realized for all IGBTs. The conduction loss is also lowered by the additional path. Furthermore, the control strategy for the proposed converter is compatible with that developed for traditional PFC converter. In this paper, the topology derivation and circuit operational analysis are given. The control strategy is introduced. A 3-kw prototype is developed and tested to verify the circuit functionality. Finally, the efficiency performance is investigated and comparison is made to show the advantages of the topology. [ABSTRACT FROM PUBLISHER]

Conventional single-phase power-factor-correction (PFC) rectifiers with active power decoupling capability typically require more than three active switches in their circuits. By exploring the concept of power-buffer cell, a new single-stage PFC rectifier with two active switches, one inductor and one small power-buffering capacitor is reported in this paper. The proposed converter can achieve high-power factor, wide output voltage range, and power decoupling function without using electrolytic capacitor. Additionally, an automatic power decoupling control scheme that is simple and easy to implement is proposed in this paper. The operating principle, control method, and design considerations of the proposed rectifier are also provided. A 100-W prototype with ac input voltage of 110 Vrms and a regulated dc output voltage ranging from 30 to 100 V has been successfully designed and practically tested. The experimental results show that with only a 15 μF power-buffering film capacitor, the proposed converter can achieve an input power factor of over 0.98, peak efficiency of 93.9%, and output voltage ripple of less than 3%, at 100-W output power. [ABSTRACT FROM PUBLISHER]

In this paper, a novel current fed hybrid dual active bridge dc–dc converter is proposed, which is suitable for a low-voltage fuel cell power conditioning system. The high-frequency input current ripple can be reduced to minimum because the input side switches are always switched at 50% duty cycles in spite of the fuel cell voltage and the load variation. Notch filter is used in the voltage feedback path to reduce the low-frequency input current ripple when interfaced with a single-phase inverter load. All of the power devices can achieve zero voltage switching by the proposed control strategy. The mode analysis, the operation principle, zero-voltage switching (ZVS) conditions, and parameter design are given in this paper. A 1 kW prototype has been fabricated to verify the effectiveness of the proposed converter and control strategy. [ABSTRACT FROM PUBLISHER]

This paper deals with a hybrid fault-tolerant converter topology. It is performed through the connection of a classical three-phase three-level neutral-point-clamped (3L-NPC) converter with a fourth three-level flying capacitor (3L-FC) leg. The 3L-FC leg actively balances the 3L-NPC neutral-point voltage. For normal operation mode, this paper proposes a mathematical design of the filter needed to connect these two different topologies. Experimentally, and thanks to the already existing decoupling capacitors of the 3L-NPC converter, this filter requires the addition of only one low size inductance. When one fault of the power switch of the 3L-NPC occurs, this paper proposes a hardware reconfiguration technique based on only two fuses and one thyristor per leg allows a safe postfault operation recovery. This is achieved thanks to a simple fault-detection method and a new technique that combines fault leg isolation and corresponding phase postfault connection to the neutral point. Also, a dedicated field-programmable gate array (FPGA)-based control of the reconfigured converter is synthetized to ensure power system availability under fault operation mode. The converter fault-tolerant capabilities are addressed through simulation results and original overall experimental validations of the fault detection and isolation and the postfault operation steps, carried out on a 15-kW prototype converter. [ABSTRACT FROM AUTHOR]

Resonant modular multilevel converters (RMMCs) have been proposed for high-voltage dc–dc applications. Using different modulation strategies, RMMC operates in different modes and achieves flexible step ratio. To provide a comprehensive study of RMMCs, this paper presents the modulation method achieving a wide range of step ratio with the ability of inherent-balancing. The conditions for guaranteeing the inherent-balancing ability are provided. The operation principle and performance of the RMMC are presented in this paper, which have been explored in a case study. The experimental results are obtained from a bench-scale setup, which have verified the theoretical analysis. [ABSTRACT FROM PUBLISHER]

High gain bidirectional dc–dc converter with high efficiency and high power density is a much desired circuit in any converter/inverter system. It is well known that switched capacitor circuits that are variants of the Dickson converter are suitable candidates for such a system. Modular design, absence of external magnetic components, and high efficiency are some of the features that make them suitable candidates. But, the inability to provide fractional and variable voltage gains at high efficiency during normal operation severely limits their application. It also leads to higher voltage stress in the overall system. The aim of this paper is twofold. First, a generalized modular switched capacitor converter, the “(n/m)X converter,” which is a variant of the original Dickson converter is introduced. Using this generalized configuration, the converter can be designed for a required fractional gain. Next, two different methods to enable dynamic variation in gain with high efficiency using the (n/m)X converter are proposed. Detailed analysis, design steps, equivalent circuits, and experimental results for a 1 kW prototype of a variable (4/0.5)X boost converter validate the proposed theory. A peak measured efficiency of over 95% is achieved for the prototype. The design framework and analysis in this paper can be extended to a generic (n/m)X converter. [ABSTRACT FROM AUTHOR]

This paper introduces a novel five-level nested neutral point piloted (NNPP) converter and analyzes the operating principle of five-level NNPP converter. This paper presents a novel space vector pulse width modulation (SVPWM) algorithm based on gh coordinate for five-level NNPP converter. First, the common-mode voltage is reduced by choosing the appropriate redundant switching states. After that, the floating-capacitor voltage balance control strategy is presented. The appropriate switch combinations of each phase are determined by the control requirements of floating-capacitor voltages respectively and the hardware mapping method of the switching states is presented. Furthermore, the neutral-point voltage balance control strategy is presented. In order to balance the dc-link capacitor voltages, the seven-segment switching sequence is selected according to the control requirements of dc-link capacitor voltages and the neutral-point voltage regulatory factor is introduced to regulate the durations of the redundant switching states in a switching cycle. Finally, the validity of the novel SVPWM algorithm with decoupling control strategies of floating-capacitor voltages and dc-link capacitor voltages is verified by the experimental results of five-level NNPP converter under steady-state and dynamic conditions. [ABSTRACT FROM AUTHOR]

A new static synchronous compensator (STATCOM) based on the diode-clamped modular multilevel converter (DCM2 C) is proposed in this paper. In this converter topology, the capacitor voltage is clamped by using a low power rating diode in each submodule. The quantity of voltage sensors is significantly reduced and is free from the number of voltage levels. Furthermore, the voltage balancing control method becomes very simple and the capacitor voltage balance speed is fast. Based on the structure of modular multilevel converter, the DCM2C-STATCOM has the capability of Var compensation and negative-sequence current compensation. The topology characteristics and compensation control method of DCM2C-STATCOM are investigated in this paper. Experimental results obtained from a laboratory prototype validate that the capacitor voltage of the proposed DCM2C-STATCOM can be well balanced and the Var and negative-sequence current compensations are effective. [ABSTRACT FROM AUTHOR]

The objective of this paper is to propose a novel photovoltaic (PV) micro-inverter with PV current decoupling (PVCD) strategy to achieve maximum power point tracking (MPPT) performance without using large electrolytic capacitors. Conventionally, the grid-connected PV micro-inverter needs a large PV-side electrolytic capacitor to suppress the double-line frequency voltage ripple, which is caused by the injected ac grid power, to achieve the desired MPPT performance. However, the short lifetime electrolytic capacitor will reduce the PV micro-inverter's reliability dramatically. Therefore, different active power decoupling circuits (APDCs) have been proposed in published papers to reduce the required input capacitance so that the long lifetime film capacitor can be used to replace the electrolytic capacitor. Unlike the conventional APDC with charging and discharging modes operation, a novel PVCD strategy, which is based on the concept of current decoupling instead of power decoupling, is proposed to simplify the control mechanism of the PV micro-inverter. Furthermore, to accomplish the proposed current decoupling concept, a novel circuit topology for the PV micro-inverter is also proposed. With the proposed PVCD strategy, the current decoupling tank (CDT) inside the proposed PV micro-inverter can buffer the current difference between the constant current from the PV panel and the rectified sinusoidal current of the ac grid current. Therefore, the input capacitance on the PV-side can be reduced dramatically and the long lifetime film capacitor can be used to replace the electrolytic capacitor. The reliability of the PV micro-inverter with good MPPT performance can be increased. In this paper, the operation principle and the component design of the proposed PV micro-inverter with PVCD strategy will be presented. Simulation results and experimental results of a prototype 240 W PV micro-inverter is shown to verify the performance of the PV micro-inverter with PVCD strategy. [ABSTRACT FROM AUTHOR]