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This paper presents a simple three‐dimensional space vector modulation method in ghγ coordinates for a three‐level four‐leg neutral‐point‐clamped inverter. The idea uses redundant vectors as centre points to establish two‐level space vector diagrams simplifying the original space, the first sector of which is designated as subspaces, where a modulation process is implemented. The duty cycle and all possible switching sequences in a tetrahedron can be calculated automatically without manual storage and can avoid a full‐scale search process. Additionally, the neutral point potential can be balanced by three types of charge through cancellation. Such features enable the inverter to demonstrate good performance under closed‐loop control. Moreover, the proposed method can be applied to a multilevel inverter. Simulation and experimental results demonstrate the effectiveness of the proposed concept. [ABSTRACT FROM AUTHOR]

This paper deals with the design, implementation, and measurements of a frequency converter with bipolar sinusoidal pulse width modulation (SPWM) of output voltage for two-phase induction motors. The paper is dedicated to an analysis of the operation of a two-phase frequency converter and its implementation. The inverter has a single-phase H-bridge topology with split DC link and bipolar switching to minimise the number of components. Insulated gate bipolar transistors (IGBTs) are used in the realisation of the inverter power section. The inverter is controlled using a digital signal processor (DSP) TMS320F28335. Measurements with a 0.12 kW two-phase induction motor were performed to verify the correct operation of the inverter. The influence of the switching frequency on the motor current ripple is measured for frequencies of the first harmonic up to 100 Hz. [ABSTRACT FROM AUTHOR]

Recent advancements in power electronics technology evolves inverter fed electric motors. Speed signals and rotor position are essential for controlling an electric motor accurately. In this paper, the sensorless speed control of surfacemounted permanent magnet synchronous motor (SPMSM) has been attempted. SPMSM wants a digital inverter for its precise working. Hence, this study incorporates fifteen level inverter to the SPMSM. A sliding mode observer (SMO) based sensorless speed control scheme is projected to determine rotor spot and speed of the multilevel inverter (MLI) fed SPMSM. MLI has been operated using a multi carrier pulse width modulation (MCPWM) strategy for generation of fifteen level voltages. The simulation works are executed with MATLAB/SIMULINK software. The steadiness and the heftiness of the projected model have been investigated under no loaded and loaded situations of SPMSM. Furthermore, the projected method can be adapted for electric vehicles. [ABSTRACT FROM AUTHOR]

Multilevel inverters have emerged as a viable alternative for various power electronic applications. It offers significant features in terms of reduced total harmonic distortion (THD) due to more number of output voltage levels, lower filter size, and voltage stress and reduced switching losses when compared to conventional two-level inverters. The classical topologies such as neutral point clamped, flying capacitor and cascaded H-bridge (CHB) are very popular for industrial applications. All these topologies have limitations in terms of more component count, capacitor voltage balancing for increased number of voltage levels. In this regard, multi-level DC link (MLDCL) inverter has been introduced as an improvement with respect to CHB MLI in terms of reduced switch count and is considered here for the study. This paper presents a single-phase MLDC link inverter with a modified carrier-based level-shifted phase disposition sinusoidal pulse width modulation (LS-PD-SPWM) technique. The proposed novel carrier PWM is compared with the conventional modulation techniques in terms of THD. The performance of the proposed modulation technique is analyzed through simulation studies in MATLAB software. A laboratory prototype model is developed in order to validate the experimental results. [ABSTRACT FROM AUTHOR]

An appropriate numerical computational method and simplest model captures the performance of Switched Reluctance Machines (SRMs). Several papers and computer software-based simulation models are reported in the literature. Each model has its own merits and demerits. This paper proposes a mathematical model, based on a combination of voltage and mechanical equations, suitable for the transient running of a switched reluctance machine. The simulation results of current, torque and speed profile of SRM are produced under current chopping control and voltage pulse width modulation control. The proposed work has used experimental data of flux linkage and static torque in the mathematical model for best performance and control of the machine. The obtained simulation results are verified with experimental results. This model can be extended to a range of rotor position where the machine can be switched at decreased and increased inductance region which gives motoring and generating operation mode. [ABSTRACT FROM AUTHOR]

In recent years, there has been a growing need for the development of low-power gas sensors. This paper proposes pulse heating and a corresponding measurement strategy using a Pulse Width Modulation (PWM) signal to realize the ultra-low power consumption for metal oxide semiconductor (MOS) gas sensors. A Micro-Hot-Plate (MHP) substrate was chosen to investigate the temperature and power characteristics of the MHP under different applied heating methods. The temperature of this given substrate could respond to the applied voltage within 0.1 s, proving the prac ticability of a pulse heating strategy. In addition, Pd-doped SnO2 was synthesized as the sensing material in the implementation of an ultra-low power gas sensor. The sensing performance and power consumption under different conditions were compared in the detection of reducing gases such as ethanol (C2H5OH) and formaldehyde (HCHO). Additionally, the results revealed that the sensor could work under PWM excitation while reducing the operating power to less than 1mW. The features shown in the measurements provide the feasibility for MOS gas sensors' application in wearable and portable devices. [ABSTRACT FROM AUTHOR]

Direct power control (DPC) has gained increasing attention in recent years as a simple and efficient control strategy for pulse width modulation (PWM) rectifiers. In this paper, the idea of DPC is introduced into the three-phase coupled inductor-based bipolar-output active rectifier (TCIBAR) for the first time, and a virtual vector-based direct power control (VVB-DPC) strategy is proposed for TCIBAR to realize the bipolar DC power supply for more electric aircraft (MEA). First, the mathematical model of the TCIBAR is deduced, and the basic principle of the classic DPC strategy is reviewed. On this basis, the limitations of the classic DPC strategy in TCIBAR control are analyzed. Second, a set of virtual vectors are derived to establish a novel virtual-vector switching table. Based on the virtual-vector switching table, the hysteresis power control of TCIBAR can be realized without affecting the DC-side neutral-point potential of TCIBAR. Finally, a neutral-point potential control method based on DPC architecture is studied and integrated into the VVB-DPC strategy to maintain the bipolar DC voltage balance of TCIBAR under unbalanced load conditions. The VVB-DPC strategy is experimentally studied on a TCIBAR prototype, and the experimental results verify the feasibility and effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

Compared with other topologies, the modular multilevel converter (MMC) has the advantages of higher scalability and lower harmonic distortion. When carrier-based pulse-width modulation approaches are used for the MMC, the number of carriers increases for more sub-modules, and the complexity of the control and the memory required increases as a result. In addition, the synchronization of several carriers is another issue. Due to the unique constructional characteristics of the MMC, circulating currents will be generated internally, causing distortions in the arm currents and, thus, unnecessary converter losses. In this paper, an improved 2N+1 pulse-width modulation approach with low control complexity and a circulating current suppression strategy are proposed. Firstly, the conventional carrier phase-shifted 2N+1 pulse-width modulation approach is improved so that the number of carrier signals adopted in each arm is always two. Secondly, the redundant switching states are used to suppress the circulating current. Finally, the effectiveness of the proposed strategy is verified experimentally. The results show that the proposed method reduces the control complexity while retaining the output performance. Meanwhile, the circulating current can be suppressed. [ABSTRACT FROM AUTHOR]

This paper proposes a simple mathematical model based on the variable fractional-order difference equation of a robot arm. The model of the described arm does not consider the impact of the movement of the mobile platform, it was assumed that all degrees of freedom would be taken away from it. The implementation of the task was divided into two stages. First, a mechanical model was developed. In order to estimate the torques of nodal propulsion motors, a description of the components of the Lagrange equation for the considered system, i.e., energy, power, and external interactions, and derivation of the equations of motion of the tested manipulator based on the Lagrange equation was made. An additional criterion was also considered in the selection of drives in the kinematic nodes of the links, which was to set the manipulator in a vertical position at a specific time. Processing the measured data of a robot arm, model parameters were selected, and the order function was chosen. The second stage was a simulation, whose results were compared with the collected data. [ABSTRACT FROM AUTHOR]

A power management unit (PMU) is an essential block for diversified multi-functional low-power Internet of Things (IoT) and biomedical electronics. This paper includes a theoretical analysis of a high current, single-stage ac-dc, reconfigurable, dual output, regulating rectifier consisting of pulse width modulation (PWM) and pulse frequency modulation (PFM). The regulating rectifier provides two independently regulated supply voltages of 1.8 V and 3.3 V from an input ac voltage. The PFM control feedback consists of feedback-driven regulation to adjust the driving frequency of the power transistors through adaptive buffers in the active rectifier. The PWM/PFM mode control provides a feedback loop to adjust the conduction duration accurately and minimize power losses. The design also includes an adiabatic charge pump (CP) to provide a higher voltage level. The adiabatic CP consists of latch-up and power-saving topologies to enhance its power efficiency. Simulation results show that the dual regulating rectifier has 94.3% voltage conversion efficiency with an ac input magnitude of 3.5 Vp. The power conversion efficiency of the regulated 3.3 V output voltage is 82.3%. The adiabatic CP has an overall voltage conversion efficiency (VCE) of 92.9% with a total on-chip capacitance of 60 pF. The circuit was designed using 180 nm CMOS technology. [ABSTRACT FROM AUTHOR]

Maximum power point tracking (MPPT) controllers have already achieved remarkable efficiencies. For smaller photovoltaic (PV) systems, any improvement will not really be worth mentioning as an achievement. However, for large solar farms, even a fractional improvement will eventually create a significant impact. This paper presents an MPPT control scheme using global sliding mode control (GSMC) with adaptive gain scheduling. In the two-loop controller, the first loop determines the maximum power point (MPP) reference using online calculations, while the GSMC with adaptive gain scheduling in the second loop adjusts the boost converter's pulse width modulation (PWM) to force the PV system to operate at the MPP with improved performance. The adaptive gain scheduling regulates the gain of the switching control to maintain the controller performance over a wide range of operating conditions, while GSMC guarantees the system robustness throughout the control process by eliminating the reaching phase and improving MPPT performance. The overall PV system also has Lyapunov stability. Furthermore, the robustness analysis of the proposed controller is also performed under load variations and parametric uncertainties at various temperatures and irradiances. In the simulations, the proposed MPPT control scheme has shown faster response than other controllers, reaching the set point with rise time 0.03 s as compared to 0.07 s and 0.13 s for quasi sliding mode control (QSMC) and conventional sliding mode control (CSMC), respectively. The proposed controller showed an overshoot of 1.2 V around a steady state value of 21.9 V as compared to 1.51 V and 1.45 V, respectively, for QSMC and CSMC for a certain parametric variation. Furthermore, the proposed controller and the QSMC-based scheme showed a steady-state error of 0.3 V, while the CSMC-based approach has a more significant error. In conclusion, the proposed MPPT control scheme has a faster response and low tracking error with minimal oscillations. [ABSTRACT FROM AUTHOR]

This paper presents a medium-voltage drive based on an open-end winding induction machine supplied by a multilevel power converter topology. The power converter consists of cascaded two-level three-phase voltage source inverters (VSI) connected to each side of the machine windings and each VSI is fed by an isolated DC supply. The topology has been previously reported in the literature as a sinusoidal pulse-width modulation operating in an open loop. In this work, a closed-loop model predictive control (MPC) strategy is proposed. MPC offers a much simpler method to control the power switches of the inverter compared to complex modulation strategies that are typically used in multilevel converters. Moreover, the advantage of reducing the common-mode voltage offered by the open-end winding configuration is fully exploited in this work. Simulation results are presented to validate the performance of the proposed topology and control method. [ABSTRACT FROM AUTHOR]

Double modulation wave carrier-based pulse width modulation (CBPWM) is a solution for eliminating the deviations of the neutral-point voltage (NPV) in three-level neutral-point clamped inverters. In this paper, a new hybrid CBPWM strategy is proposed that not only eliminates the neutral-point voltage oscillations but also reduces the common-mode voltage (CMV) by half. Furthermore, the harmonic content is also reduced compared with the available reduced CMV modulation by adjusting the modulation waves based on the location of the reference vector in the space vector diagram. An active neutral-point voltage controller is also realized in order to maintain the performance of the modulation strategy under the NPV perturbations. The performance of the proposed algorithm is compared to the available CBPWM-based techniques in the literature. The effectiveness of the proposed method is also verified by experimental results. [ABSTRACT FROM AUTHOR]

One of the most common issues in inverters are open-circuit faults (OPF). In this scenario, a proper fault-tolerant technique must be used to improve the motor performance. Although basic fault-tolerant modulation techniques are normally preferred, this paper proposes a discontinuous pulse-width modulation algorithm (HD-PWM) to operate five-phase inverters under a single OPF. In particular, loss equalization between the remaining switches after a fault occurs is the main objective of the HD-PWM algorithm, thus preventing future faults from occurring. The efficiency and harmonic distortion of the proposed technique are compared to the well-known sinusoidal PWM by simulation and experimentation under OPF conditions. The results obtained show a great performance of the proposed modulation technique, obtaining a relevant efficiency improvement. [ABSTRACT FROM AUTHOR]

This paper presents a unique voltage-raising topology for a singlephase seven-level inverter with triple output voltage gain using single input source and two switched capacitors. The output voltage has been boosted up to three times the value of input voltage by configuring the switched capacitors in series and parallel combinations which eliminates the use of additional step-up converters and transformers. The selective harmonic elimination (SHE) approach is used to remove the lower-order harmonics. The optimal switching angles for SHE is determined using the genetic algorithm. These switching angles are combined with a level-shifted pulse width modulation (PWM) technique for pulse generation, resulting in reduced total harmonic distortion (THD). A detailed comparison has been made against other relevant seven-level inverter topologies in terms of the number of switches, drivers, diodes, capacitors, and boosting facilities to emphasize the benefits of the proposed model. The proposed topology is simulated using MATLAB/SIMULINK and an experimental prototype has been developed to validate the results. The Digital Signal Processing (DSP) TMS320F2812 board is used to generate the switching pulses for the proposed technique and the experimental results concur with the simulated model outputs. [ABSTRACT FROM AUTHOR]

Introduction. In recent years the usage of electricity has increased tremendously as the electrical needs and loads got increased. Hence the researchers focused on the electricity generation from renewable sources in order to promote sustainable green environment. Owing to the lesser cost and more reliable high efficiency system with reduced use of equipments became prominent for the grid connected photovoltaic single phase systems. The novelty of this proposed converters are to reduce total power loss and to analyze the performance of the converter under various modulation index and to have lesser harmonics using sinusoidal pulse width modulation technique for both T-type and F-type inverter. Interest of the work is to merge two DC-DC converters which have same output voltage in order to have transformer less utilization of power. This has given pathway to develop a new DC-DC converter network by merging the common input nodes of CUK and SEPIC converter. Purpose. This similar structure of both converters made it easy to combine the input stages of and to get bipolar output. Methods. Here we can get bipolar output without the utilization of transformer which minimizes the overall size of the proposed system. In this paper, a combined CUK-SEPIC based grid connected transformerless inverter for photovoltaic application is suggested. Results. The suggested converter is simulated using MATLAB and the results were discussed. Further the circuit is extended with a 1 kW F-type inverter to demonstrate grid connection of the converter. Practical value. This converter can be implemented for photovoltaic applications for obtaining the bipolar DC output from the DC source. [ABSTRACT FROM AUTHOR]

Introduction. In this world of technical advancement, conventional resources are at the stage of destruction. To avoid such problems, we are going to use an alternative energy source namely solar by photovoltaic effect. The demand for multilevel inverters increased as they are used for different dynamic (high) voltage and dynamic (high) power appliances as they are capable of producing the output wave shape with low total harmonic distortion. Novelty. A new multilevel inverter is used in adding a (bidirectional) two way switch in between the capacitor and a traditional H-bridge module. This produces a better sine wave. By series connection of these two H-bridge modules, nine levels output voltage including zero is possible. The purpose of the proposed topology is reduction in the number of switches and it gives the good result with comparatively less power loss when it is compared with the other normal basic traditional inverters of the same output quality. Methods. In this paper, sinusoidal pulse width modulation technique is used for the working of the switches in the multilevel inverter. The results are verified by using simulation and also experimental setup is done. From the results it is observed that the proposed topology with reduced number of switches gives lower electromagnetic interference, lower harmonic distortion. Practical value. The total harmonic distortion value in the simulation is 14.4 % and practically it is 13.8 %. [ABSTRACT FROM AUTHOR]

In this paper, a novel hysteresis-based current control approach is presented. The basis of the developed control approach is the theory of switched systems, in particular, the system class of switched systems with multiple equilibria. The proposed approach guarantees the convergence of the state trajectory into a region around a reference trajectory by selective switching between the individual subsystems. Here, the reference trajectory is allowed to be time varying, but lies within the state space spanned by the subsystem equilibria. Since already published approaches only show convergence to a common equilibrium of all subsystems, the extension to the mentioned state space is a significant novelty. Moreover, the approach is not limited to the number of state variables, nor to the number of subsystems. Thus, the applicability to a large number of systems is given. In the course of the paper, the theoretical basics of the approach are first explained by referring to a trivial example system. Then, it is shown how the theory can be applied to a practical application of a voltage source converter that is connected to a permanent-magnet synchronous motor. After deriving the limits of the presented control strategy, a simulation study confirms the applicability on the converter system. The paper closes with a detailed discussion about the given results. [ABSTRACT FROM AUTHOR]

Utility engineers, professionals from regulatory agencies, manufacturers and researchers have discussed if high-frequency distortions produced by rooftop photovoltaic generators are a general power quality concern for distribution systems. In this context, this paper presents the results of an extensive research to investigate the emission and propagation characteristics of such high-frequency distortions. Analytical and theoretical analyses, computer simulations, laboratory experiments and field measurements revealed that high-frequency distortions emitted by rooftop photovoltaic inverters are produced with a voltage source characteristic. As a result, the equivalent grid impedance limits and attenuates significantly the high-frequency distortions injection and propagation into the distribution systems. Moreover, the front-end, low-pass filters found in many home appliances also contribute with such attenuation by sinking part of the high-frequency distortions. In summary, the results indicate that these distortions are unlikely to become a generalized power quality concern, so that the front-end filters commonly available for such devices, when properly designed, are enough to deal with this issue. [ABSTRACT FROM AUTHOR]

The implementation of finite-control-set model predictive control (FCS-MPC) in voltage source inverters (VSIs) can make the system suffer from poor current harmonics performance, which may complicate the design of the required AC filter. To overcome this shortcoming, a carrier-based modulated model predictive control (CB-MMPC) strategy is proposed in this paper. This method enables the utilization of existing PWM modulation techniques with FCS-MPC, where a modulation waveform with zero-sequence signal injection is generated and compared to a triangular carrier wave, while optimizing the selection of the switching states. As it is shown, the studied CB-MMPC strategy not only considerably improves the current total harmonic distortion (THD) but also attains the performance of fast current dynamic response and robustness as the traditional FCS-MPC. Herein, the detailed implementation of the CB-MMPC control strategy is given, while considering its application to the current feedback control loop of a three-phase three-wire two-level VSI modulated at constant switching frequency. Finally, PLECS circuit simulation and a 3-kW VSI prototype are used to verify the superiority and the effectiveness of the presented CB-MMPC strategy. This is also benchmarked to the FCS-MPC and dead-beat based controllers. [ABSTRACT FROM AUTHOR]

A hybrid switched-capacitor/interleaved boost converter able to provide a high voltage gain and to cancel the input current ripple at a preselected duty cycle was recently presented in the literature. This paper extends that work by proposing an optimized switching strategy for operating conditions at other values of duty cycle. The switching strategy effect on the converter's voltage gain and input current ripple is quantified and compared against the performance under the conventional switching strategy. The approach is validated in the laboratory through hardware prototyping. [ABSTRACT FROM PUBLISHER]

Exploiting the rich switching redundancies of the dual inverter, new hybrid pulsewidth-modulation (PWM) switching methods are proposed in this paper using the degree of freedom of operating the individual inverters independently, in addition to exercising the degree of freedom of controlling the switching action of the individual legs independently. Two voltage entities, namely, common-mode voltage (CMV) and differential-mode voltage are identified in the dual inverter, and all hybrid PWMs are envisaged aimed at reducing and also eliminating the CMV in it. The effects of such attempts on motor shaft voltage and also the motor bearing currents are presented in detail. Furthermore, bearing current profiles of an open-end winding induction motor are also presented with both conventional and hybrid PWMs proposed in this paper. Electric discharge machining discharge currents are completely eliminated with the use of all hybrid PWM methods proposed in this paper. In addition, implications of completely eliminating the CMV are also presented in this paper. All hybrid PWMs proposed in this paper are first simulated using MATLAB and are experimentally verified on a dual two-level inverter feeding a 1.1-kW 415-V 3- $\phi$ open-end winding induction motor drive. [ABSTRACT FROM PUBLISHER]

Multilevel inverters with dodecagonal (12-sided polygon) voltage space vector structure have advantages, such as complete elimination of fifth and seventh harmonics, reduction in electromagnetic interference, reduction in device voltage ratings, reduction of switching frequency, extension of linear modulation range, etc., making it a viable option for high-power medium-voltage drives. This paper proposes two power circuit topologies capable of generating multilevel dodecagonal voltage space vector structure with symmetric triangles (for the first time) with minimum number of dc-link power supplies and floating capacitor H-bridges. The first power topology is composed of two hybrid cascaded five-level inverters connected to either side of an open-end winding induction machine. Each inverter consists of a three-level neutral-point-clamped inverter, which is cascaded with an isolated H-bridge making it a five-level inverter. The second topology is for a normal induction motor. Both of these circuit topologies have inherent capacitor balancing for floating H-bridges for all modulation indexes, including transient operations. The proposed topologies do not require any precharging circuitry for startup. A simple pulsewidth modulation timing calculation method for space vector modulation is also presented in this paper. Due to the symmetric arrangement of congruent triangles within the voltage space vector structure, the timing computation requires only the sampled reference values and does not require any offline computation, lookup tables, or angle computation. Experimental results for steady-state operation and transient operation are also presented to validate the proposed concept. [ABSTRACT FROM PUBLISHER]

This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper. [ABSTRACT FROM AUTHOR]

Chaotic sinusoidal pulse width modulation (SPWM) can be used to suppress the electromagnetic interference in power converters. In this paper, a mathematical method for estimating power losses in insulated-gate bipolar transistors and freewheeling diodes occurring under chaotic frequency modulation SPWM (CFM-SPWM) switching is proposed. This method is based on the features of the chaotic mapping and uses semiconductor datasheet information to calculate the power losses in a discrete way. Analytical expressions and approximations for estimating the losses for the cases of SPWM and CFM-SPWM switching, respectively, are presented. This paper includes a quantitative comparison of the losses under the two previously mentioned cases. It is confirmed that CFM-SPWM does not result in higher power losses when it greatly improves electromagnetic compatibility of power converters, and hence, its adoption will not require any modified converter thermal design. Experimental results taken from a single-phase ac–dc converter are presented to prove the validity of the proposed method and associated results. [ABSTRACT FROM PUBLISHER]

The shunt regulator is a key part of the power conditioning unit, which is becoming more and more important in the spacecrafts. Due to the nonlinear link, the switch operating with hysteresis control, the shunt regulator is a nonlinear system; however, the stability analysis method for the system is still grounded on the approximate linearization method, which neglects some of the ac and dc characteristics. In this paper, a novel stability analysis method for the nonlinear systems is proposed based on the describing function, which can be used to model the nonlinear link in the shunt regulator system. Further, the different conclusion of the shunt regulator system stability are drawn, by the approximate linearization method and the stability analysis method proposed in this paper, respectively. Finally, the simulation and experimental results prove the correctness of the stability analysis method with describing function and discover the incompletion of the approximate linearization methods on the stability analysis. Therefore, this paper provides a new way to analyze the stability of the nonlinear systems. [ABSTRACT FROM PUBLISHER]

A modified-virtual-space-vector-based dc-link voltage balancing strategy is proposed in this paper for a three-level inverter. In the proposed strategy, the summation of the three-phase currents for virtual vector needs not to be zero and it also keeps the two capacitor voltages balanced with wider range of load variations. The duty cycles for all the power switches are also derived in this paper using a nearest three-voltage vector scheme. Due to the reduced use of the medium voltage vectors, the proposed control strategy can considerably decrease the neutral-point voltage fluctuation for lower power-factor-based loads as well. Detailed simulation and experimental studies are also carried out to show the effectiveness of the proposed system with a dc-link voltage balancing strategy with permanent magnet synchronous machine. Voltage and current harmonic distortions are also presented with change in modulation index. A Dspace-based real-time operating system is used for real-time implementation with a 6.0-kW surface permanent magnet synchronous motor. [ABSTRACT FROM PUBLISHER]

At present, with the development of wireless communication and microcomputer control system, the design and construction level of long-span bridges in China are also improving. How to improve the durability of bridge structure has become a major scientific and technological problem in bridge design and construction. This paper studies a microcomputer control system of bridge dehumidification based on energy consumption optimization and wireless communication. It compares three kinds of dehumidification and anticorrosion methods of bridge engineering, namely, freezing dehumidification system, rotary dehumidification system, and hybrid dehumidification system. In the hardware design of microcomputer control system of dehumidification system, ATmega128 bit main control chip and aluminum designer are used to draw the power circuit. Then, the MCU program of the air dehumidifier is written, and the power of the air dehumidifier is controlled by the PWM signal generated by the timer 0 of the MCU. The air dehumidifier is divided into three tap positions corresponding to three duty cycles, and the power of the air dehumidifier is changed according to the input tap position. [ABSTRACT FROM AUTHOR]

This paper presents the fuzzy-based Space Vector Pulse Width Modulation (SVPWM) for 5-level Neutral Point Clamped inverter with hybrid energy source fed grid connected system. The proposed scheme is energized using Photovoltaic and Wind energy system combination. The Neural Network-(NN) based Maximum Power Point Tracking algorithm (MPPT) has been implemented to track maximum power under different operating conditions. First, we proposed fuzzy-based SVPWM, which is developed for 5-level NPC inverter to provide voltage and current control, reduced THD, predetermined switching pattern, capacitor voltage unbalance minimization and maintain good control under nonlinearities and suspicions of PV-Wind energy connected hybrid system. Second, we proposed the inverter output voltage, which has been synchronized with grid connected system using split inductor (SI). The reference voltages for SVPWM implementation were obtained using feedback current control method. Third, we proposed different solar radiations, the proposed system has attained better performance by trailing maximum power from hybrid energy system. The simulation and experimental responses have been validated using Matlab/simulink and FPGA processor. [ABSTRACT FROM AUTHOR]

The most prevalent reason for IGBT failure in voltage-source inverter (VSI) is thermal stress, which is influenced by the topology and modulation technique adopted. Hence, it is crucial to understand the impact of common sinusoidal pulse width modulation (PWM) strategies on the thermal behavior of VSI and develop improved PWM techniques. This paper presents an alternate hybrid PWM (AHPWM) switching sequence for a single-phase VSI to decrease its thermal stress and prolong its lifetime. To evaluate the number of cycles to failure of VSI, power loss and thermal analysis were conducted for VSI with AHPWM and compared with conventional PWMs. The thermal cycles experienced by IGBTs with different modulation techniques were experimentally validated using a laboratory prototype of VSI. These findings suggest that by employing AHPWM, the likelihood of VSI failure is reduced by at least one-and-a-half times, resulting in lower VSI maintenance costs. [ABSTRACT FROM AUTHOR]

Insulated gate bipolar transistor (IGBT) modules are widely used as power switching devices. In actual working conditions, the failure of bonding wires is one of the most important failure modes. At present, the influence of bonding wire failure is not considered in the reliability evaluation of the device, resulting in a large error in the life prediction result. Therefore, this paper proposes a life evaluation method for IGBT modules that takes into account the failure of the bonding wire. The transient thermal impedance of 1200 V/50 A IGBT module under the failure conditions of different numbers of bonding wires is calculated by constructing a finite element simulation model of device electro‐thermal coupling. Both simulation and experimental results show that with the increase of the number of bonding wire failures, the transient thermal impedance curve of the device rises and the steady‐state thermal impedance increases. The Foster thermal network models of the devices are updated, and the number of power cycles of the device with bonding wire failure under DC and sinusoidal pulse width modulation (SPWM) conditions is calculated. When the number of bonding wire failures and fatigue accumulation have a linear relationship, the life will be reduced by 48.29% compared to the healthy state. [ABSTRACT FROM AUTHOR]

This paper describes a high-frequency soft-switching dc-dc converter with a simple energy recovery capacitor snubber on the secondary side. The presented dc-dc full-bridge converter with the energy recovery snubber removes the main drawbacks of the classic Phase Shifted PWM (PS-PWM) dc-dc converter, e.g., the circulating current flowing during the free-wheeling interval and dependency of the soft switching on the load current. The converter utilizes a full-bridge topology with pulse-width modulation and a centre-tapped full-wave controlled rectifier with one active switch. The zero-voltage switching on the primary side is ensured by utilising only the magnetizing current of the high-frequency transformer, and thus is load-independent. The proposed energy recovery snubber is described in detailed time waveforms of the converter and verified by simulation. The control algorithm also removes the circulating current, which is typical for PS-PWM converters. The soft-switching of the secondary side transistor is achieved by a simple capacitor snubber with an energy-recovery circuit connected to the output of the dc-dc converter. The principle of operation is verified by measurements on a 2 kW, 50 kHz laboratory model of the proposed dc-dc converter. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) have been conceived as an alternative in front-end converter applications to enhance the converter system's reliability, minimize total harmonic distortion, and improve power quality. These converters utilize several DC-link capacitors and power electronic switches, along with switches operating with high switching frequencies, to attain the desired characteristics. Thereby, this paper systematically proposes a novel three-phase asymmetric hybrid modular multilevel converter (AHMMC) for front-end converters used in lower-medium-voltage applications. The AHMMC configuration is based on a three-phase converter connected to a per-phase series arrangement with a cascaded converter module (CCM). The study investigates the AHMMC and proposes a control scheme, which minimizes the voltage range on switches and maintains the current to its reference value. Furthermore, the study also introduces an active balancing of voltage across DC-link capacitors based on the phase opposition disposition PWM (POD-PWM) method. Our new configuration has features such as low switching loss, reduced DC-link voltage, a wider modulation range for the unity power factor (PF), and low voltage and current harmonic distortion. The simulation results are added to verify the performance of the new AHMMC topology and the usefulness of the modular control scheme. In addition, a low-voltage laboratory prototype based on customized control and power boards is built to validate the proposed converter and its control scheme in practice. [ABSTRACT FROM AUTHOR]

In the recent days, for the traction and electric vehicle (EV) applications, multiphase machines with pole phase modulation (PPM) technique have been proposed. The smoother operation during pole changeovers as well as steady‐state operations is a significant constraint while adopting the PPM‐based multiphase induction motor (PPMIM) drives for EV and traction applications. So, in this paper, the PPMIM dynamic model and associated vector control are proposed for attaining a smoother operation of the machine. The machine modelling equations and transformation matrices are implemented in an arbitrary reference frame by considering the different pole phase combinations. Based on the modelling equations, the indirect field‐oriented control (IFOC) is proposed for PPMIM drives by reflecting the associated changes in parameters for different pole phase modes. In the IFOC, for regulating the d‐axis and q‐axis current components, single PI control loops have been implemented for all pole‐phase combinations. The proposed IFOC scheme is robust and applicable for adopting any type of pulse width modulation. The experimental, as well as simulation results, are given to illustrate the potentiality of the proposed dynamic model and IFOC. The PPMIM machine performance during the steady state as well as pole changeovers in different pole phase modes are analyzed and associated. Simulation and experimental results are presented. [ABSTRACT FROM AUTHOR]

This paper proposes a step-up 3-Ф switched-capacitor multilevel inverter topology with minimal switch count and voltage stresses. The proposed topology is designed to provide five distinct output voltage levels from a single isolated dc source, making it suitable for medium and low-voltage applications. Each leg of the proposed topology contains four switches, one power diode, and a capacitor. The switching signals are also generated using a staircase universal modulation method. As a result, the proposed topology will operate at both low and high switching frequencies. To highlight the proposed topology's advantages, a comparison of three-phase topologies wasperformed in terms of the switching components, voltage stress, component count per level factor, and cost function withthe recent literature. The topology achieved an efficiency of about 96.7% with dynamic loading, and 75% of the switches experienced half of the peak output voltage (VDC), whereas the remaining switches experienced peak output voltage (2VDC) as voltage stress. The MATLAB/Simulink environment was used to simulate the proposed topology, and a laboratory prototype was also built to verify the inverter's theoretical justifications and real-time performance. [ABSTRACT FROM AUTHOR]

The modulation of a voltage source inverter output causes losses and harmonic distortions on the load side and the DC-link capacitor due to the discrete switching of the semiconductors. High-frequent voltage pulses are digitally programmed to control the inverter output and determine the harmonic distortions. This paper presents an optimization in terms of pulse- and frequency-pattern selection for reducing load distortions while keeping DC-link losses minimal. In detail, the fact that pulse and frequency patterns are independent from each other is utilized and a modified three-zone hybrid space vector pulse-width modulation is proposed where optimal frequency patterns are selected for every carrier cycle. Simulations and experimental results validate the optimizations. [ABSTRACT FROM AUTHOR]

Aimed at the pulse width modulation (PWM) voltage noise and power imbalance in three-phase cascaded H-Bridge (CHB) inverters, a modified random PWM (RPWM) strategy, named the power-balanced RPWM (PB-RPWM) strategy, is proposed in this paper. The PB-RPWM strategy mainly includes three steps: (1) random pulse signals are generated by compared modulation wave with level-shifted random carriers; (2) the random pulse signals are circularly distributed between CHB units by a logic operation method, and then the driving pulse signals of switching devices are produced; (3) the driving pulse signals are used to control the inverter. Under the PB-RPWM strategy, the spectra of the line voltage become uniform and continuous, that is, the PWM voltage noise of the line voltage can be effectively reduced. The output voltage of a single H-bridge unit can contain three basic voltages within 3/2 TA, that is, the power balance between CHB units can be realized. When compared with conventional non-random and random PWM strategies, the PB-RPWM strategy has a lower PWM voltage noise and smaller total harmonic distortion (THD). When compared with the level-shifted PWM (LS-PWM) strategy, the PB-RPWM strategy has a balanced power performance. The effectiveness and feasibility of the PB-RPWM strategy is verified by abundant simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents a synaptic driving circuit design for processing in-memory (PIM) hardware with a thin-film transistor (TFT) embedded flash (eFlash) for a binary/ternary-weight neural network (NN). An eFlash-based synaptic cell capable of programming negative weight values to store binary/ternary weight values (i.e., ±1, 0) and synaptic driving circuits for erase, program, and read operations of synaptic arrays have been proposed. The proposed synaptic driving circuits improve the calculation accuracy of PIM operation by precisely programming the sensing current of the eFlash synaptic cell to the target current (50 nA ± 0.5 nA) using a pulse train. In addition, during PIM operation, the pulse-width modulation (PWM) conversion circuit converts 8-bit input data into one continuous PWM pulse to minimize non-linearity in the synaptic sensing current integration step of the neuron circuit. The prototype chip, including the proposed synaptic driving circuit, PWM conversion circuit, neuron circuit, and digital blocks, is designed and laid out as the accelerator for binary/ternary weighted NN with a size of 324 × 80 × 10 using a 0.35 μm CMOS process. Hybrid bonding technology using bump bonding and wire bonding is used to package the designed CMOS accelerator die and TFT eFlash-based synapse array dies into a single chip package. [ABSTRACT FROM AUTHOR]

This paper focuses on the steering motion control of an in-wheel motor-drive robot. The influence of the pulse-width modulation (PWM) duty cycle on steering motion and the steering control method have not yet been proved. Thus, this study aimed to design a steering controller for the off-center steer-by-wire system of a robot. The influence of the PWM duty cycle on the steering motion under different conditions is firstly tested on a test bench. Based on the optimal duty cycles of different cases found in the test, a two-stage fuzzy controller of the duty cycle is designed for the steering system. The first stage of the controller is used to dynamically adjust the PWM duty cycle of the electromagnetic friction lock (EFL). The second stage is designed to realize the self-tuning of the fuzzy controller's quantization factor and the scale factor. Through two-stage control, the motion of the in-wheel motor and the EFL can be coordinated to realize stable and rapid steering. Considering the robots' primary application in field roads at present, road tests were ultimately conducted to verify the proposed method. The test results show that the angle response rate of the steering arm is elevated with the increase in the steering angle signal. The proposed controller can sensitively track the target angles with smaller overshoot, yaw rate and lateral acceleration, and better steering accuracy than the PID (proportional–integral–differential) controller under different working conditions. [ABSTRACT FROM AUTHOR]

The evolution of power generation brings about extensive changes in other parts of the grid, especially in the transmission and distribution components. Within the scope of the Internet of Energy (IoE), electric power flows more flexibly between different parts of the grid. DC power will play an essential role in IoE. Decentralized photovoltaic panels, energy storage, electric vehicle charging stations, and data centers are some of the significant components of future grids dealing with DC power. As a result, power transformers must be appropriately modified to manage power among the different parts of the grid. A power electronic transformer (PET), also known as a solid-state transformer (SST) or smart transformer (ST), is a solution enabling a power grid to deal with this growing complexity. ROMAtrix, as a matrix-converter-based ST, is a developing project targeting future power grids. ROMAtrix realizes the application of a medium voltage (MV) transformer using commercially available power electronic semiconductors. Due to the distinctive features of ROMAtrix and a high number of switches, the implementation of the control system using a single control board is highly demanding. This paper aims to illustrate the implementation, on a field-programmable gate array (FPGA), of pulse width modulation (SVMPWM) applied to the ROMAtrix, considering specific switching patterns. The proposed switching procedure was simulated with PLECS and validated with the hardware-in-the-loop using the OPAL-RT solver. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter (MMC) consisting of half-bridge submodules (HBSMs) and full-bridge submodules (FBSMs) is a promising solution for overhead lines high-voltage direct current systems (HVDC) due to the advantages of direct current short circuit fault ride-through (DC-FRT) capability. This paper proposes an improved phase-disposition pulse width modulation (PDPWM) method for the hybrid modular multilevel converter. The number of carriers can be reduced from 3N (N is the number of submodules in each arm) to 6. The theoretical harmonic analysis of the improved PDPWM method for hybrid MMC is performed by using double Fourier integral analysis. The influence of three carrier displacement angles between HBSMs and FBSMs in the upper and lower arms on harmonic characteristics is investigated. The output voltage harmonics minimization PDPWM scheme and circulating current harmonics cancellation PDPWM scheme can be achieved by selecting the optimum carrier displacement angles, respectively. The proposed method for hybrid MMC is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

Multilevel inverters are able to provide loads with voltages of high power quality using several DC sources, capacitors, switches, and diodes in their structures. However, the usage of the higher number of semiconductor devices (switches and diodes) and capacitors causes an increase in losses and costs and decreases their efficiency. Thus, lowering the number of switches and capacitors is a challenging issue in designing a multilevel inverter. In this paper, an asymmetrical multilevel inverter is proposed that produces 19-level output voltages. The circuit is composed of nine switches, six diodes, two capacitors, and two isolated DC sources. In comparison with other topologies, the most important advantage of the introduced 19-level topology is the usage of a lower number of switches and capacitors, which leads to a decrease in the number of gate drivers and the total volume of the system. During the charging process, capacitors never connect to each other in series, i.e., they are self-balancing and do not require the extra circuits. The proposed topology offers a total harmonic distortion (THD) of 7.4% in the output voltage, which is less than 8%, complying with the IEEE standards. The performance of the topology is validated under various load conditioning through an experimental setup in the laboratory. [ABSTRACT FROM AUTHOR]

This paper proposes a new control strategy for single-phase voltage source inverters that does not rely on switching based on Pulse Width Modulation. The technique is similar to conventional current hysteresis control, but instead of the output current, the low-pass-filtered inverter output voltage is utilised as the feedback signal. Nevertheless, the switching instants are not determined by a predefined band, but rather by a low-cost Complex Programmable Logic Device (CPLD)-based control logic, which ensures a nearly constant switching frequency. Similar to hysteresis-based control methods, the proposed method ensures a rapid dynamic response. Notable characteristics of the proposed method include a quick dynamic response, a well-defined harmonic spectrum, and an improved total harmonic distortion (THD), particularly during load current and source voltage changes. The proposed method is implemented on a 1 kW, 230 V, 50 Hz prototype. Simulation and experimental results are presented to validate the proposed concept, which demonstrates a superior dynamic response and enhanced THD during load and source voltage variations. [ABSTRACT FROM AUTHOR]

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Selective harmonic elimination (SHE) is a suitable pulse‐width modulation (PWM) technique for some applications of modular multilevel converters (MMC) with lower number of semiconductor submodules (SM). However, SHE can make it difficult to control circulating currents in the MMC. Moreover, the MMC is vulnerable to SM switch failures that reduce its output power magnitude and quality. This paper proposes a fault‐tolerant model predictive control strategy for MMCs operating with SHE (FT SHE‐MPC). The effects of switch failure on phase voltage waveforms are studied first. Then, a method is proposed to design the FT SHE waveform to preserve its harmonic performance. Next, the proposed FT SHE‐MPC is designed to increase the capacitor voltages during an SM failure to maintain the fundamental component of the faulty phase voltage and control the circulating currents, maintaining balance among line voltages and the output power of the MMC. Additionally, the proposed method offers as much as 60% faster FT transition time and as much as 36% lower capacitor voltage ripple. The advantages of the proposed method are verified through offline and real‐time simulation studies on a three‐phase nine‐level MMC in PSCAD/EMTDC software and RTDS. [ABSTRACT FROM AUTHOR]

Multilevel inverter configurations are a great choice for medium and high power applications. This paper describes a novel five-level (2Vdc, Vdc, 0, Vdc, 2Vdc) boost multilevel inverter based on a single capacitor. The suggested single-phase arrangement has a single dc supply, eight switches, and one capacitor. The capacitor is charged in parallel and discharged in series connections while the inverter is operating in the charge-pump mode, which produces a greater output voltage. The suggested design calls for straightforward control operations, and a level-shift pulse width modulation technique is employed to drive the switches and provide the necessary pulse pattern. With this technique, the reference signal is compared to four carriers. The created inverter has a number of unique qualities, including its small size, simple control needs, boosting capabilities, and use of just one capacitor and one dc source. To assess the effectiveness of the created five-level architecture, the system is simulated using MATLAB/Simulink. The outcomes demonstrate that the constructed five-level multilevel inverter operates as predicted. [ABSTRACT FROM AUTHOR]

Inverters with Quasi-Z-Source Networks (QZSN) provide DC-DC boosting and DC-AC conversion in a single stage. It offers reduced cost, complexity, and volume compared with the classical two-stage conversion system, which is composed of a boost converter followed by a Voltage-Source-Inverter (VSI). Further, QZSI provides superior conversion characteristics for single-stage grid-connected photovoltaic transformerless systems. However, the absence of galvanic isolation in these systems makes it possible to allow leakage current through these systems' parasitic capacitances due to the high-frequency Common-Mode Voltage (CMV) generated by the Pulse Width Modulation (PWM) nature of the inverter output voltages. As a result of this current, critical safety issues may arise with PV systems. Many PWM techniques have been presented in recent years for QZSIs. This paper is intended to provide a comprehensive analysis and review study of the characteristics of most of these PWM techniques in terms of CMV and leakage currents. In this study, closed-form equations have been derived to determine the effective CMV and leakage current analyses for all modulation techniques. Analytical and simulation approaches are used to identify schemes with the lowest CMV and current leakage effects. Moreover, the experimental setup is presented by applying the Simple-Boost Modified Space Vector Modulation (SB-MSVM) technique. [ABSTRACT FROM AUTHOR]

In this paper, a high step-up three-level DC–DC converter with a symmetric structure for PV application is proposed. The converter has high voltage gain. This is achieved due to the use of two high step-up cells and two resonant paths in its structure. The converter has low input current ripples and the voltage stress across all switches is equal to half of the output voltage. The proposed converter uses simple pulse–width modulation (PWM) to trigger the switches. Hence, the proposed converter benefits from a simple structure and control circuit. All semiconductor devices are turned on/off under ZCS conditions. Thus, the switching losses are decreased, and the total efficiency is increased. The converter is implemented and tested through a laboratory prototype. The experimental results verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Space Vector Pulse Density Modulation (SVPDM) schemes for adjustable speed drives are digital modulation scheme with less computational overhead. The SVPDM based drives provide better spectral features and reduced acoustic noise in motor than Space Vector Pulse Width Modulation (SVPWM) drives. The discontinuous nature of SVPDM scheme is investigated in this article to find optimized zero vector selection in SVPDM schemes for adjustable speed control of induction motor. Five types of Discontinuous SVPDM (DSVPDM) schemes for two-level inverter are proposed in this paper based on selection of zero vectors. Analysis is carried out to find the optimized zero vector selection. Performances of the proposed DSVPDM schemes are compared with existing SVPDM and popular space vector based Discontinuous Pulse Width Modulation schemes. The DSVPDM schemes are validated for a 11.5 kVA two-level inverter driving a 3-HP three-phase induction motor using dSpace DS1104 real time interface platform. [ABSTRACT FROM AUTHOR]

Introduction. Cascaded H-bridge multilevel inverters (CHB-MLI) are becoming increasingly used in applications such as distribution systems, electrical traction systems, high voltage direct conversion systems, and many others. Despite the fact that multilevel inverters contain a large number of control switches, detecting a malfunction takes a significant amount of time. In the fault switch configurations diode included for freewheeling operation during open-fault condition. During short circuit fault conditions are carried out by the fuse, which can reveal the freewheeling current direction. The fault category can be identified independently and also failure of power switches harmed by the functioning and reliability of CHB-MLI. This paper investigates the effects and performance of open and short switching faults of multilevel inverters. Output voltage characteristics of 5 level MLI are frequently determined from distinctive switch faults with modulation index value of 0.85 is used during simulation analysis. In the simulation experiment for the modulation index value of 0.85, one second open and short circuit faults are created for the place of faulty switch. Fault is identified automatically by means of artificial neural network (ANN) technique using sinusoidal pulse width modulation based on distorted total harmonic distortion (THD) and managed by its own. The novelty of the proposed work consists of a fast Fourier transform (FFT) and ANN to identify faulty switch. Purpose. The proposed architecture is to identify faulty switch during open and short failures, which has to be reduced THD and make the system in reliable operation. Methods. The proposed topology is to be design and evaluate using MATLAB/Simulink platform. Results. Using the FFT and ANN approaches, the normal and faulty conditions of the MLI are explored, and the faulty switch is detected based on voltage changing patterns in the output. Practical value. The proposed topology has been very supportive for implementing non-conventional energy sources based multilevel inverter, which is connected to large demand in grid. References 22, tables 2, figures 17. [ABSTRACT FROM AUTHOR]