28 results on '"Haendler, S."'
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2. Hot-carrier evaluation of a zero-cost transistor developed via process optimization in an embedded non-volatile memory CMOS technology
3. Drain current local variability from linear to saturation region in 28 nm bulk NMOSFETs
4. Hot-carrier degradation model for nanoscale ultra-thin body ultra-thin box SOI MOSFETs suitable for circuit simulators
5. Characterization and modeling of drain current local variability in 28 and 14 nm FDSOI nMOSFETs
6. Low frequency noise variability in ultra scaled FD-SOI n-MOSFETs: Dependence on gate bias, frequency and temperature
7. Full gate voltage range Lambert-function based methodology for FDSOI MOSFET parameter extraction
8. Impact of local back biasing on performance in hybrid FDSOI/bulk high-k/metal gate low power (LP) technology
9. Unexpected impact of germanium content in SiGe bulk PMOSFETs
10. Characterization and modeling of low frequency noise in CMOS inverters
11. Improved analysis and modeling of low-frequency noise in nanoscale MOSFETs
12. Impact of a 10 nm ultra-thin BOX (UTBOX) and ground plane on FDSOI devices for 32 nm node and below
13. FDSOI devices with thin BOX and ground plane integration for 32 nm node and below
14. SOI Technologies Overview for Low-Power Low-Voltage Radio-Frequency Applications
15. Impact of front oxide quality on transient effects and low-frequency noise in partially and fully depleted SOI N-MOSFETs
16. Reliability of ultra-thin film deep submicron SIMOX nMOSFETs
17. Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors
18. Self-Heating Effect in FDSOI Transistors Down to Cryogenic Operation at 4.2 K.
19. Evolution of low frequency noise and noise variability through CMOS bulk technology nodes from 0.5 μm down to 20 nm
20. Low-Frequency Noise Investigation and Noise Variability Analysis in High- k/Metal Gate 32-nm CMOS Transistors.
21. Shrinking from 0.25 down to 0.12 μm SOI CMOS technology node: a contribution to low-frequency noise in partially depleted N-MOSFETs
22. <atl>Reliability of ultra-thin film deep submicron SIMOX nMOSFETs
23. Impact of Source–Drain Series Resistance on Drain Current Mismatch in Advanced Fully Depleted SOI n-MOSFETs.
24. Impact of low‐frequency noise variability on statistical parameter extraction in ultra‐scaled CMOS devices.
25. Impact of dynamic variability on the operation of CMOS inverter.
26. On the 1/f Noise in 0.15 μm Fully Depleted SOI/MOS Transistors.
27. Drain current local variability from linear to saturation region in 28 nm bulk NMOSFETs.
28. Dispersion study of DC and Low Frequency Noise in SiGe:C Heterojunction Bipolar Transistors used for mm-Wave to Terahertz applications.
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