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Going towards high‐resolution, uniform displays with a high‐brightness range requires optimizations on different topics. This work presents an overview on this subject. To achieve a good uniformity, a compensation method is proposed using a 2T1C pixel circuit, compatible with high‐resolution requirements, improving uniformity by a factor 52.5. In order to further increase the achievable resolution, a new technology stack, using a planar and a vertical TFT is introduced. For increasing the brightness range, a global dimming method, compatible with the 2T1C pixel circuit, is demonstrated. [ABSTRACT FROM AUTHOR]

This article presents an analytical method for parameter extraction in oxide semiconductor field-effect transistors (OS FETs), including threshold voltage (VT), effective channel length (Leff), source–drain series resistance (RSD), and intrinsic effective mobility (μint). An analytical expression of effective mobility (μeff) is implemented with the consideration of percolation conduction and RSD effects. This method relies on the concept of Y-function method and the channel length dependent measurement. The extraction results are compared to those from the combination of transfer length method (TLM). It has been shown that a better accuracy of the extracted parameters is achieved with the proposed method. Furthermore, transfer characteristics are resimulated based on the extracted parameters, in which a good match between measurement and simulation is obtained. [ABSTRACT FROM AUTHOR]

This paper analyzes the effect of high current under illumination stress (HCIS) in self-aligned amorphous indium gallium zinc oxide transistors with Al2O3 as high- $\kappa $ gate dielectric. A negative parallel threshold voltage $({V}_{T}$) shift with the appearance of hysteresis $(\Delta {V}_{{hys}})$ is observed after HCIS. In contrast to the double ionized oxygen vacancy ($\text{V}_{\text O}^{\text 2+}$) theory, a peroxide donor theory based on ${ab~ initio}$ calculations is proposed to explain the degradation. Several methods are carried out to support the mechanism, including $\Delta {V}_{{hys}}$ generation, stress recovery behavior and capacitance-voltage ${(C-V)}$ measurements. A linear dependence between initial ${V}_{T}$ and negative ${V}_{T}$ shift is observed that further supports the peroxide theory. This work highlights the importance of evaluating the HCIS for oxide base semiconductor devices. [ABSTRACT FROM AUTHOR]

We present dual‐gate (DG) dual‐layer (a‐ITZO and a‐IGZO) amorphous oxide TFTs integrated on polyimide (PI) foil. The fabricated TFTs show an apparent dual‐gate field‐effect mobility (µFE) of 45.0 cm2/ (V.s), sub‐threshold slope (SS−1) of 0.40 V/decade and ION/IOFF ratio of >108. The DG dual‐layer TFT based ring‐oscillators exhibit faster oscillation frequencies (fosc) compared to DG a‐IGZO TFT based ring‐oscillators. These TFTs are paving the way to faster scan drivers and higher resolution displays. It is also verified that with DG dual‐layer TFTs, the current variation can be reduced when applying an off‐panel compensation method to the asymmetric channel. [ABSTRACT FROM AUTHOR]

This work describes integrated readout electronics for on‐panel fingerprint detection, focusing on two key building blocks: charge sense amplifier (CSA) and analog‐to‐digital converter (ADC). The CSA has been realized in a dual‐gate self‐aligned IGZO thin‐film transistor (TFT) technology with channel length downsizing to 3µm, enabling 1.3mm bezel size for the peripheral readout electronics and 1fps readout of a 1‐Mpixel 500dpi sensor array. The ADC has been realized in two different transistor technologies, IGZO and Indium‐Tin‐Zinc‐Oxide (ITZO). The ITZO ADC achieves a sampling rate of 1kS/s, which is 7.5x faster compared to the IGZO ADC, due to the larger mobility of ITZO. [ABSTRACT FROM AUTHOR]

Among the diverse and ever-expanding list of candidate technologies to serve the Internet of Everything, the rise of thin-film transistors on plastic as active components for ubiquitous ICs has been nothing short of meteoric. The stage for this explosion of interest was set by a pivotal advantage of the low manufacturing cost and ultrathin form factor, as demonstrated in recent prototypes of thin-film radio frequency identification (RFID) tags. Most RFID tags use inductive antennas, whereas, in this paper, capacitively coupled antenna is presented. Advantages of capacitive-coupled tags are the monolithic integrated antenna, the compact size, the additional security due to very short range of operation, and the localization and orientation abilities. The main circuit block of the tag, a 12-bit code generator, is demonstrated achieving only 160 nW of power dissipation at 0.3 V power supply transmitting data at 810 b/s on a 18 $\mu \text{m}$ -thick plastic substrate. The footprint of the monolithic integrated antenna is 1 cm2 and essentially defines the size of the full tag. [ABSTRACT FROM AUTHOR]

In this paper, the influence of oxygen partial pressure (${P}_{\textsf {O2}}$) during physical vapor deposition on the field-effect mobility of amorphous InGaZnO (IGZO) thin-film transistor (TFT) is investigated in a wide range of ${P}_{\textsf {O2}}$. The field-effect mobility reduced from 12 to 0.1 cm $^{\textsf {2}}/\textsf {V}~\cdot $ s when the ${P}_{\textsf {O2}}$ is increased from 0.3 to 1.5 mTorr. Temperature-dependent TFT measurements suggest that carrier transport in the TFTs deposited at the ${P}_{\textsf {O2}}$ of 0.3 mTorr can be described according to the multiple trap and release/percolation model. However, the carrier transport in the TFTs deposited at the ${P}_{\textsf {O2}}$ of 1.5 mTorr conforms to Mott’s variable-range hopping model. The elastic recoil detection analysis indicates that hydrogen concentration in the IGZO film increased with ${P}_{\textsf {O2}}$. The X-ray photoelectron spectroscopy results indicate that In vacancy (${V}_{\textsf {In}}$) defects formed in the IGZO film deposited at high ${P}_{\textsf {O2}}$. Scattering induced by hydrogen and pinning of Fermi level below the conduction band edge by ${V}_{\textsf {In}}$ are plausible reasons for the low field-effect mobility in TFTs deposited at high ${P}_{\textsf {O2}}$. [ABSTRACT FROM AUTHOR]

We present a 350°C self‐aligned dual‐gate a‐IGZO backplane technology with a monolithically integrated multi‐layer high‐temperature thin‐film barrier for flexible AMOLED. Thin‐film barrier properties and TFT technology are optimized on 320 x 352mm substrates, and demonstrated in a flexible QQVGA 100 ppi AMOLED display prototype. [ABSTRACT FROM AUTHOR]

High-performance integrated tin monoxide bottom-gate staggered p-channel thin-film transistors (TFTs) are realized and reported. The active layer has been formed by thermal vacuum evaporation and rapid thermal annealing under a continuous nitrogen flow, resulting in field-effect mobilities up to 1.6 cm²/(V · s) and contact resistances of around 148Ω · cm. The integration of these TFTs in elementary building blocks for digital circuit applications such as inverters and ring-oscillators is demonstrated, resulting in stage delays down to 300 ns. Furthermore, a unipolar p-type-only 8-bit radio frequency identification code generator is realized, achieving 12.2 kb/s and comprising 294 tin monoxide TFTs. [ABSTRACT FROM AUTHOR]

In this work, we have reported dual-gate amorphous indium gallium zinc oxide thin-film transistors (a-IGZO TFTs), where a top-gate self-aligned TFTs has a secondary bottom gate and the TFT integration comprises only five mask steps. The electrical characteristics of a-IGZO TFTs under different gate control are compared. With the enhanced control of the channel with two gates connected together, parameters such as on current (ION), sub-threshold slope (SS−1), output resistance, and bias-stress instabilities are improved in comparison with single-gate control self-aligned a-IGZO TFTs. We have also investigated the applicability of the dual-gate a-IGZO TFTs in logic circuitry such as 19-stage ring oscillators. [ABSTRACT FROM AUTHOR]

We present a qHD (960x540 with 3 sub-pixels) top-emitting AMOLED display with 340ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil with humidity barrier. The back plane process flow is based on a 7 layer photolithography process with a CD=4um. We implement a 2T1C pixel engine and use commercial source driver IC made for LTPS. By using IGZO TFT and leveraging the extremely low off-current, we can switch-off the power to the source and gate driver while maintaining the image un-changed for several minutes. We demonstrate that, depending on the image content, low-refresh operation yields reduction in power consumption of up to 50% compared to normal (continuous) operation. We show that with further increase in resolution, the power saving through state retention will be even more significant. [ABSTRACT FROM AUTHOR]

We present a qHD (960 × 540 with three sub-pixels) top-emitting active-matrix organic light-emitting diode display with a 340-ppi resolution using a self-aligned IGZO thin-film transistor backplane on polyimide foil with a humidity barrier. The back plane process flow is based on a seven-layer photolithography process with a CD = 4 μm. We implement a 2T1C pixel engine and use a commercial source driver IC made for low-temperature polycrystalline silicon. By using an IGZO thin-film transistor and leveraging the extremely low off current, we can switch off the power to the source and gate driver while maintaining the image unchanged for several minutes. We demonstrate that, depending on the image content, low-refresh operation yields reduction in power consumption of up to 50% compared with normal (continuous) operation. We show that with the further increase in resolution, the power saving through state retention will be even more significant. [ABSTRACT FROM AUTHOR]

In this study, we have compared the performance of self-aligned a-IGZO thin-film transistors (TFTs) whereby the source/drain (S/D) region's conductivity enhanced in three different ways, that is, using SiNx interlayer plasma (hydrogen diffusion), using calcium (Ca as reducing metal) and using argon plasma (changing the atomic ratio). All these TFTs show comparable characteristics such as field-effect mobility (μFE) of over 10.0 cm²/(V.s), sub-threshold slope (SS-1) of 0.5 V/decade, and current ratio (ION/ IOFF) over 108. However, under negative-bias-illumination-stress (NBIS), all these TFTs showed strong degradation. We attributed this NBIS stability issue to the exposed S/D regions and changes in the conductivity of S/D contact regions. The hydrogen plasma-treated TFTs showed the worst NBIS characteristics. This is linked to increased hydrogen diffusion from the S/D contact regions to the channel. [ABSTRACT FROM AUTHOR]

In this work we present the impact of buffer layers deposited by various techniques such as plasma enhanced chemical deposition (PECVD), physical vapor deposition (PVD) and atomic layer deposition (ALD) techniques on self-aligned (SA) top gate amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) TFT characteristics. Finally an optimized layer was integrated in TFT backplane on polyimide (PI) foil and a QQVGA AMOLED display is demonstrated. [ABSTRACT FROM AUTHOR]

We present a QVGA (320x240 with 3 sub-pixel) top-emitting AMOLED display with 250ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil with full barrier. The back plane process flow is based on a 7 layer photolithography process. The aperture ratio of the top-emitting OLEDs is approx. 80%. An integrated gate driver is shown that can be driven at operation speed equivalent to a 4k2k display at 100Hz. [ABSTRACT FROM AUTHOR]

An integrated scan-line driver, driving half a QQVGA flexible AMOLED display using amorphous-IGZO backplane technology on foil, has been designed and measured. A pulse-width modulation technique has been implemented, enabling to drive the OLEDs with a duty cycle up to almost 100%. The digital driving method also results in a 40% static power reduction of the display. Dynamic logic and bootstrapping techniques enabled the use of clock frequencies up to 300kHz in unipolar amorphous-IGZO technologies on foil. [ABSTRACT FROM PUBLISHER]

A process to make self-aligned top-gate amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field-effect mobility of 12.0 cm2/(V.s), sub-threshold slope of 0.5 V/decade, and current ratio ( I ON/ OFF) of >107. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (−1.0 MV/cm) bias direction after extended stressing time of 104 s. We achieve a stage-delay of ~19.6 ns at VDD = 20 V measured in a 41-stage ring oscillator. A top-emitting quarter-quarter-video-graphics-array active-matrix organic light-emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage ( VDD), the brightness of the display exceeds 150 cd/m2. [ABSTRACT FROM AUTHOR]

We present an ultrahigh frequency energy harvester based on low temperature processed a-IGZO (amorphous indium-gallium-zinc oxide) semiconductor on a glass substrate. The harvester is composed of a dipole antenna, matching network, and a double half-wave rectifier and is capable of delivering more than 1 V \(_{{{\rm dc}}}\) at a distance of 2 m from the transmitter antenna. In the proposed wireless system, this sensitivity corresponds to 2.75-m distance harvesting at 4-W (36 dBm) emitted power from a base station, which is within EPC regulations. The main element of the rectifier is the high-performance a-IGZO Schottky diode on glass, with a rectification ratio of \(10^{{{7}}}\) at ±V, a low threshold voltage of 0.6 V and a cutoff frequency of 3 GHz at 0 V bias. [ABSTRACT FROM PUBLISHER]

In this work, we compared the thin-film transistor (TFT) characteristics of amorphous InGaZnO TFTs with six different source-drain (S/D) metals (MoCr, TiW, Ni, Mo, Al, and Ti/Au) fabricated in bottom-gate bottom-contact (BGBC) and bottom-gate top-contact (BGTC) configurations. In the BGTC configuration, nearly every metal can be injected nicely into the a-IGZO leading to nice TFT characteristics; however, in the BGBC configuration, only Ti/Au is injected nicely and shows comparable TFT characteristics. We attribute this to the metal-containing deposits in the channel and the contact oxidation during a-IGZO layer sputtering in the presence of S/D metal. In bias-stress stability, TFTs with Ti/Au S/D metal showed good results in both configurations; however, in the BGTC configuration, not all the TFTs showed as good bias results as Ti/Au S/D metal TFTs. We attribute this to backchannel interface change, which happened because of the metal-containing deposits at the backchannel during the final the SiO2 passivation. [ABSTRACT FROM AUTHOR]

We present a QQVGA (160times120 with 3 sub-pixel) top-emitting AMOLED display with 85ppi resolution using a self-aligned (SA) IGZO TFT backplane on polyimide-foil. The back plane process flow is based on a 5 layer photolithography process. The aperture ratio of the top-emitting OLEDs is approx. 25%. For operation at 6 V supply voltage (VDD), the brightness of the display exceeds 150cd/m2. On the same substrate a 160 stage gate-driver was measured at FHD rate. [ABSTRACT FROM AUTHOR]

The first direct measurement is reported of the bulk density of deep states in amorphous IGZO (indium-gallium-zinc oxide) semiconductor by means of deep-level transient spectroscopy (DLTS). The device under test is a Schottky diode of amorphous IGZO semiconductor on a palladium (Pd) Schottky-barrier electrode and with a molybdenum (Mo) Ohmic contact at the top. The DLTS technique allows to independently measure the energy and spatial distribution of subgap states in the IGZO thin film. The subgap trap concentration has a double exponential distribution as a function energy, with a value of ~1019 cm-3 eV-1 at the conduction band edge and a value of ~1017 cm-3 eV-1 at an energy of 0.55 eV below the conduction band. Such spectral distribution, however, is not uniform through the semiconductor film. The spatial distribution of subgap states correlates well with the background doping density distribution in the semiconductor, which increases towards the Ohmic Mo contact, suggesting that these two properties share the same physical origin. [ABSTRACT FROM AUTHOR]

In this work, we report on high-performance bottom-gate top-contact (BGTC) amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) with SiO2 as an etch-stop-layer (ESL) deposited by medium frequency physical vapor deposition (mf-PVD). The TFTs show field-effect mobility (μFE) of 16.0 cm2/(V.s), sub-threshold slope (SS−1) of 0.23 V/decade and off-currents (IOFF) < 1.0 pA. The TFTs with mf-PVD SiO2 ESL deposited at room temperature were compared with TFTs made with the conventional plasma-enhanced chemical vapor deposition (PECVD) SiO2 ESL deposited at 300 °C and at 200 °C. The TFTs with different ESLs showed a comparable performance regarding μFE, SS−1, and IOFF, however, significant differences were measured in gate bias-stress stability when stressed under a gate field of +/−1 MV/cm for duration of 104 s. The TFTs with mf-PVD SiO2 ESL showed lower threshold-voltage (VTH) shifts compared with TFTs with 300 °C PECVD SiO2 ESL and TFTs with 200 °C PECVD SiO2 ESL. We associate the improved bias-stress stability of the mf-PVD SiO2 ESL TFTs to the low hydrogen content of the mf-PVD SiO2 layer, which has been verified by Rutherford-Back-Scattering-Elastic-Recoil-Detection technique. [ABSTRACT FROM AUTHOR]

We present vertical Schottky diodes based on amorphous IGZO with an unprecedented cutoff frequency of 1.8 GHz at 0 V bias. These diodes have a rectification ratio of up to 10^8 at \pm1~V and a current density of 800 A/cm^2 at +1~V. The diodes' high performance is achieved by understanding and modeling of the two contacts, a Schottky contact using Pd at the bottom and an ohmic contact formed at the top. In particular, the choice of the latter top contact combined with an optimized IGZO layer thickness proves to be crucial: we show how the semiconductor layer thickness and the nature of the top metal modify the doping concentration profile of the IGZO film, which we fully measure and characterize, and how that affects the performance and optimization of the diodes. We measure our diodes in rectifiers, which operate up to 1.1 GHz. Finally, we show that these rectifiers can be fully modeled in SPICE using diode parameters extracted from electrical measurements. [ABSTRACT FROM AUTHOR]

Abstract: In this study, the authors report high‐quality amorphous Indium‐Gallium‐Zinc‐Oxide (a‐IGZO) thin film transistors (TFTs) fabricated using a new back‐channel‐etch (BCE) process flow on Polyethylene Naphthalate (PEN) foil. The BCE flow allows a better scalability of TFTs for high‐resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165oC in order to ensure good overlay accuracy (< 1µm) on foil. The presented process flow differs from to previously reported by defining the Mo S/D contacts by dry etch prior to a‐IGZO patterning. The TFTs show good electrical performance, including field‐effect mobilities in the range of 15.0cm2/(V.s), sub‐threshold slopes of 0.3V/decade and off‐currents <1.0pA on foil. Finally, the applicability of this new BCE process flow was demonstrated for TFT backplane driving a 32 x 32 active‐matrix organic light‐emitting diode (AMOLED) display. [ABSTRACT FROM AUTHOR]

In this study, we report high-quality amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) fabricated on a polyethylene naphthalate foil using a new back-channel-etch (BCE) process flow. The BCE flow allows a better scalability of TFTs for high-resolution backplanes and related circuits. The maximum processing temperature was limited to less than 165 °C in order to ensure good overlay accuracy (<1 µm) on foil. The presented process flow differs from the previously reported flow as we define the Mo source and drain contacts by dry etch prior to a-IGZO patterning. The TFTs show good electrical performance, including field-effect mobilities in the range of 15.0 cm2/(V·s), subthreshold slopes of 0.3 V/decade, and off-currents <1.0 pA on foil. The threshold voltage shifts of the TFTs measured were less than 1.0 V after a stressing time of 104 s in both positive (+1.0 MV/cm) and negative (−1.0 MV/cm) bias directions. The applicability of this new BCE process flow is demonstrated in a 19-stage ring oscillator, demonstrated to operate at a supply voltage of 10 V with a stage delay time of 1.35 µs, and in a TFT backplane driving a 32 × 32 active-matrix organic light-emitting diode display. [ABSTRACT FROM AUTHOR]

In this study, the authors report on high-quality amorphous indium-gallium-zinc oxide thin-film transistors (TFTs) based on a single-source dual-layer concept processed at temperatures down to 150°C. The dual-layer concept allows the precise control of local charge carrier densities by varying the O2/Ar gas ratio during sputtering for the bottom and top layers. Therefore, extensive annealing steps after the deposition can be avoided. In addition, the dual-layer concept is more robust against variation of the oxygen flow in the deposition chamber. The charge carrier density in the TFT channel is namely adjusted by varying the thickness of the two layers whereby the oxygen concentration during deposition is switched only between no oxygen for the bottom layer and very high concentration for the top layer. The dual-layer TFTs are more stable under bias conditions in comparison with single-layer TFTs processed at low temperatures. Finally, the applicability of this dual-layer concept in logic circuitry such as 19-stage ring oscillators and a TFT backplane on polyethylene naphthalate foil containing a quarter video graphics array active-matrix organic light- emitting diode display demonstrator is proven. [ABSTRACT FROM AUTHOR]

High-performance Schottky diodes based on palladium blocking contacts were fabricated upon depositing indium-gallium-zinc oxide (IGZO) with high oxygen content. We find that an oxygen treatment of the palladium contact is needed to achieve low off currents in the Schottky diode, and rationalize this by relating an increased oxygen content at the Pd/IGZO interface to a lower interfacial trap density. Optimized IGZO films were obtained with a record high ratio of free charge carrier density to subgap traps. The rectification ratios of diodes with such films are higher than 107 with current densities exceeding 103 A/cm2 at low forward bias of 2 V. [ABSTRACT FROM AUTHOR]

We present amorphous indium–gallium-zinc oxide Schottky diodes with unprecedented current densities of 10^4 and 10^5~A/cm^2 at forward biases of 1.5 and 5 V, respectively. The diode presents a high rectification ratio of 10^10 at \pm2~V , which is essential for suppressing the sneak current of not-selected cells in the memory array. In addition, we show that the diode complies with the demanding performance of memory applications. The device degradation, given by a 30% reduction of its forward current after 10^4~s of continuous bias stress or 10^9 pulses cycles, was studied via I-V and C-V measurements and can be attributed to trapping of electrons at deep acceptor levels, which increases the diode built-in potential. Finally, we show that the device is stable upon thermal stress at 300 ^\circC for 1 h, which opens the possibility of further processing and integration with the memory cell. [ABSTRACT FROM AUTHOR]

In this work, we present the impact of S/D contact formation, that is, by SiN plasma doping (hydrogen incorporation), metallic reduction (by calcium) and by argon plasma (compositional change) on NBIS instabilities of self-aligned a-IGZO TFTs. [ABSTRACT FROM AUTHOR]