22 results on '"Verreck, Devin"'
Search Results
2. Evidence of contact-induced variability in industrially-fabricated highly-scaled MoS2 FETs.
- Author
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Panarella, Luca, Kaczer, Ben, Smets, Quentin, Tyaginov, Stanislav, Saraza Canflanca, Pablo, Vici, Andrea, Verreck, Devin, Schram, Tom, Lin, Dennis, Knobloch, Theresia, Grasser, Tibor, Lockhart de la Rosa, César, Kar, Gouri S., and Afanas'ev, Valeri
- Subjects
SCHOTTKY barrier ,CONTACT dermatitis ,FIELD-effect transistors ,RANDOM noise theory ,MODULATION-doped field-effect transistors - Abstract
Evidence of microscopic inhomogeneities of the side source/drain contacts in 300 mm wafer integrated MoS
2 field-effect transistors is presented. In particular, the presence of a limited number of low Schottky barrier spots through which channel carriers are predominantly injected is demonstrated by the dramatic current changes induced by individual charge traps located near the source contact. Two distinct types of "contact-impacting traps" are identified. Type-1 trap is adjacent to the contact interface and exchanges carriers with the metal. Its impact is only observable when the adjacent contact is the reverse-biased FET source and limits the channel current. Type-2 trap is located in the AlOx gate oxide interlayer, near the source contact, and exchanges carriers with the channel. Its capture/emission time constants exhibit both a gate and drain bias dependence due to the high sensitivity of the contact regions to the applied lateral and vertical fields. Unlike typical channel-impacting oxide traps, both types of reported defects affect the Schottky barrier height and width rather than the threshold voltage and result in giant random telegraph noise (RTN). These observations indicate that the contact quality and geometry play a fundamental role in the ultimate scaling of 2D FETs. [ABSTRACT FROM AUTHOR]- Published
- 2024
- Full Text
- View/download PDF
3. Impact of device scaling on the electrical properties of MoS2 field-effect transistors
- Author
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Arutchelvan, Goutham, Smets, Quentin, Verreck, Devin, Ahmed, Zubair, Gaur, Abhinav, Sutar, Surajit, Jussot, Julien, Groven, Benjamin, Heyns, Marc, Lin, Dennis, Asselberghs, Inge, and Radu, Iuliana
- Published
- 2021
- Full Text
- View/download PDF
4. Phonon-assisted tunneling in direct-bandgap semiconductors.
- Author
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Mohammed, Mazharuddin, Verhulst, Anne S., Verreck, Devin, Van de Put, Maarten L., Magnus, Wim, Sorée, Bart, and Groeseneken, Guido
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TUNNEL field-effect transistors ,QUANTUM tunneling ,PHONONS ,BAND gaps ,SEMICONDUCTORS ,ELECTRON-phonon interactions - Abstract
In tunnel field-effect transistors, trap-assisted tunneling (TAT) is one of the probable causes for degraded subthreshold swing. The accurate quantum-mechanical (QM) assessment of TAT currents also requires a QM treatment of phonon-assisted tunneling (PAT) currents. Therefore, we present a multi-band PAT current formalism within the framework of the quantum transmitting boundary method. An envelope function approximation is used to construct the electron-phonon coupling terms corresponding to local Fröhlich-based phonon-assisted inter-band tunneling in direct-bandgap III-V semiconductors. The PAT current density is studied in up to 100 nm long and 20 nm wide p-n diodes with the 2- and 15-band material description of our formalism. We observe an inefficient electron-phonon coupling across the tunneling junction. We further demonstrate the dependence of PAT currents on the device length, for our non-self-consistent formalism which neglects changes in the electron distribution function caused by the electron-phonon coupling. Finally, we discuss the differences in doping dependence between direct band-to-band tunneling and PAT current. [ABSTRACT FROM AUTHOR]
- Published
- 2019
- Full Text
- View/download PDF
5. Self-consistent procedure including envelope function normalization for full-zone Schrödinger-Poisson problems with transmitting boundary conditions.
- Author
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Verreck, Devin, Verhulst, Anne S., Van de Put, Maarten L., Sorée, Bart, Magnus, Wim, Collaert, Nadine, Mocuta, Anda, and Groeseneken, Guido
- Subjects
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SCHRODINGER operator , *SIMULATION methods & models , *WAVE mechanics , *ELECTROSTATICS , *POISSON'S equation , *FIELD-effect transistors - Abstract
In the quantum mechanical simulation of exploratory semiconductor devices, continuum methods based on a k ⋅ p/envelope function model have the potential to significantly reduce the computational burden compared to prevalent atomistic methods. However, full-zone k ⋅ p/envelope function simulation approaches are scarce and existing implementations are not self-consistent with the calculation of the electrostatic potential due to the lack of a stable procedure and a proper normalization of the multi-band envelope functions. Here, we therefore present a self-consistent procedure based on a full-zone spectral k ⋅ p/envelope function band structure model. First, we develop a proper normalization for the multi-band envelope functions in the presence of transmitting boundary conditions. This enables the calculation of the free carrier densities. Next, we construct a procedure to obtain self-consistency of the carrier densities with the electrostatic potential. This procedure is stabilized with an adaptive scheme that relies on the solution of Poisson's equation in the Gummel form, combined with successive underrelaxation. Finally, we apply our procedure to homostructure In 0.53 Ga 0.47 As tunnel field-effect transistors (TFETs) and staggered heterostructure GaAs 0.5 Sb 0.5 /In 0.53 Ga 0.47 As TFETs and show the importance of self-consistency on the device predictions for scaled dimensions. [ABSTRACT FROM AUTHOR]
- Published
- 2018
- Full Text
- View/download PDF
6. Electrolithic Memory: A New Device for Ultrahigh-Density Data Storage.
- Author
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Fransen, Senne, Willems, Kherim, Philipsen, Harold, Verreck, Devin, Van Roy, Willem, Henry, Olivier Y. F., Arreghini, Antonio, Van den bosch, Geert, Furnemont, Arnaud, and Rosmeulen, Maarten
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DATA warehousing ,COMPUTER storage devices ,NONVOLATILE memory ,ELECTRODES ,ELECTRIC potential ,FLASH memory - Abstract
We propose a storage memory device that enables bit densities of >1 Tbit/mm2 based on the electro- deposition and electrodissolution of multilayered metal stacks in deep nanometer-sized wells. This device addresses the challenge of bit density scaling slowdown expected for 3-D NAND flash beyond 2030. We describe in detail the operating principles and discuss the response time, bandwidth, retention, and cycling endurance requirements for the device to be viable. As a proof-of-principle, we provide a first demonstration of the write/read (W/R) mechanism on millimeter- and micrometer-sized electrodes and show the device’s potential for reaching very high bit densities. To evaluate how the response time scales for the envisioned nanometer-sized electrodes, we derive simple analytical expressions based on finite element simulations that relate the well depth, radius, and electrolyte composition to the deposition/dissolution rate. [ABSTRACT FROM AUTHOR]
- Published
- 2022
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7. Deep Understanding of Electron Beam Effects on 2D Layered Semiconducting Devices Under Bias Applications.
- Author
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Lee, Kookjin, Ji, Hyunjin, Kim, Yanghee, Kaczer, Ben, Lee, Hyebin, Ahn, Jae‐Pyoung, Choi, Junhee, Grill, Alexander, Panarella, Luca, Smets, Quentin, Verreck, Devin, Van Beek, Simon, Chasin, Adrian, Linten, Dimitri, Na, Junhong, Lee, Jae Woo, De Wolf, Ingrid, and Kim, Gyu‐Tae
- Subjects
ELECTRON beams ,FIELD-effect transistors ,CURRENT fluctuations ,SURFACE potential ,RADIATION - Abstract
In this study, the radiation effects of electron beam (e‐beam) on field‐effect transistors (FETs) using transition‐metal dichalcogenides (TMD) as a channel are carefully investigated. Electron‐hole pairs (EHPs) in SiO2 generated by e‐beam irradiation induce additional traps, which change the surface potential of the TMD channel, resulting in strong negative shifts of transfer characteristics. These negative shifts, which remind one of n‐doping effects, are highly affected not only by the condition of e‐beam irradiation, but also by the gate bias condition during irradiating. As a result of the e‐beam irradiation effect, band bending and contact resistance are affected, and the degree of formation of oxide traps and interface traps varies depending on the gate bias conditions. In the case of VG > 0 V application during e‐beam irradiation, the negative shifts in the transfer characteristics are fully recovered after ambient exposure. However, the interface traps increase significantly, resulting in variations of low‐frequency (LF) noise and time‐dependent current fluctuations. [ABSTRACT FROM AUTHOR]
- Published
- 2022
- Full Text
- View/download PDF
8. Cyclic Thermal Effects on Devices of Two‐Dimensional Layered Semiconducting Materials.
- Author
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Kim, Yeonsu, Kaczer, Ben, Verreck, Devin, Grill, Alexander, Kim, Doyoon, Song, Jaeick, Diaz‐Fortuny, Javier, Vici, Andrea, Park, Jongseon, Van Beek, Simon, Simicic, Marko, Bury, Erik, Chasin, Adrian, Linten, Dimitri, Lee, Jaewoo, Chun, Jungu, Kim, Seongji, Seo, Beumgeun, Choi, Junhee, and Shim, Joon Hyung
- Subjects
SEMICONDUCTORS ,CYCLIC loads ,ATOMIC layer deposition ,THERMAL stresses ,FIELD-effect transistors ,TRANSITION metals - Abstract
Field‐effect transistors (FETs), using transition metal dichalcogenides (TMD) as channels, have various types of interfaces, and their characteristics are sensitively changed in temperature and electrical stress. In this article, the effect of fast cyclic thermal stress on the performance of FETs using TMD as a channel is investigated and introduced. The Al2O3 passivation layer is deposited onto the TMD channel by atomic layer deposition process, and the hysteresis decreases and the direction changes from clockwise to counterclockwise. Applying cyclic thermal stress that rapidly heats and cools by 90 K in a 20 s cycle increases and decreases drain current repeatedly as charges move between the TMD channel and the interface traps. As cyclic thermal stress is applied, permanent interfacial damage occurs, resulting in increased interface trap density at the bottom and decreased hysteresis. These experimental results are also shown through technology computer‐aided design simulations. In addition, series resistance and mobility attenuation factor increase due to the concentration of the conduction paths at the bottom of the channel. [ABSTRACT FROM AUTHOR]
- Published
- 2021
- Full Text
- View/download PDF
9. Full-zone spectral envelope function formalism for the optimization of line and point tunnel field-effect transistors.
- Author
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Verreck, Devin, Verhulst, Anne S., Van de Put, Maarten, Sorée, Bart, Magnus, Wim, Mocuta, Anda, Collaert, Nadine, Thean, Aaron, and Groeseneken, Guido
- Subjects
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FIELD-effect transistors , *COMPUTATIONAL complexity , *QUANTUM mechanics , *QUANTUM confinement effects , *QUANTUM tunneling - Abstract
Efficient quantum mechanical simulation of tunnel field-effect transistors (TFETs) is indispensable to allow for an optimal configuration identification. We therefore present a full-zone 15-band quantum mechanical solver based on the envelope function formalism and employing a spectral method to reduce computational complexity and handle spurious solutions. We demonstrate the versatility of the solver by simulating a 40 nm wide In0.53Ga0.47As lineTFET and comparing it to p-n-i-n configurations with various pocket and body thicknesses. We find that the lineTFET performance is not degraded compared to semi-classical simulations. Furthermore, we show that a suitably optimized p-n-i-n TFET can obtain similar performance to the lineTFET. [ABSTRACT FROM AUTHOR]
- Published
- 2015
- Full Text
- View/download PDF
10. Understanding ambipolar transport in MoS2 field effect transistors: the substrate is the key.
- Author
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Mootheri, Vivek, Leonhardt, Alessandra, Verreck, Devin, Asselberghs, Inge, Huyghebaert, Cedric, de Gendt, Stefan, Radu, Iuliana, Lin, Dennis, and Heyns, Marc
- Subjects
FIELD-effect transistors ,FERMI level ,HYDROGEN evolution reactions - Abstract
2D materials offer a pathway for further scaling of CMOS technology. However, for this to become a reality, both n-MOS and p-MOS should be realized, ideally with the same (standard) material. In the specific case of MoS
2 field effect transistors (FETs), ambipolar transport is seldom reported, primarily due to the phenomenon of Fermi level pinning (FLP). In this study we identify the possible sources of FLP in MoS2 FETs and resolve them individually. A novel contact transfer technique is used to transfer contacts on top of MoS2 flake devices that results in a significant increase in the hole branch of the transfer characteristics as compared to conventionally fabricated contacts. We hypothesize that the pinning not only comes from the contact-MoS2 interface, but also from the MoS2 -substrate interface. We confirm this by shifting to an hBN substrate which leads to a 10 fold increase in the hole current compared to the SiO2 substrate. Furthermore, we analyse MoS2 FETs of different channel thickness on three different substrates, SiO2 , hBN and Al2 O3 , by correlating the p-branch ION /IOFF to the position of oxide defect band in these substrates. FLP from the oxide is reduced in the case of Al2 O3 which enables us to observe ambipolar transport in a bilayer MoS2 FET. These results highlight that MoS2 is indeed an ambipolar material, and the absence of ambipolar transport in MoS2 FETs is strongly correlated to its dielectric environment and processing conditions. [ABSTRACT FROM AUTHOR]- Published
- 2021
- Full Text
- View/download PDF
11. InGaAs tunnel diodes for the calibration of semi-classical and quantum mechanical band-to-band tunneling models.
- Author
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Smets, Quentin, Verreck, Devin, Verhulst, Anne S., Rooyackers, Rita, Merckling, Clément, Van De Put, Maarten, Simoen, Eddy, Vandervorst, Wilfried, Collaert, Nadine, Thean, Voon Y., Sorée, Bart, Groeseneken, Guido, and Heyns, Marc M.
- Subjects
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FIELD-effect transistors , *TUNNEL diodes , *ELECTRIC capacity , *DOPING agents (Chemistry) , *METAL oxide semiconductor field-effect transistors - Abstract
Promising predictions are made for III-V tunnel-field-effect transistor (FET), but there is still uncertainty on the parameters used in the band-to-band tunneling models. Therefore, two simulators are calibrated in this paper; the first one uses a semi-classical tunneling model based on Kane's formalism, and the second one is a quantum mechanical simulator implemented with an envelope function formalism. The calibration is done for In0.53Ga0.47As using several p+/intrinsic/n+ diodes with different intrinsic region thicknesses. The dopant profile is determined by SIMS and capacitance-voltage measurements. Error bars are used based on statistical and systematic uncertainties in the measurement techniques. The obtained parameters are in close agreement with theoretically predicted values and validate the semi-classical and quantum mechanical models. Finally, the models are applied to predict the input characteristics of In0.53Ga0.47As n- and p-lineTFET, with the n-lineTFET showing competitive performance compared to MOSFET. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
12. Quantum mechanical solver for confined heterostructure tunnel field-effect transistors.
- Author
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Verreck, Devin, Van de Put, Maarten, Sorée, Bart, Verhulst, Anne S., Magnus, Wim, Vandenberghe, William G., Collaert, Nadine, Thean, Aaron, and Groeseneken, Guido
- Subjects
- *
HETEROSTRUCTURES , *FIELD-effect transistors , *SEMICONDUCTOR research , *POWER electronics , *BALLISTICS - Abstract
Heterostructure tunnel field-effect transistors (HTFET) are promising candidates for low-power applications in future technology nodes, as they are predicted to offer high on-currents, combined with a sub-60 mV/dec subthreshold swing. However, the effects of important quantum mechanical phenomena like size confinement at the heterojunction are not well understood, due to the theoretical and computational difficulties in modeling realistic heterostructures. We therefore present a ballistic quantum transport formalism, combining a novel envelope function approach for semiconductor heterostructures with the multiband quantum transmitting boundary method, which we extend to 2D potentials. We demonstrate an implementation of a 2-band version of the formalism and apply it to study confinement in realistic heterostructure diodes and p-n-i-n HTFETs. For the diodes, both transmission probabilities and current densities are found to decrease with stronger confinement. For the p-n-i-n HTFETs, the improved gate control is found to counteract the deterioration due to confinement. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
13. Impact of Mechanical Stress on 3-D NAND Flash Current Conduction.
- Author
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Kruv, Anastasiia, Arreghini, Antonio, Verreck, Devin, Gonzalez, Mario, Van den bosch, Geert, De Wolf, Ingrid, and Rosmeulen, Maarten
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STRAINS & stresses (Mechanics) ,CHARGE carrier mobility ,MAGNITUDE (Mathematics) ,FLASH memory ,LOGIC circuits - Abstract
This work experimentally investigates current conduction in 3-D NAND under up to 7 GPa of externally applied compressive mechanical stress. The impact of channel crystallinity and geometry is studied by comparing four types of Si channels: polycrystalline full channel, single-crystal full channel, polycrystalline macaroni channel, and single-crystal macaroni channel. In the studied channel types, the mechanical stress was found to cause reversible degradation of I
ON (up to one order of magnitude) and IOFF (up to seven orders of magnitude). Using TCAD simulations, ION and IOFF deterioration are attributed to carrier mobility and Si bandgap decreases under mechanical stress, respectively. The simulations also suggest that both effects depend on the channel morphology, which results in a different extent of stress impact on the four studied types of Si channels. [ABSTRACT FROM AUTHOR]- Published
- 2020
- Full Text
- View/download PDF
14. The Role of Nonidealities in the Scaling of MoS2 FETs.
- Author
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Verreck, Devin, Arutchelvan, Goutham, Lockhart De La Rosa, Cesar J., Leonhardt, Alessandra, Chiappe, Daniele, Lu, Anh Khoa Augustin, Pourtois, Geoffrey, Matagne, Philippe, Heyns, Marc M., De Gendt, Stefan, Mocuta, Anda, and Radu, Iuliana P.
- Subjects
- *
FIELD-effect transistors , *NONEQUILIBRIUM flow , *SCHOTTKY barrier , *THIN films , *MICROELECTRONICS - Abstract
2-D material FETs hold the promise of excellent gate control, but the impact of nonidealities on their performance remains poorly understood. This is because of the need, so far, to use computationally intensive nonequilibrium Green’s function (NEGF) simulations. Here, we therefore use a semiclassical model to investigate the role of nonidealities in the scaling of back-gated (BG) and top-gated (TG) monolayer MoS2 FETs. We verify the electrostatics and transport of the semiclassical model with density functional theory-based NEGF simulations and calibrate nonidealities, such as interface traps (${D}_{\textsf {it}}$) and Schottky contact barrier height ($\phi _{\textsf {SB}}$) to experimental monolayer and bilayer MoS2 FETs. We find that among the nonidealities, ${D}_{\textsf {it}}$ has the strongest subthreshold swing impact with 70 mV/dec obtainable in BG devices for a ${D}_{\textsf {it}}$ of $5\times {10}^{11}$ cm−2eV $^{-1}$ , an equivalent oxide thickness (EOT) of 1 nm, and a channel length (${L}_{\textsf {ch}}$) of 5 nm. For scaled EOT, $\phi _{\textsf {SB}}$ only strongly impacts ${I}_{ \mathrm{\scriptscriptstyle ON}}$ for the TG case, as the overlapping gate thins the Schottky barriers in the BG case. We show in TG devices that a spacer of only 5 nm results in a 1000-fold drop in ${I}_{ \mathrm{\scriptscriptstyle ON}}$ because of the nonidealities. We propose positive spacer oxide charge as a solution and show that a charge density of above 1013 cm−2 is required to fully recover the device performance. [ABSTRACT FROM AUTHOR]
- Published
- 2018
- Full Text
- View/download PDF
15. Uniform Strain in Heterostructure Tunnel Field-Effect Transistors.
- Author
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Verreck, Devin, Verhulst, Anne S., Van de Put, Maarten L., Soree, Bart, Collaert, Nadine, Mocuta, Anda, Thean, Aaron, and Groeseneken, Guido
- Subjects
FIELD-effect transistors ,METAL oxide semiconductor field-effect transistors ,QUANTUM tunneling ,TENSILE strength ,ELECTRIC potential - Abstract
Strain can strongly impact the performance of III–V tunnel field-effect transistors (TFETs). However, previous studies on homostructure TFETs have found an increase in ON-current to be accompanied with a degradation of subthreshold swing. We perform 30-band quantum mechanical simulations of staggered heterostructure p-n-i-n TFETs submitted to uniaxial and biaxial uniform stress and find the origin of the subthreshold degradation to be a reduction of the density of states in the strained case. We apply an alternative configuration including a lowly doped pocket in the source, which allows to take full benefit of the strain-induced increase in ON-current. [ABSTRACT FROM PUBLISHER]
- Published
- 2016
- Full Text
- View/download PDF
16. Extracting the effective bandgap of heterojunctions using Esaki diode I-V measurements.
- Author
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Smets, Quentin, Verhulst, Anne S., El Kazzi, Salim, Verreck, Devin, Richard, Olivier, Bender, Hugo, Collaert, Nadine, Mocuta, Anda, Thean, Aaron, and Heyns, Marc M.
- Subjects
BAND gaps ,HETEROJUNCTIONS ,TUNNEL diodes ,HETEROJUNCTION field effect transistors ,CRYOGENICS - Abstract
The effective bandgap is a crucial design parameter of heterojunction tunneling field-effect transistors. In this letter, we demonstrate a method to measure the effective bandgap directly from the band-to-band tunneling current of a heterojunction Esaki diode, of which we only require knowledge of the electrostatic potential profile. The method is based on a characteristic exponentially increasing current with forward bias, caused by sharp energy filtering at cryogenic temperature. We apply this method experimentally to a n+In
0.53 Ga0.47 As/pGaAs0.5 Sb0.5 Esaki diode and define requirements to apply it to other heterojunctions. [ABSTRACT FROM AUTHOR]- Published
- 2015
- Full Text
- View/download PDF
17. Improved source design for p-type tunnel field-effect transistors: Towards truly complementary logic.
- Author
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Verreck, Devin, Verhulst, Anne S., Sorèe, Bart, Collaert, Nadine, Mocuta, Anda, Thean, Aaron, and Groeseneken, Guido
- Subjects
- *
FIELD-effect transistors , *ENERGY consumption research , *HETEROSTRUCTURES , *QUANTUM mechanics , *CONDUCTION bands - Abstract
Complementary logic based on tunnel field-effect transistors (TFETs) would drastically reduce power consumption thanks to the TFET's potential to obtain a sub-60mV/dec subthreshold swing (SS). However, p-type TFETs typically do not meet the performance of n-TFETs for direct bandgap III-V configurations. The p-TFET SS stays well above 60mV/dec, due to the low density of states in the conduction band. We therefore propose a source configuration in which a highly doped region is maintained only near the tunnel junction. In the remaining part of the source, the hot carriers in the exponential tail of the Fermi-Dirac distribution are blocked by reducing the doping degeneracy, either with a source section with a lower doping concentration or with a heterostructure. We apply this concept to n-p-i-p configurations consisting of In0.53Ga0.47As and an InP-InAs heterostructure. 15-band quantum mechanical simulations predict that the configurations with our source design can obtain sub-60mV/dec SS, with an on-current comparable to the conventional source design. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
18. Impact of field-induced quantum confinement on the onset of tunneling field-effect transistors: Experimental verification.
- Author
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Smets, Quentin, Verhulst, Anne S., Martens, Koen, Han Chung Lin, El Kazzi, Salim, Verreck, Devin, Simoen, Eddy, Collaert, Nadine, Thean, Aaron, Raskin, Jean-Pierre, and Heyns, Marc M.
- Subjects
FIELD-effect transistors ,QUANTUM chemistry ,QUANTUM tunneling ,METAL oxide semiconductors ,CAPACITORS - Abstract
The Tunneling Field-Effect Transistor (TFET) is a promising device for future low-power logic. Its performance is often predicted using semiclassical simulations, but there is usually a large discrepancy with experimental results. An important reason is that Field-Induced Quantum Confinement (FIQC) is neglected. Quantum mechanical simulations show FIQC delays the onset of Band-To-Band Tunneling (BTBT) with hundreds of millivolts in the promising line-TFET configuration. In this letter, we provide experimental verification of this delayed onset. We accomplish this by developing a method where line-TFET are modeled using highly doped MOS capacitors (MOS-CAP). Using capacitance-voltage measurements, we demonstrate AC inversion by BTBT, which was so far unobserved in MOS-CAP. Good agreement is shown between the experimentally obtained BTBT onset and quantum mechanical predictions, proving the need to include FIQC in all TFET simulations. Finally, we show that highly doped MOS-CAP is promising for characterization of traps deep into the conduction band. [ABSTRACT FROM AUTHOR]
- Published
- 2014
- Full Text
- View/download PDF
19. Part I: Impact of Field-Induced Quantum Confinement on the Subthreshold Swing Behavior of Line TFETs.
- Author
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Walke, Amey M., Verhulst, Anne S., Vandooren, Anne, Verreck, Devin, Simoen, Eddy, Rao, Valipe Ramgopal, Groeseneken, Guido, Collaert, Nadine, and Thean, Aaron V. Y.
- Subjects
QUANTUM tunneling ,FIELD-effect transistors -- Design & construction ,QUANTUM confinement effects ,SEMICONDUCTORS ,LOGIC circuits ,CONDUCTION bands - Abstract
Trap-assisted tunneling (TAT) is a major hurdle in achieving a sub-60-mV/decade subthreshold swing (SS) in tunnel field-effect transistors (TFETs). This paper presents an insight into the TAT process in the presence of field-induced quantum confinement (FIQC) in line TFETs. We show that the SS degradation in line TFETs is mainly caused by TAT through traps located in the bulk of the semiconductor nearby the gate dielectric. For an Si n-type TFET, the energy quantization in the conduction band is found to suppress the TAT through the interface-region traps by several orders of magnitude and delay the TAT through bulk traps nearby the gate dielectric with several hundreds of millivolts. The trap levels closer to the conduction band were found to be the most efficient for TAT in this n-TFET. The FIQC onset voltage shift in TAT through bulk taps is found to be smaller than the band-to-band tunneling (BTBT) shift, enhancing the effective SS degradation in TFETs. We therefore show that it is equally important to include the FIQC effect when calculating TAT as when calculating BTBT generation rates. [ABSTRACT FROM PUBLISHER]
- Published
- 2013
- Full Text
- View/download PDF
20. Quantum Mechanical Performance Predictions of p-n-i-n Versus Pocketed Line Tunnel Field-Effect Transistors.
- Author
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Verreck, Devin, Verhulst, Anne S., Kao, Kuo-Hsing, Vandenberghe, William G., De Meyer, Kristin, and Groeseneken, Guido
- Subjects
- *
QUANTUM mechanics , *FIELD-effect transistors , *PERFORMANCE , *BAND gaps , *ELECTRIC fields , *TUNNEL junctions (Materials science) - Abstract
The tunnel field-effect transistor (TFET) is a promising candidate to replace the metal-oxide-semiconductor field-effect transistor in advanced technology nodes, because of its potential to obtain sub-60 mV/dec subthreshold swings. However, it is challenging to reach sufficiently high on-currents in TFETs. Therefore, on-current boosters are actively being researched. In this paper, a p-n-i-n TFET, containing a vertical pocket at the source-channel junction, is studied with quantum mechanical simulations and compared with a line tunneling TFET, containing horizontal pockets in the source region. The comparison is carried out both for all-Si and all-Ge, while an extrapolation is made for smaller bandgap materials. The p-n-i-n TFET is found to perform better than a p-i-n configuration, thanks to the increased electric field at the source-pocket junction. Compared to the p-n-i-n TFET, the line TFET has an even higher on-current and lower subthreshold swing, attributed to the closer proximity of the tunnel junction to the gate. For the all-Ge case, the difference between the two configurations is found to decrease when direct transitions are taken into account semi-classically. [ABSTRACT FROM PUBLISHER]
- Published
- 2013
- Full Text
- View/download PDF
21. Corrections to “Quantum Mechanical Performance Predictions of p-n-i-n Versus Pocketed Line Tunnel Field-Effect Transistors”.
- Author
-
Verreck, Devin, Verhulst, Anne S., Kao, Kuo-Hsing, Vandenberghe, William G., De Meyer, Kristin, and Groeseneken, Guido
- Subjects
- *
PROPHECY , *QUANTUM electrodynamics , *PERFORMANCE of field-effect transistors , *MATERIALS science , *ELECTRODES , *PHOTOCURRENTS - Abstract
The above-named article [ibid., vol. 60, no. 7, pp. 2128?2134, Jul. 2013] contains an error in the legend of Fig. 11. The correct version is provided. [ABSTRACT FROM AUTHOR]
- Published
- 2013
- Full Text
- View/download PDF
22. Understanding ambipolar transport in MoS 2 field effect transistors: the substrate is the key.
- Author
-
Mootheri V, Leonhardt A, Verreck D, Asselberghs I, Huyghebaert C, de Gendt S, Radu I, Lin D, and Heyns M
- Abstract
2D materials offer a pathway for further scaling of CMOS technology. However, for this to become a reality, both n-MOS and p-MOS should be realized, ideally with the same (standard) material. In the specific case of MoS
2 field effect transistors (FETs), ambipolar transport is seldom reported, primarily due to the phenomenon of Fermi level pinning (FLP). In this study we identify the possible sources of FLP in MoS2 FETs and resolve them individually. A novel contact transfer technique is used to transfer contacts on top of MoS2 flake devices that results in a significant increase in the hole branch of the transfer characteristics as compared to conventionally fabricated contacts. We hypothesize that the pinning not only comes from the contact-MoS2 interface, but also from the MoS2 -substrate interface. We confirm this by shifting to an hBN substrate which leads to a 10 fold increase in the hole current compared to the SiO2 substrate. Furthermore, we analyse MoS2 FETs of different channel thickness on three different substrates, SiO2 , hBN and Al2 O3 , by correlating the p-branch ION /IOFF to the position of oxide defect band in these substrates. FLP from the oxide is reduced in the case of Al2 O3 which enables us to observe ambipolar transport in a bilayer MoS2 FET. These results highlight that MoS2 is indeed an ambipolar material, and the absence of ambipolar transport in MoS2 FETs is strongly correlated to its dielectric environment and processing conditions.- Published
- 2021
- Full Text
- View/download PDF
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