Search

In the wake of the recent dramatic advances made in electronic products, product size has become smaller and smaller. As a result of this, electronic components will be affected easily by environmental factors such as humidity, pressure, and temperature. This paper discusses the flip chip packaging, which is affected by changes in temperature. Because the electronic components often failed by thermo-mechanical loadings, which leads solder joints to crack and separate with HIC (Hybrid Integrated Circuit) and PCB (Printed circuit board). Solder joints are the interconnections of the flip chip assemblies, and they are also responsible for transferring signals. Thus, they are the most important components in the flip chip assemblies. Hence, this paper mainly analyzes the largest stresses that occur in the solder joints, and establishes the relationship of the geometries and the material properties. Then, possible ways of changing flip chip parameters to improve the reliability of the flip chip structure are discussed. This research uses ANSYS software, which is based on finite element theory in order to reduce time used and save money, as finite element simulation provides results more quickly and cheaply than experiments. Besides, it can also predict the reliability of the flip chip. Finally, presenting the simulation results and contrasting these with the theoretical results provides good accuracy. The simulation results are able to provide the optimal design of flip chip assemblies. [ABSTRACT FROM PUBLISHER]

Thanks to the advancement of Ball Grid Array (BGA) technology, microelectronic packaging has become smaller, thinner and of a higher density and resilience than traditional packing technology. Ball Grid Array plays an important role in this technology and is utilized in many packages, such as Chip Scale Packaging (CSP), Wafer Level Packaging (WLP), Flip Chip (FC), and so on. Due to the requirements for miniaturization and the low cost, BGA has been widely applied in many applications. However, the solder joint fatigue life diminishes during mechanical loading. As microelectronic packaging is becoming more and more miniaturized, the solder joint fatigue life is getting worse in the strategy environment. It is therefore necessary to find a solution to this problem. In this study, a simulation-based design optimization methodology was developed for improving solder joint fatigue life in microelectronic packaging. [ABSTRACT FROM PUBLISHER]

The influences of thermo-mechanical loadings on BGA's solder joint are discussed in this paper. Since the thermo-mechanical loading caused by mismatch of coefficient of thermal expansion between different materials is a very common and unavoidable phenomenon in electronic packaging. Many products like mobile phones, PC suffer from this loading. It goes without saying that it's a problem, especially in a rapid changing temperature cycle, needed to be solved and conquered. The major objectives of this paper is to build up an analytic thermo-mechanical model which is capable of analyzing solder joint's behaviors such as forces, bending moments and present the results from this model in an effort to provide design reference. The comprehension of solder joint can contribute to make assembly more reliable. The finite element model (FEM) program is chosen as the computational method. What's more, the method of simulation is equipped with the advantages, including saving time, low costs and so on. We can even predict the reliability of products by a proper model prior to mass production. In general, the solder joint is the key aspect in the whole packaging's structure. In addition, the difference between lead and lead-free solder joint are also discussed and compared in this paper due to the fact that the demand of environment concerns has been highly considered for the past decades. In this paper, through using the finite element analysis, the model has been established, and the results acquired from analytical model should be applied to FEM predictions. [ABSTRACT FROM PUBLISHER]

This paper will focus on the fast assessment methodology of FBGA fatigue life through simulation and physics of failure (PoF) analysis under thermal cycle. The structure of fine pitch ball grid array (FBGA) that has been investigated, and been modeled by ANSYS to compare with experimental data. There are two temperature cycling will be used, one is used to verify FEA model, and the other one is used to do failure analysis. The aim of this paper is fist discussing the ability of finite element analysis (FEA) in executing the virtual thermal cycling reliability analyzing the reliability of solder joints fatigue life in local modeling. FBGA packages can warp due to local and global mismatch of the coefficients of thermal expansion and the asymmetric package geometry. Temperature cycling condition including dwell time and ramp rate is an important factor that will affect the solder joins reliability. This paper will identify the critical parameters that influence by using a Design of Experiments (DoE) approach using simulation results from ANSYS. Two types of analyses include the physics-based analysis and the statistical-based analysis. The paper presents the physics-based analysis, three steps, uses by DoE tool. The first step we have to select the parameters, such as PCB thickness, PCB Young's modulus, PCB coefficient of temperature expansion (CTE), solder joints height, die thickness, mold compound thickness, and so on. The second step is to find important factors. And the final step is going to DoE, in this paper used response surface methodology (RSM). The use of DOE and ANOVA to identify the critical parameters and a response surface to generate a functional form will be discussed. In this study, we will concentrate on the approach of deformation information to the critical stress. The critical stress is then fed into a fatigue damage model, which outputs life, or cycles to failure. Throughout the work, DoE and ANOVA techniques will be used to determine the key parameters and help in the development of a fast assessment model of FBGA fatigue life through simulation and physics of failure (PoF) analysis under thermal cycle. [ABSTRACT FROM PUBLISHER]

In the multilayered printed circuit board (PCB), the signal transmission between different layers occurs by way of through hole structure. The geometry of a through hole consists of traces, pads and a perfectly conducting hollow cylinder. Conductive Anodic Filament (CAF) generated easily in PCB when board size is decreased. CAF produced will lead to leakages or short circuit. Many reasons cause the phenomenon of the CAF, one of them is the voltage. In these situations, the signal transmission integrity is concerned. The excessive capacitance is generated near the through hole structure. Such capacitance influences the signal transmission between different layers. A number of factors can cause excessive capacitance, for example: geometry of transmission line, pad of through hole and the interaction of different layers. However, recent application of the multilayered printed circuit board such as cell phones and note books, have decreased the broad size for easy to carry or load more equipment. Decreasing the size of PCB, the excessive capacitance near the through hole structure is inevitable. It is more important to design the complexity of the layout and the geometry of structure. The quick and efficient prediction of the performance is concerned when manufacturing process become more complicated. The simulation model and problem discussion are the subject of this paper. In this study, we demonstrate that the geometry of the transmission line near the through hole may affect the transmission of the signal by excessive capacitance. By using ANSYS 12 to simulate the high frequency electromagnetism, and simulate the transmission line with different shapes near the through hole and extract the Scattering-parameters from the simulation results. Scattering-parameters are used to describe the electrical behavior of linear electrical network. The parameters are helpful for us to design electrical engineering, electronics engineering, and communication systems, and especially for microwave engineering. By comparing Scattering-parameters of different structures, we can understand the signal transmission and reflectivity between two layers. We also analyze the electric field and magnetic field of the structure, and use a method based on the quasi-static approximation to compute the excessive capacitance of the through hole structure. Using the concept of equivalent circuit to convert the original model into the RLC circuit. Equivalent circuit is divided into multiple series parts. Many parameters such as resistance, capacitance, inductance and characteristic impedance will be discussed, then compare these value changes between different shapes of the transmission line near the through hole. The ANSYS model is proposed to simulate the high-frequency electromagnetic of the structure. By these model, we want to predict the signal transmission performance of the through hole structure. [ABSTRACT FROM PUBLISHER]