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This paper presents a gate driver for a GaN-based half-bridge structure operating in a buck converter with input voltage >40 V or a boost converter with output voltage >30 V. Two 500 pF on-chip capacitors are utilized to construct three-level gate drivers, providing a near- $V_{{\text {DD}}}$ negative voltage for gate of the rectifier switch to eliminate the induced pulse on the gate from the high dv / dt slew rate of $V_{\text {X}}$ when the main switch is turned on. The dead time controller tunes the delay of the gate signal of the rectifier switch by sensing the slope of $V_{\text {X}}$ , thus the near-optimal zero-voltage switching can be achieved with deviation < 3 ns. The GaN driver is implemented with a 0.18- $\mu \text{m}$ BCD process. The efficiencies can be improved by 8.33% and 6.87% at light load in a buck and a boost converter due to the dead-time control. The peak efficiencies of 20 V–12 V and 12 V–18 V conversions are 86.37% and 84.39%, respectively. [ABSTRACT FROM AUTHOR]

This paper presents a turning-point output voltage (TPOV) prediction method to enhance the reference tracking speed of buck converters for dynamic voltage and frequency scaling (DVFS) application. The optimal reference tracking is modeled, and the TPOV is formulated. The parasitic effects are compensated with the proposed calibration scheme. Reference tracking considering load current changes is evaluated with the proposed end-point determination method. Additionally, this work optimizes the feedback network for smooth loop transition, and incorporates the frequency-locking circuit and the error correction path to address the shortcomings of the hysteretic control. The prototype is fabricated in a 0.13- $\mu \text{m}$ CMOS process with a 1.2-V supply voltage. The converter achieves a near-optimum reference tracking over a wide range of output voltages, from 0.5 to 1 V. Various output voltage steps are measured for different load cases. For a 0.5–1-V output voltage step, with a 90-nH inductor and a 1- $\mu \text{F}$ output capacitor, the up- and down-tracking take 558 and 542 ns, respectively, matching the theoretical result of 533 ns. The prototype achieves a peak efficiency of 93.5%, and over 85% efficiency is measured with $\mathrm {V}_{\mathrm {O}}$ from 0.5 to 1 V and $\mathrm {I}_{\mathrm {O}}$ from 130 to 550 mA. [ABSTRACT FROM AUTHOR]

This paper deals with the $H_{\infty }$ fault detection (FD) problem for a class of buck converter with the transmission-induced multiplicative noises and the event-triggered scheme under the network environment. The model of buck converter is approximated by a nonlinear model, and it is further analyzed based on the electricity knowledge. Due to the dynamic characteristics of network transmission, multiplicative noises need to be considered, which are described as a product of some uncorrelated standardized normal distribution and the transmitted signal. Meanwhile, an event-triggered mechanism is utilized for the purpose of reducing the energy consumption, and an FD observer is designed to detect the fault presented in buck converter. Some novel sufficient conditions are given in terms of linear matrix inequalities to guarantee the robust stability of the FD system, and the $H_{\infty }$ optimal fault tracking performance index is also achieved. Finally, an illustrative example is provided to show the validity and merit of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a piezoelectric-based power management solution for battery-free wireless remote switches (BWSs). The proposed BWS IC, including a piezoelectric (PE) energy harvester and a buck converter, can collect the energy generated by a single PE-button press, and then supply that energy to a wireless transmitter to send a message. By combining a rectifier using the synchronized switch harvesting on inductor technique and a 6:1 series–parallel switched-capacitor converter, the proposed PE energy harvester can maximize the collected amount of energy, while supplying it at a low output voltage. In addition, by employing a switching-based start-up scheme and a variable ON-time pulse-frequency modulation scheme, the proposed buck converter can reduce the loss associated with charging the output capacitor during start-up, and then deliver the largest possible energy to the load, while maintaining low voltage ripples and high-power efficiency. A prototype BWS IC fabricated with high-voltage 250-nm CMOS technology was shown to be capable of harvesting a total energy of 246~\mu \textJ from a single button-pressing of a 300-mm2 lead magnesium niobate-lead titanate PE disc. More than 200~\mu \textJ was delivered to the load, sufficient to transmit a 4-B-long message via a 2.4-GHz wireless USB channel over a 10-m distance. [ABSTRACT FROM AUTHOR]

Conventionally, inductor current is sensed and quantized before it can be used by digitally controlled DC-DC converters. These are intuitively done by using two separated functional blocks—an analog current sensor and an ADC. A few research works have investigated other ways of obtaining the inductor current information in the digital domain. This paper proposes an on-chip digital inductor current sensor that combines both the inductor current-sensing and quantization into a single functional block. In this way, the redundancies found in the conventional approach can be reduced and optimizations can be made to save chip area and power consumption. An 8-bit digital inductor current sensor has been designed and fabricated with a UMC 0.13~\mum CMOS process. The measurement results show that the digital sensor can provide digital inductor current information with a conversion time of 225 ns. This can be used by a buck converter with a switching frequency up to 4 MHz. The digital sensor has linear and monotonic input-output transfer curve properties with an LSB of 6.79 mA. It consumes current of 700~\muA at 1.2 V supply voltage. [ABSTRACT FROM PUBLISHER]

In this article, first integrated circuit (IC) implementation of parallel synchronized switching harvesting on inductor (p-SSHI) is presented for triboelectric energy harvester targeting 1 Hz to 5 Hz mechanical motions. It is accompanied by on-chip buck and switched capacitor DC-DC converters, all capable of handling 70 V levels. Unlike piezoelectric harvesters, triboelectric nanogenerators (TENGs) can produce very high open-circuit voltages; thus, the proposed system utilizes this property within the technology limits to maximize the extracted power. An in-house manufactured TENG using steel and polytetrafluoroethylene (PTFE) is modeled for sub-5 Hz motions. The energy is extracted and stored in an external capacitance until its voltage reaches 70 V, which is achieved in three press-and-release mechanical cycles. 70-to-2 V down conversion is carried on by 70-to-10 V buck converter followed by a 10-to-2 V switched capacitor DC-DC converter. A chip is manufactured in $0.18~\mu \text{m}$ HV BCD process with an active area of 6.25 mm2. End-to-end peak efficiency is measured as 32.71% for 1 Hz motion with a 722 $\mu \text{W}$ total power delivery to the load for 4 ms. [ABSTRACT FROM AUTHOR]

An output voltage ripple aware design of different voltage ramp signal of voltage-mode CCM random frequency buck converter for conductive EMI reduction is presented. A mathematical analysis has been carried out to model the output voltage ripple of random switching converter. Simulations of the converter have been undertaken and measured results from the converter fabricated with a standard 0.35 \mum CMOS process verify the proposed design approach. From experimental results, a carefully designed ramp can reduce the output voltage ripple by more than 8 times without significant influence on the inductor current spectrum spread and any increment on the output filtering inductance and capacitance comparing to the conventional design. [ABSTRACT FROM AUTHOR]