Search

Recent innovations in software defined CMOS radio transceiver architectures heavily rely on high-linearity switched-RC sampler and passive-mixer circuits, driven by digitally programmable multiphase clocks. Although seemingly simple, the frequency domain analysis of these linear periodically time variant (LPTV) circuits is often deceptively complex. This paper uses the properties of sampled LPTV systems and the adjoint (inter-reciprocal) network to greatly simplify the analysis of the switched-RC circuit. We first derive the transfer function of the equivalent linear time-invariant filter relating the input to the voltage sampled on the capacitor in the switched-RC kernel. We show how a leakage resistor across the capacitor can be easily addressed using our technique. A signal-flow graph is then developed for the complete continuous-time voltage waveform across the capacitor, and simplified for various operating regions. We finally derive the noise properties of the kernel. The results we derive have largely been reported in prior works, but the use of the adjoint network simplifies the derivation, while also providing circuit insight. [ABSTRACT FROM PUBLISHER]

The instrumentation systems for implantable brain–machine interfaces represent one of the most demanding applications for ultra low-power analogue-to-digital-converters (ADC) to date. To address this challenge, this paper proposes a $\Delta \Sigma $ SAR topology for very large sensor arrays that allows an exceptional reduction in silicon footprint by using a continuous time 0–2MASH topology. This configuration uses a specialized FIR window to decimate the $\Delta \Sigma $ modulator output and reject mismatch errors from the SAR quantizer, which mitigates the overhead from dynamic element matching techniques commonly used to achieve high precision. A fully differential prototype was fabricated using $0.18\,\mu $ m CMOS to demonstrate 10.8 ENOB precision with a 0.016 mm2 silicon footprint. Moreover, a 14fJ/conv figure-of-merit can be achieved, while resolving signals with the maximum input amplitude of ±1.2 Vpp sampled at 200 kS/s. The ADC topology exhibits a number of promising characteristics for both high speed and ultra low-power systems due to the reduced complexity, switching noise, sampling load, and oversampling ratio, which are critical parameters for many sensor applications. [ABSTRACT FROM PUBLISHER]

This paper addresses the problems of determining the \mathcal H_2 norm and the root mean square (RMS) gain of continuous-time switched linear systems. A novel class of Lyapunov functions is proposed for reaching this goal, called homogeneous rational Lyapunov functions (HRLFs). It is shown that sufficient conditions for establishing upper bounds of the sought performance indexes in the case of arbitrary switching can be given in terms of linear matrix inequality (LMI) feasibility tests by searching for an HRLF of chosen degree. Moreover, it is shown that these conditions are also necessary by searching for an HRLF of degree sufficiently large. It is worth mentioning that necessary and sufficient LMI conditions have not been proposed yet in the literature for the considered problems. Hence, the paper continues by considering the case of switching with dwell time constraints, showing that analogous LMI conditions can be obtained for this case by searching for a family of HRLFs mutually constrained by the dwell time specification. Some numerical examples illustrate the proposed methodology and highlight the advantages with respect to the existing works. [ABSTRACT FROM AUTHOR]

This paper, split into Parts I and II, reviews recent innovations in circuit design that have accelerated the miniaturization of sensor nodes. Design techniques for key building blocks, such as sensor interfaces, timing reference, data communication, energy harvesting, and power management are reviewed. In particular, Part I introduces analog circuit techniques and sensor interfaces for miniaturized sensor nodes. The energy budget of such system is highly restricted due to the small battery volume. Therefore, ultra-low power design techniques are critical enablers and are reviewed. Design techniques for compact monolithic integration are also discussed. [ABSTRACT FROM PUBLISHER]

Resistive RAM (RRAM) technologies are gaining importance due to their appealing characteristics, which include non-volatility, small form factor, low power consumption, and ability to perform logic operations in memory. These characteristics make RRAM highly suited for Internet of Things devices and similarly resource-constrained systems. This paper proposes a novel memristor-based xnor gate that enables the execution of xnor/xor function in the memristive crossbar memory. The proposed two-input xnor gate requires two steps to perform the xnor function. The design of the circuit utilizes bipolar and unipolar memristors and permits cascading by only adding an extra step and one computing memristor. To the best of our knowledge, this is the first native stateful xnor logic implementation. Spice simulations have been used to verify the functionality of the proposed circuit. This includes benchmarking the proposed design against the state-of-the-art stateful memristor-based logic circuits. The results for implementing three-input xor using the proposed circuit demonstrate efficient performance in terms of energy, latency, and area. The gate shows 56% saving in energy, 54% less number of steps (latency), and 50% less number of computing MR (area) compared with the state-of-the-art stateful xor/xnor implementations. [ABSTRACT FROM PUBLISHER]

In this paper, a novel thermoelectric energy harvesting system with a reconfigurable array of thermoelectric generators (TEGs), which requires neither an inductor nor a flying capacitor, is proposed. The proposed architecture can accomplish maximum power point tracking (MPPT) and voltage conversion simultaneously via the reconfiguration of the TEG array, and demonstrate significantly improved power conversion efficiency over the conventional switching converter and switched-capacitor architectures. Two systematical scaling approaches—powers-of-two scaling and maximum-factor scaling—are presented and analyzed to serve as the design guideline, catering for reconfigurable TEG arrays of different sizes. In order to optimize the chip area required, a custom-designed, multi-level hierarchy and systematically scalable switch array that requires a reasonable number of switches is also developed to enable the reconfiguration of the TEG array. The 16-node and 12-node versions of the proposed system have been implemented in a standard 0.35- \mu \textm CMOS process. Measurement results verify the analysis, and confirm that the proposed system can maintain a higher than 88.8% efficiency over a wide range of temperature gradients. [ABSTRACT FROM PUBLISHER]

Memory-centric computing with on-chip non-volatile memories provides unique opportunities for native and local information processing in an energy-efficient manner. Design and modeling methodology based on resistive random access memory (RRAM) is presented in this paper. A hierarchical RRAM SPICE model having different levels of physics realism is described, where the incorporated stochasticity provides a more accurate representation of RRAM operations. Three in-memory operation schemes are developed and experimentally verified for reconfigurable in-memory logic, using RRAM built in 3-D vertical structure (i.e., 3-D RRAM). As a case study for RRAM-centric computing systems, we evaluate the Please note that there were discrepancies between the accepted pdf [TCAS_R1_combined.pdf] and the [TCAS_RRAM-centric computing_hli_FINAL_submit.docx] in the lines 12 and 70. We have followed [TCAS_RRAM-centric computing_hli_FINAL_submit.docx]. use of 3-D RRAMs for a language recognition system using the hyperdimensional (HD) computing model. Utilizing the inherent properties of 3-D RRAM, we demonstrate, using fabricated 3-D RRAM integrated with FinFET, the essential kernels for HD operations: multiplication, addition, and permutation (MAP). RRAM-centric HD systems exhibit strong resilience to hard errors induced by RRAM endurance failures, making a promising case for using various types of RRAM for memory-centric HD systems. [ABSTRACT FROM PUBLISHER]

An efficient micro-scale solar power management architecture for self-powered Internet-of-Things node is presented in this paper. The proposed architecture avoids the linear regulator and presents a complete on-chip switched capacitor-based power converter in order to achieve higher end-to-end efficiency. Unlike traditional architectures, where the harvested energy processes twice, the proposed architecture processes the harvested energy only once before it reaches to the load circuit, irrespective of the ambient conditions. The system efficiency has been improved by ~12% over the traditional architecture. The entire power management system has been designed using 0.18- \mu \textm CMOS technology node, and the circuit simulations demonstrate that the proposed architectural changes bring in a system efficiency of 82.4% under different light conditions. In addition to that, a hardware setup is created using commercially available ICs and photovoltaic cells, to validate that the proposed power management system is practically realizable. [ABSTRACT FROM PUBLISHER]

Reconfigurable finite-impulse response (FIR) filters are one of the most widely implemented components in Internet of Things systems that require flexibility to support several target applications while consuming the minimum amount of power to comply with the strict design requirements of portable devices. Due to the significant power consumption in the multiplier components of the FIR filter, various techniques aimed at reducing the switching activity of these multipliers have been proposed in the literature. However, these techniques rarely exploit the flexibility on the algorithmic level, which can lead to additional benefits. In this paper, FIR filter multipliers are extensively characterized with power simulations, providing a methodology for the perturbation of the coefficients of baseline filters at the algorithm level to trade-off reduced power consumption for filter quality. The proposed optimization technique does not require any hardware overhead and it enables the possibility of scaling the power consumption of the filter at runtime, while ensuring the full baseline performance of any programmed filter whenever it is required. The analyzed FIR filters were fabricated in a 28nm FD-SOI test chip and measured at a near-threshold, 600mV supply voltage. For example, by carefully choosing slightly perturbed coefficients in a low-pass configuration, power savings of up to 33% are achieved when accepting a 3dB degradation on the stopband, as compared with the baseline implementation of the filter. [ABSTRACT FROM PUBLISHER]

Nonlinear circuits may be synchronized with interconnections that evolve in time incorporating mechanisms of adaptation found in many biological systems. Such dynamics in the links is efficiently implemented in electronic devices by using memristors. However, the approach requires a massive amount of interconnections (of the order of N^2 , where $N$ is the number of nonlinear circuits to be synchronized). This issue is solved in this paper by adopting a memristor crossbar architecture for adaptive synchronization. The functionality of the structure is demonstrated, with respect to different switching characteristics, via a simulation-based evaluation using a behavioral threshold-type model of voltage-controlled bipolar memristor. In addition, we show that the architecture is robust to device variability and faults: quite surprisingly, when faults are localized, the performance of the approach may also improve as adaptation becomes more significant. [ABSTRACT FROM PUBLISHER]

This paper investigates the secure state estimation problem of multiagent systems with misbehaving agents. Compared with the existing works which only consider malicious behaviors generated elaborately, a class of faulty behaviors generated randomly is also taken into account. By assuming that faulty behaviors cannot be altered by the adversaries, the notion of orthogonal complement matrix is introduced to characterize the state observability of the multiagent systems with both faulty and malicious agents. It is shown that more misbehaving agents can be tolerated by distinguishing faulty agents from malicious ones. Then, for single agent, two algorithms are provided to estimate the state based on its own value and the measurements obtained from its neighbors. Finally, two simulations are provided to illustrate the correctness and effectiveness of the proposed conditions and methods. [ABSTRACT FROM AUTHOR]

In this paper, a detailed analysis and comparison of nanoelectromechanical systems (NEMS) and CMOS technologies for low power adiabatic logic implementation is presented. Fundamental limits of CMOS-based adiabatic logic are identified. Analytic relations describing the energy-performance for sub-threshold adiabatic logic are also explicitly derived and optimized. The interest of combining NEMS technology and adiabatic logic is described, and the key NEMS switch parameters that govern the dissipation-performance relationship are identified as the switch commutation frequency, its actuation voltage, and the contact resistance between the switch electrodes. Furthermore, NEMS-based adiabatic gates architectures are described. Finally, the contribution of the power-clock or energy recovery generator is estimated in order to compare CMOS and NEMS-based adiabatic architectures at the system level. The paper concludes with a detailed comparison of the energy-performance of the different explored technologies. [ABSTRACT FROM AUTHOR]

This paper presents a circuit in which tungsten oxide -based analog memristors are post-processed on a CMOS-based Field-Programmable Analog Array Integrated Circuit (FPAA-IC). FPAAs are powerful tools for rapid analog experimentation, prototyping and power-efficient computing, and they allow custom analog circuits to be built and reconfigured. The primary motivation for this work is to introduce and demonstrate the operation of the FPAA/memristor hybrid circuit and the board-level infrastructure, and to form a basis for subsequent empirical work on analog memristive computing. The experiments shown in this paper demonstrate a successful fabrication of memristors on the FPAA substrate, and the usefulness of the hybrid computing infrastructure in terms of experimentation with memristors. The experiments suggest that a single state variable cannot capture the adaptation of a memristor. To this end, a SPICE compatible memristor model with two state variables is presented. Furthermore, a memristor-based adaptive coincidence detector is demonstrated on the FPAA/Memristor computing infrastructure. [ABSTRACT FROM AUTHOR]

This article considers a nonlinear filtering method for handling outliers. The presence of outliers that are gross observation errors can greatly reduce the accuracy of filtering methods that assume Gaussian distributed errors. There are some existing methods that assume a Gaussian observation error, and estimate the error covariance matrix at each time step to avoid overfitting to the outliers. However, the estimates of the covariance matrix under such methods can become unstable. This results in underfitting or overfitting to observations when filtering. This paper presents a new method for handling outliers in nonlinear filtering problems by extending the unscented Kalman filter. In this method, two Gaussian observation error models with distinct covariance matrices are used: one for observations with regular errors, and another with a larger variance specified by a scale parameter for outliers. In addition to the system state, this method estimates an indicator variable that switches between the two models and the scale parameter for outliers. With the inclusion of the indicator variable and scale parameter, the estimated error covariance matrix can handle both regular observations and outliers appropriately at each time step. Furthermore, by estimating the scale parameter, the proposed method can be applied to a dataset without additional tuning to account for outlier characteristics. Through numerical experiments, we find that our method can estimate the system state better than existing methods for both datasets with and without outliers. [ABSTRACT FROM AUTHOR]

This paper addresses the event-triggered dynamic output feedback control for switched linear systems with frequent asynchronism. Different from existing work, which limits at most once switching during an interevent interval, we adopt the average dwell time approach without limiting the minimum dwell time of each subsystem, and thus frequent switching is allowed to happen in an interevent interval. Since the difficulty in acquiring the full information of system states, the dynamic output feedback controller is taken into account to stabilize the switched system. By employing a controller-mode-dependent Lyapunov functional, stability criterion is proposed for the resulting closed-loop system, based on which the dynamic output feedback controller together with the mode-dependent event-triggered mechanism is codesigned. Besides, the existence of the lower bound on interevent intervals is attentively discussed, which gets rid of the Zeno behavior. Finally, the effectiveness of the proposed method is illustrated by numerical simulations. [ABSTRACT FROM AUTHOR]

This paper concentrates on the adaptive state-feedback quantized control problem for a class of multiple-input–multiple-output (MIMO) switched nonlinear systems with unknown asymmetric actuator dead-zone. In this study, we employ different quantizers for different subsystem inputs. The main challenge of this study is to deal with the coupling between the quantizers and the dead-zone nonlinearities. To solve this problem, a novel approximation model for the coupling between quantizer and dead-zone is proposed. Then, the corresponding robust adaptive law is designed to eliminate this nonlinear term asymptotically. A direct neural control scheme is employed to reduce the number of adaptive laws significantly. The backstepping-based adaptive control scheme is also presented to guarantee the system performance. Finally, two simulation examples are presented to show the effectiveness of our control scheme. [ABSTRACT FROM AUTHOR]

In this paper, we propose a state-dependent switching controller for multiple-input multiple-output (MIMO) bilinear systems with constant delays in both the state and the input. The control input is assumed to be restricted to take only a finite number of values. The stability analysis of the closed loop is based on a Lyapunov–Krasovskii functional, and the design is reduced to solve a system of linear matrix inequalities. The controller can be designed by considering (state) delay-dependent or delay-independent conditions. [ABSTRACT FROM AUTHOR]

This paper employs detectability ideas to decide uniform global asymptotic stability (UGAS) of the trivial solution for a class of switched nonlinear time-varying systems when the trivial solution is uniformly globally stable. Using the notion of limiting behaviors of the state, output, and switching signals, the concept of a limiting zeroing-output solution is introduced. This leads to a definition of weak zero-state detectability (WZSD) that can be used to check UGAS, (uniformly for a set of switched signals). En route to establish this, a number of new stability results are derived. For example, under appropriate conditions, it is feasible to decide UGAS even when the switching signal does not satisfy an averaged dwell-time condition. It is also shown that WZSD of the original switched system can be verified by detectability conditions of much simpler auxiliary systems. Moreover, UGAS can be guaranteed without requiring that in each allowable system (without switching), the trivial solution is attractive. The effectiveness of the proposed concept is illustrated by a few examples including a switched semi-quasi-Z-source inverter. [ABSTRACT FROM AUTHOR]

In this paper, for the case of the asynchronous switching caused by that subsystem’s switching occuring during a sampling interval, the domain of attraction estimation problem is investigated for aperiodic sampled-data switched delayed neural networks (ASDSDNNs) subject to actuator saturation. A parameters-dependent time-scheduled Lyapunov functional consisting of a novel looped-functional is constructed using segmentation technology and linear interpolation. By employing this novel functional and using an average dwell time (ADT) approach, exponential stability criteria are proposed for polytopic uncertain ASDSDNNs subject to actuator saturation. And a relationship between ADT and sampling period is revealed for ASDSDNNs. As a corollary, exponential stability criteria are proposed for nominal ASDSDNNs subject to actuator saturation. Furthermore, by describing the domain of attraction as a time-varying ellipsoid determined by the time-scheduled Lyapunov matrix, the proposed theoretical conditions are transformed into a linear matrix inequality (LMI)-based multi-objective optimization problem. The dynamic estimates of the domain of attraction for ASDSDNNs are solved. Numerical simulation examples are provided to illustrate the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

The cooperative global robust output regulation problem for multi-agent systems is a generalization of the leader-following consensus problem. The problem has been studied for various multi-agent systems over connected static networks and for some special classes of nonlinear multi-agent systems over jointly connected switching networks. In this paper, we further consider the same problem for a class of heterogeneous lower triangular nonlinear multi-agent systems over jointly connected switching networks. This class of systems is quite general in that it contains inverse dynamics, is of any order, and its subsystems can have different relative degrees. We will integrate the adaptive distributed observer and the distributed internal model approach to come up with a recursive approach to deal with our problem. We will also apply our approach to a leader-following consensus problem for a group of hyperchaotic Lorenz systems. [ABSTRACT FROM AUTHOR]

This paper is concerned with mode-dependent impulsive hybrid systems driven by deterministic finite automaton (DFA) with mixed-mode effects. In the hybrid systems, a complex phenomenon called mixed mode, caused in time-varying delay switching systems, is considered explicitly. Furthermore, mode-dependent impulses, which can exist not only at the instants coinciding with mode switching but also at the instants when there is no system switching, are also taken into consideration. First, we establish a rigorous mathematical equation expression of this class of hybrid systems. Then, several criteria of stabilization of this class of hybrid systems are presented based on semi-tensor product (STP) techniques, multiple Lyapunov–Krasovskii functionals, as well as the average dwell time approach. Finally, an example is simulated to illustrate the effectiveness of the obtained results. [ABSTRACT FROM AUTHOR]

In this paper, we propose continuous-time and sampled-data output feedback controllers for nonlinear multi-input multi-output systems with time-varying measurement and input delays, with no restriction on the bound or serious limitations on the growth of the nonlinearities. A state prediction is generated by chains of saturated high-gain observers with switching error-correction terms and the state prediction is used to stabilize the system with saturated controls. The observers reconstruct the unmeasurable states at different delayed time-instants, which partition the maximal variation interval of the time-varying delays. These delayed time instant depend both on the magnitude of the delays and the growth rate of the nonlinearities. We also design sampled-data stabilizers as zero-order discretization of a hybrid modification (with continuous-time states and discrete-time control and innovations) of the continuous-time stabilizers. [ABSTRACT FROM AUTHOR]

Spiking neural networks (SNNs) are of interest for applications for which conventional computing suffers from the nearly insurmountable memory–processor bottleneck. This paper presents a stochastic SNN architecture that is based on specialized logic-in-memory synaptic units to create a unique processing system that offers massively parallel processing power. Our proposed synaptic unit consists of strained magnetic tunnel junction (MTJ) devices and transistors. MTJs in our synapse are dual purpose, used as both random bit generators and as general-purpose memory. Our neurons are modeled as integrate-and-fire components with thresholding and refraction. Our circuit is implemented using CMOS 28-nm technology that is compatible with the MTJ technology. Our design shows that the required area for the proposed synapse is only $3.64~\mu \text {m}^{2}/\text {unit}$. When idle, the synapse consumes 675 pW. When firing, the energy required to propagate a spike is 8.87 fJ. We then demonstrate an SNN that learns (without supervision) and classifies handwritten digits of the MNIST database. Simulation results show that our network presents high classification efficiency even in the presence of fabrication variability. [ABSTRACT FROM AUTHOR]

This paper considers the problem of efficiently and securely controlling cyber-physical systems that are operating in uncertain, and adversarial environments. To mitigate sensor, actuator attacks, and performance loss due to such attacks, we formulate a secure control algorithm that consists of a proactive and a reactive defense mechanism. The proactive mechanism, which is based on the principles of moving target defense, utilizes a stochastic switching structure to dynamically and continuously alter the parameters of the system, while hindering the attacker's ability to conduct successful reconnaissance to the system. The unpredictability of the current actuator and sensor is optimized using an information entropy measure, which is induced by probabilistic switching. The reactive mechanism on the other side, detects potentially attacked components, namely sensors and actuators, by leveraging online data to compute an integral Bellman error. A rigorous mathematical framework is presented to guarantee the stability of the equilibrium point of the closed-loop system, and provide a quantified bound on the performance loss when utilizing both reactive and proactive mechanisms. Simulation results show the efficacy of the proposed approaches on a benchmark aircraft model. [ABSTRACT FROM AUTHOR]

In this paper, the consensus tracking problem is investigated for a class of continuous switched stochastic nonlinear multiagent systems with an event-triggered control strategy. For continuous stochastic multiagent systems via event-triggered protocols, it is rather difficult to avoid the Zeno behavior by the existing methods. Thus, we propose a new protocol design framework for the underlying systems. It is proven that follower agents can almost surely track the given leader signal with bounded errors and no agent exhibits the Zeno behavior by the given control scheme. Finally, two numerical examples are given to illustrate the effectiveness and advantages of the new design techniques. [ABSTRACT FROM AUTHOR]

Many networked systems display some kind of dynamics behaving in a style with both continuous and impulsive communications. The cooperation behaviors of these networked systems with continuous connected or impulsive connected or both connected topologies of communications are important to understand. This paper is devoted to the synchronization of the networked system with continuous and impulsive hybrid communications, where each topology of communication mode is not connected in every moment. Two kind of structures, i.e., fixed structure and switching structures, are taken into consideration. A general concept of directed spanning tree (DST) is proposed to describe the connectivity of the networked system with hybrid communication modes. The suitable Lyapunov functions are constructed to analyze the synchronization stability. It is showed that for fixed topology having a jointly DST, the networked system with continuous and impulsive hybrid communication modes will achieve asymptotic synchronization if the feedback gain matrix and the average impulsive interval are properly selected. The results are then extended to the switching case where the graph has a frequently jointly DST. Some simple examples are then given to illustrate the derived synchronization criteria. [ABSTRACT FROM AUTHOR]

This paper investigates the issue of sampled-data stabilization for Takagi–Sugeno fuzzy memristive neural networks (FMNNs) with time-varying delay. First, the concerned FMNNs are transformed into the tractable fuzzy NNs based on the excitatory and inhibitory of memristive synaptic weights using a new convex combination technique. Meanwhile, a switched fuzzy sampled-data controller is employed for the first time to tackle stability problems related to FMNNs. Then, the novel stabilization criteria of the FMNNs are established using the fuzzy membership functions (FMFs)-dependent Lyapunov–Krasovskii functional. This sufficiently utilizes information from not only the delayed state and the actual sampling pattern but also the FMFs. Two simulation examples are presented to demonstrate the feasibility and validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper is concerned with state estimation for a class of hidden semi-Markov jump linear systems governed by a two-layer stochastic process in the discrete-time context. A semi-Markov chain and an observed-mode sequence constitute the lower and upper layer of the process, respectively. With the aid of the emission probability, a novel filter, which is dependent both on the elapsed time within the activated mode and on the observed mode instead of the system mode, is constructed and called observed-mode-dependent (OMD) filter. A modified $\sigma$ -error mean square stability ($\sigma$ -MSS) is proposed by considering the weight of expected operation time in each actual system mode. Based on the new $\sigma$ -MSS, together with a class of Lyapunov functions depending on both the system modes and the corresponding observed ones, numerically checkable conditions on the existence of the OMD filter are presented such that the estimation error system is $\sigma$ -MSS with a prescribed $\mathcal {H}_{\infty }$ disturbance attenuation level. A numerical example is presented to demonstrate the theoretical findings. [ABSTRACT FROM AUTHOR]

Based on the P-type composition of Petri nets (PNs) defined in this paper, a framework for a structural control of discrete event systems (DESs) is constructed such that a closed-loop PN is obtained by composing a plant PN and a controller. As for a disjunction or conjunctive normal form (CNF) of linear constraints, a new approach is proposed to design a structural controller in this framework. First, a switching-net is defined for a disjunction of constraints, and an extended plant is obtained through the P-type composition of a plant PN and switching-net. Second, the disjunction of bounded constraints is transformed into a conjunction of switching-constraints on the extended plant. Third, a controller is synthesized by designing monitors for conjunctive switching-constraints according to a supervision-based-on-place-invariant method. Fourth, in a similar manner, a controller is also designed for a CNF of bounded constraints. The resulting controller is maximally permissive if each disjunction of constraints meets the jump-free condition, and its size grows polynomially with the number of constraints. Another advantage is that the closed-loop system is still a PN for many real DES since a CNF can describe not only convex but also nonconvex state regions. [ABSTRACT FROM AUTHOR]

This paper deals with the problem of sliding mode control design for nonlinear stochastic singular semi-Markov jump systems (S-MJSs). Stochastic disturbance is first considered in studying S-MJSs with a stochastic semi-Markov process related to Weibull distribution. The specific information including the bound of nonlinearity is known for the control design. Our attention is to design sliding mode control law to attenuate the influences of uncertainty and nonlinear term. First, by the use of the Lyapunov function, a set of sufficient conditions are developed such that the closed-loop sliding mode dynamics are stochastically admissible. Then, the sliding mode control law is proposed to ensure the reachability in a finite-time region. Finally, the practical system about dc motor model is given to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

This paper presents a systematical reduced-order observer design method for a class of switched descriptor systems containing unknown inputs (UIs) in both the dynamic and the output equations. Generally speaking, when the output of the system contains UIs, the reduced-order observer design will become much more challenging. In order to overcome the difficulty brought by the UIs in the output, first, by introducing a new UI vector, a new equivalent system is obtained, which does not contain UIs in the corresponding output any more. Then, for the purpose of reduced-order observer design, the observer matching condition (OMC) and the minimal phase condition (MPC) are discussed, and it is shown that the new general system maintains both the OMC and the MPC. Subsequently, based on the discussions on the existence conditions, a reduced-order unknown input observer is developed to asymptotically estimate the state of the original system. Finally, an electronic circuit example is given to show the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In this paper, input-to-state stability (ISS) for discrete-time switched nonlinear time-varying (SNTV) systems is investigated. Starting with discrete-time nonlinear time-varying (NTV) systems, some improved sufficient conditions are proposed to verify the ISS of systems by using the weak implication-form ISS (WI-ISS) Lyapunov function, weak dissipative-form ISS (WD-ISS) Lyapunov function, and interval descent technique. Then, the results obtained are extended to study the ISS of discrete-time SNTV systems, several relaxed conditions are given by using piecewise WI-ISS and WD-ISS Lyapunov functions, minimum dwell time, and infinite switching methods, respectively. Comparing with the existing results, the obtained conditions release the requirement on negative definiteness of the differences of (piecewise) Lyapunov functions, moreover, all subsystems are allowed to be unstable in the case of infinite switching. Finally, a numerical example is given to illustrate the theoretical results. [ABSTRACT FROM AUTHOR]

This paper focuses on the problem of output tracking with prescribed transient and steady-state performance for strict-feedback systems with unknown nonlinear functions and unmatched disturbances. In lieu of Nussbaum gain techniques, parameter estimation algorithms and switching control strategies, a continuous static low-complexity control solution is provided by means of a novel combination of smooth orientation functions and error transformation functions. The proposed method possesses inherent robustness against model uncertainties, disturbances, and virtual control signal derivatives, thus eliminating the needs to introduce extra robust control schemes and compute analytic derivatives. Comparative simulation results further illustrate the above theoretical findings. [ABSTRACT FROM AUTHOR]

By using an intermittent control approach, this paper is concerned with the exponential synchronization and $L_{2}$ -gain analysis for a class of delayed master–slave chaotic neural networks subject to actuator saturation. Based on a switching strategy, the synchronization error system is modeled as a switched synchronization error system consisting of two subsystems, and each subsystem of the switched system satisfies a dwell time constraint due to the characteristics of intermittent control. A piecewise Lyapunov–Krasovskii functional depending on the control rate and control period is then introduced, under which sufficient conditions for the exponential stability of the constructed switched synchronization error system are developed. In addition, the influence of the exogenous perturbations on synchronization performance is constrained at a prescribed level. In the meantime, the intermittent linear state feedback controller can be derived by solving a set of linear matrix inequalities. More incisively, the proposed method is also proved to be valid in the case of aperiodically intermittent control. Finally, two simulation examples are employed to demonstrate the effectiveness and potential of the obtained results. [ABSTRACT FROM AUTHOR]

This paper is concerned with the fault and state estimation problem for Markovian jump systems (MJSs) with simultaneous actuator and sensor faults. To deal with the design issues, we propose a novel descriptor reduced-order sliding mode observer (SMO), based on which the estimation of the actuator faults, sensor faults, and the states can be obtained simultaneously. Compared with the traditional SMO design issues in MJSs, we reconstruct the actuator faults directly without employing the equivalent output error injection method. Thus, the reachability analysis of the sliding surface is not necessary. The superiority of this kind of the SMO method is that the sliding surface switching problem is avoided. Finally, the effectiveness (as suggested by the theoretical results) of the approach described is tested on a mobile manipulator by simulation studies. [ABSTRACT FROM AUTHOR]

Necessary and sufficient conditions for the stability of linear continuous-time systems with stochastically switching delays are presented in this paper. It is assumed that the delay random paths are piece-wise constant functions of time where a finite number of values may be taken by the delay. The stability is assessed in terms of the second moment of the state vector of the system. The solution operators of individual linear systems with constant delays, chosen from the set of all possible delay values, are extended to form new augmented operators. Then for proper formulation of the second moment in continuous time, tensor products of the augmented solution operators are used. Finally the finite-dimensional versions of the stability conditions, that can be obtained using various time discretization techniques, are presented. Some examples are provided that demonstrate how the stability conditions can be used to assess the stability of linear systems with stochastic delay. [ABSTRACT FROM AUTHOR]

The joint spectral radius (JSR) of a set of matrices characterizes the maximal asymptotic growth rate of an infinite product of matrices of the set. This quantity appears in a number of applications including the stability of switched and hybrid systems. A popular method used for the stability analysis of these systems searches for a Lyapunov function with convex optimization tools. We analyze the accuracy of this method for constrained switched systems, a class of systems that has attracted increasing attention recently. We provide a new guarantee for the upper bound provided by the sum of squares implementation of the method. This guarantee relies on the $p$ -radius of the system and the entropy of the language of allowed switching sequences. We end this paper with a method to reduce the computation of the JSR of low-rank matrices to the computation of the constrained JSR of matrices of small dimension. [ABSTRACT FROM AUTHOR]

In this paper, we study a linear–quadratic mean-field-type game problem under jump–diffusion–regime switching state dynamics that include mean-field terms in the states and in the cost function. In the cost functional, we consider conditional variance of both the states and control actions, mean of both states and control actions, and covariance terms. The underlying problem is solved in a semiexplicit way by using the direct method. [ABSTRACT FROM AUTHOR]

In this paper, the stability and $L_2$ -gain properties of linear impulsive delay systems with delayed impulses are studied. Commonly employed techniques, in which the delayed impulses are treated using Newton–Leibniz formula, may not be applicable to $L_2$ -gain analysis, since they make the disturbance input appear in the impulse part. In order to circumvent the difficulty, we first augment the considered system to a time-delay system with switching nondelayed impulses. Due to the absence of delayed impulses, this new approach has advantages in constructing Lyapunov functions and handling the effects of impulse delays on the system performance. Switching-based time-dependent Lyapunov functions are introduced to deal with the resultant switching impulses of the augmented system. Sufficient conditions for exponential stability and $L_2$ -gain properties are derived in terms of linear matrix inequalities. Numerical examples are provided to illustrate the efficiency of the new approach. [ABSTRACT FROM AUTHOR]

Secure state estimation for cyber-physical systems under sparse sensor attacks is the problem of estimating the state from the corrupted measurements. Although such problem can be addressed by brute force search, combinatorial candidates lead to excessive time requirement, which hinders the scalability. For reducing the computational complexity, this paper provides an alternative approach (called set cover approach) to reduce the number of candidates by at least half with the help of a greedy algorithm. Then, a switched observer, with less candidate observers, is designed to estimate the state from the corrupted measurements under the basic observability requirement. Meanwhile, a modified greedy algorithm is proposed to reduce the number of candidates further based on the observer design conditions. Finally, the effectiveness of the proposed set cover approach is demonstrated by two simulations showing an order of magnitude decrease in execution time. [ABSTRACT FROM AUTHOR]

This paper studies the stability for impulsive switched time-delay systems with state-dependent impulses. Since the impulses and the switches are not necessarily synchronous, we start from a stability analysis of impulsive switched time-delay systems with time-dependent impulses. Sufficient conditions are derived to guarantee the stability property, which extends the previous results for the synchronous switch and impulse case. For the state-dependent impulse case, using the B-equivalent method, impulsive switched time-delay systems with state-dependent impulses are transformed into impulsive switched time-delay systems with time-dependent impulses. The equivalence between the original system and the transformed system is established, and stability conditions are obtained for impulsive switched time-delay systems with state-dependent impulses. Finally, a numerical example is given to demonstrate the obtained results. [ABSTRACT FROM AUTHOR]

This paper deals with the dead-beat stabilizability of autonomous discrete-time switched linear systems. Based on a constructive necessary and sufficient condition for dead-beat stabilizability, we propose two algorithms. The first one is concerned with the problem of testing dead-beat stabilizability and computing the shorter stabilizing mode sequence, whenever it exists. The other one implements a method to construct a switched system whose shorter dead-beat stabilizing sequence has a prescribed length. Then, we present numerical assessments and possible applications. [ABSTRACT FROM AUTHOR]

This paper investigates the interaction between control and communications in networked systems by studying a class of stochastic approximation algorithms that accommodate random network topology switching processes, time-varying functions, nonlinear dynamics, additive and nonadditive noises, and other uncertainties. Interaction among control strategy and the multiple stochastic processes introduces critical challenges in such problems. By modeling the random switching as a discrete-time Markov chain and studying multiple stochastic uncertainties in a unified framework, it is shown that under broad conditions, the algorithms are convergent. The performance of the algorithms is further analyzed by establishing their rate of convergence and asymptotic characterizations. Simulation case studies are conducted to evaluate the performance of the procedures in various aspects. [ABSTRACT FROM AUTHOR]

The series-capacitor boost converter (SCBC) requires a duty cycle ($D) \ge0.5$ control, otherwise has issues of power switch overstress and inductor currents imbalance. Then, we cannot use the SCBC in wide conversion ratio (CR) applications that require CR < 4. Meanwhile, the $D \ge0.5$ control does not allow $D$ to increase smoothly from 0 during start-up, causing severe inrush inductor currents. As a solution, we propose two control schemes on the capacitor-cross-connected (CCC) boost converter, which is the symmetric version of the SCBC. With the proposed hard-charging control, the CCC converter allows $D < 0.5$ without overstress or imbalance issues, thus extending the CR range and facilitating a soft start-up. In addition, we propose a soft-charging control that enhances the efficiency for 3< CR < 4. We study the output impedance and CR expressions under these two types of controls. Finally, we propose a compact centrosymmetric floorplan that reduces the switching nodes’ ringing, verifying the proposed schemes with a 2.8-to-8.4-V input / 24-V output prototype converter. It exhibits a soft start-up with the proposed control. Under an 8-V input voltage and 1.5-A output current, the peak efficiency of the proposed hard-charging and soft-charging control is 94.7% and 96.3%, respectively. [ABSTRACT FROM AUTHOR]

This work presents an always-on reference ripple cancellation technique that actively cancels the reference settling error throughout the entire SAR conversion process. Unlike the conventional designs that require high-speed reference buffers or large on-chip decoupling capacitors to minimize the error, it incorporates an extra path to actively cancel the error, which can provide considerable reference ripple tolerance, thus significantly relaxing the reference settling requirement. To verify the proposed technique, a prototype 10-bit 100-MS/s SAR ADC is fabricated in a 40-nm CMOS process. Equipped with the proposed technique, it only requires a 0.5-pF decoupling capacitor and an on-chip low-power reference buffer consuming 0.26-mW static power. The proposed technique improves the signal-to-noise and distortion ratio (SNDR) by 8 dB and reduces the worst case integrated non-linearity (INL) and differential non-linearity (DNL) by 15 times. Overall, the prototype ADC achieves an SNDR of 56.3 dB at Nyquist rate while consuming 1.4 mW, including on-chip reference buffers. [ABSTRACT FROM AUTHOR]

In the quest for low power, bio-inspired computation both memristive and memcapacitive-based Artificial Neural Networks (ANN) have been the subjects of increasing focus for hardware implementation of neuromorphic computing. One step further, regenerative capacitive neural networks, which call for the use of adiabatic computing, offer a tantalising route towards even lower energy consumption, especially when combined with ‘memimpedace’ elements. Here, we present an artificial neuron featuring adiabatic synapse capacitors to produce membrane potentials for the somas of neurons; the latter implemented via dynamic latched comparators augmented with Resistive Random-Access Memory (RRAM) devices. Our initial 4-bit adiabatic capacitive neuron proof-of-concept example shows 90% synaptic energy saving. At 4 synapses/soma we already witness an overall 35% energy reduction. Furthermore, the impact of process and temperature on the 4-bit adiabatic synapse shows a maximum energy variation of 30% at $100^{o}C$ across the corners without any functionality loss. Finally, the efficacy of our adiabatic approach to ANN is tested for 512 & 1024 synapse/neuron for worst and best case synapse loading conditions and variable equalising capacitance’s quantifying the expected trade-off between equalisation capacitance and range of optimal power-clock frequencies vs. loading (i.e. the percentage of active synapses). [ABSTRACT FROM AUTHOR]

This article proposes a broadband high-efficiency parallel-circuit (PC) class-EF power amplifier (PA) along with a quarter-wavelength stub for the first time. By adding a reactive element ${X}$ , the design space is expanded so that the impedance terminations of the fundamental and harmonics are no longer fixed points. Based on the broadband capability of the proposed structure, using a GaN HEMT transistor, a proof-of-concept circuit implemented with the Chebyshev impedance transformation network is designed and fabricated. Experimental results demonstrate a high-efficiency broadband PA operating from 2.6-3.9 GHz, with the average efficiency of 71.5%, the measured output power (${P}_{\textit {out}}$) of 38.8-40.9 dBm and the power gain of 8.5-10.6 dB. [ABSTRACT FROM AUTHOR]

The almost sure finite-time sliding mode control issue is investigated for Markov jump systems. The switching asynchronism between the constructed controller and considered systems is studied. The influence of time-varying delays and disturbances on systems is fully considered, and the sliding mode controller design within a finite time interval is extended to the probability framework. First, the finite time interval is divided into the reaching and the sliding motion phases, and the almost sure finite-time boundedness is analyzed in both phases. Second, the sliding mode controller gain is determined by the provided linear matrix inequality-based criteria. Finally, a numerical example and DC-DC buck converter circuit example verify the effectiveness and less conservativeness of our method. [ABSTRACT FROM AUTHOR]

Voltage-controlled-oscillator-based analog-to-digital converter (ADC) is a scaling-friendly architecture to build ADCs in fine-feature complimentary metal-oxide-semiconductor processes. Lending itself to an implementation with digital components, such a converter enables design automation with existing digital CAD hence reducing design and porting costs compared with a custom design flow. However, robust architectures and circuit techniques that reduce the dependence of performance on component accuracy are required to achieve good performance while designing converters with low accuracy components like standard cells in deeply-scaled processes. This paper investigates errors resulting from the sampling of a fast switching multi-phase ring oscillator output. A scheme employing ones-counters is proposed to encode the sampled ring oscillator code into a binary representation, which is resilient to a class of sampling induced errors modeled by the temporal reordering of the transitions in the ring. In addition to correcting errors caused by deterministic reordering, proposed encoding suppresses conversion errors in the presence of arbitrary reordering patterns that may result from automatic place-and-route in wire-delay dominated processes. The error suppression capability of the encoding is demonstrated using MATLAB simulation. The proposed encoder reduces the error caused by the random reordering of six subsequent bits in the sampled signal from 31 to 2 LSBs for a 31-stage oscillator. [ABSTRACT FROM AUTHOR]

This paper presents a 12b 180 MS/s 0.068 mm2 $2\times$ time-interleaved pipelined-SAR analog-to-digital conver-ter (ADC) with gain and offset calibrations fully embedded on-chip. The proposed binary-search gain calibration (BSGC) technique corrects the inter-stage gain error caused by the open-loop residue amplifier. The BSGC, fully integrated into the second-stage SAR ADC, contributes to a compact area. We improve the noise performance by implementing a merged-residue-DAC operation in the first-stage ADC. Also, we propose a dual-phase bootstrap technique to improve the sampling linearity in the partial interleaving architecture. The measurement results of the ADC prototype in 65 nm CMOS demonstrate the effectiveness of the proposed calibration through the enhancement of the signal to noise-and-distortion ratio from 51.5 to 60.9 dB at a Nyquist input, leading to a FoM@Nyq of 36.7 fJ/conversion-step. [ABSTRACT FROM AUTHOR]