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In renewable energy micro-source applications, a wide range of voltage conversion of the step-up converter is an essential part to equalize the typical low voltage of micro-source with DC-bus voltage of Inverter or motor drives. In order to meet this purpose, an ultra-voltage gain step-up DC-DC converter is proposed in this paper. The proposed converter has made an arrangement of the regenerative-boost fed switched inductor and capacitor configurations. Thereby, due to such an organization of structure, the proposed converter can develop an extremely high voltage-gain even at lower duty ratios. In addition, it has the advantage of lower switching stress across all power semi-conductive diodes. Furthermore, this paper describes the steady-state analysis and comparative features of the converter with existing recent literature. Finally, to validate theoretical analysis and test the feasibility and suitability of the proposed ultra-gain converter, the experimental results were observed by a 500 W fabricated prototype. [ABSTRACT FROM AUTHOR]

In photovoltaic systems, common-mode voltage (CMV) generates leakage current, which shortens the insulation lifespan and causes safety problems. As for neutral-point-clamped (NPC) inverters, zero CMV PWM (ZCMV PWM) can be implemented to eliminate leakage current, but unable to balance neutral-point (NP) voltage in dc side. This article presents a novel modulation technique for NPC PV inverter. The strategy contains ZCMV PWM and another two modulation modes which keeps CMV constant in one switching period, so as to eliminate leakage current. In order to balance NP voltage, NP current is adjusted by selection of optimal modulation mode and the leakage current is still well eliminated during the process of balancing NP voltage. Compared with conventional ZCMV PWM, the proposed scheme can remove both leakage current and NP voltage deviation. The output performance and limitations of the proposed method are also introduced in the paper. Experiments are provided to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

The capacitor condition monitoring is an important issue for the reliable operation of modular multilevel converters (MMCs) in high-voltage applications. The numerous capacitors make the monitoring for the capacitor condition complex and computation-consuming. This paper proposes a hierarchic capacitor condition monitoring strategy to assure the reliability of high-voltage MMCs. In the strategy, the switching times of the switching signals are counted to detect the condition of the capacitor in each submodule (SM). Then, the subsequent capacitance calculation method is only conducted to the abnormal capacitors indicated by the above condition detection algorithm. Meanwhile, the variations of the measured and reference capacitor voltages are employed to calculate the capacitance in the proposed method. The condition detection algorithm shrinks the scope where the abnormal capacitors locate, which avoids calculating the total capacitances in MMCs. In the proposed capacitance calculation method, the complex operations are further saved. Both the two measures reduce the computation burden effectively. The implementation of the whole monitoring strategy is simple and fit for high-voltage MMCs. Moreover, the strategy has no adverse influence on the normal operation of MMCs. The effectiveness of the proposed strategy is verified by the simulation studies with the professional tool Matlab/Simulink. [ABSTRACT FROM AUTHOR]

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of Vo/2, etc. [ABSTRACT FROM AUTHOR]

This paper presents a new soft switching high voltage gain interleaved dc-dc converter with a three-windings coupled inductor for a fuel cell vehicle. Two interleaved and intercoupled boost cells are connected by the input parallel and output series (IPOS) configuration, realizing low input current ripple and high voltage gain simultaneously. All power switches can operate under soft switching conditions by only adding a simple auxiliary circuit composed of one auxiliary inductor and one power switch. Besides, the auxiliary inductor is coupled with the main inductors, which results in a rapid zero convergence of the auxiliary current and a small conduction loss of the auxiliary circuit. The operating principle, steady state characteristic, comparison with other converters, and parameter design are analyzed in this paper. Finally, the main characteristics of the proposed converter are verified by a 1-kW laboratory prototype. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (MMCs) in high- voltage applications contain large numbers of power switches, which increases the fault probability inside MMCs. This paper proposes a detection method for the faulty arm containing switch open-circuit failures in high-voltage MMCs to improve the reliable operations of MMCs. The proposed method uses the periodicity of the deviation between the maximum and minimum capacitor voltages to provide the detection reference. To yield a reliable reference, the repetitive signal generator is employed. Then, the fault is identified by the difference between the referenced and measured capacitor voltage deviations. An auxiliary criterion is also designated to avoid the false detection caused by the mutations in MMCs. The proposed method can reduce the difficulty in the selection of thresholds. Moreover, the proposed method is robust in high-voltage MMCs with inferior capacitor voltage balancing performance, which ensures detection rapidity and accuracy. Finally, the feasibility of the method is verified by simulation results in Matlab/Simulink. [ABSTRACT FROM AUTHOR]

Differential power processing (DPP) converters have been developed for photovoltaic (PV) panels to preclude energy yield reduction due to partial shading. In large-scale PV systems comprising numerous series-connected panels, DPP converters with good modularity are preferable because the number of series-connected panels varies depending on applications. This paper proposes a switched capacitor converter (SCC)-based modular DPP architecture for large-scale PV systems. Four panels are grouped as a module, each having a panel-level DPP converter, and modules are connected in series to form a string. The design of the panel-level DPP converter is fixed while the system can be arbitrarily extended by stacking modules, achieving good modularity. Adjacent panel-level DPP converters are dc-coupled, by which modules can be connected using long cables, mitigating installation limitations. The experimental results of the laboratory and field testing demonstrated the energy yield enhancement by 10%–20%, depending on shading conditions. [ABSTRACT FROM AUTHOR]

The paper develops two computationally efficient models, namely a detailed equivalent model and an average-value model, with provisions for representation of the critical state of converter blocking, for modular multilevel converters with embedded storage. These models are indispensable in the simulation of dc faults. The developed detailed equivalent model provides accuracy that matches electromagnetic transient (EMT) simulations, with much reduced computational burden; the developed average-value model represents the averaged behavior of the converter by neglecting switching transients. Both models are extensively evaluated in the context of an HVDC system against benchmark results form a detailed switching model developed in PSCAD/EMTDC. The results confirm the validity and accuracy of the models for steady state, transient, and faulted operating conditions including when the converter is blocked in response to a dc fault. [ABSTRACT FROM AUTHOR]

This paper proposes a novel dual input nine-level inverter (DINLI) topology which requires only seven controllable devices. The dual inputs are un-identical DC voltage sources in the ratio 1:3. A simple control scheme is derived by appropriately modifying the phase disposition pulse width modulation technique to generate high-quality 9-level output from the DINLI topology. At any given instant, a maximum of four switches conduct out of which only a maximum of two switches operate at high frequency, bringing down the switching and conduction losses significantly and improving the overall system efficiency. The bidirectional DINLI (BDINLI) topology with reactive power capability can be realized by replacing the unidirectional devices with the controlled switches (i.e., total nine switches). In addition, the proposed DINLI topology does not require extra voltage balancing circuits which further improves the efficiency. The DINLI operation is verified through MATLAB simulations for grid-connected applications and its extension to an n-level, 3-phase application is also investigated. Experiments performed on a 1KVA laboratory prototype to validate the theoretical claims. [ABSTRACT FROM AUTHOR]

Different from typical circuit breakers, breakers used to switch AC filters in convertor stations have to operate frequently according to the real-time operation mode and daily load changes. Therefore, the performance of filter breakers decreases very quickly, which leads to frequent accidents. Both preinsertion resistors and controlled switching devices can suppress switching transients. In this paper, a comparative analysis of whether a controlled switching device and preinsertion resistor should be adopted is carried out using PSCAD. The transient is calculated as the combined result of the switching angle and preinsertion resistor value, and the optimal configurations are proposed. After determining the resistor value and whether a controlled switching device should be included, the reference voltage of the arrester should be reevaluated. [ABSTRACT FROM AUTHOR]

Voltage source converters (VSCs) have been extensively used in power systems for interfacing renewable energies and other modern loads. Because of their nonlinear nature, a proper harmonic model of VSC devices must be established when conducting harmonic analyses in power systems. This is especially true for low-order harmonics, which are routinely encountered in present power systems. To this end, an analytical harmonic model that represents the low-order harmonic characteristics of VSCs is developed in this paper. The new model takes both the control loop and power loop (i.e., DC-link capacitor) of the VSC into account through rigorous mathematical derivations. The final result has shown that the VSC can be represented by a harmonically coupled impedance matrix at harmonic frequencies, which can be easily used for harmonic analyses of large-scale power systems. It also shows that the DC-link capacitor has a more noticeable impact on the harmonic impedance of VSCs with a smaller DC-link capacitance and low-order harmonics. The appropriateness of the new model was verified using EMT simulations and lab experiments. A complete procedure to construct the proposed VSC model is also established based on the research findings. [ABSTRACT FROM AUTHOR]

Miniaturization and low cost contribute to the development and popularization of wireless power transfer (WPT). Reducing the number of power conversion stages can reduce the volume and cost of the WPT converter, and even make it possible to improve the efficiency. A single-stage WPT converter with constant current (CC) and constant voltage (CV) output and its asymmetric modulation method are proposed in this paper. A direct AC-AC converter is applied to the primary side of the WPT converter to directly convert line-frequency AC to high-frequency AC. The applied direct AC-AC converter that can replace the commonly used multi-stage primary converter reduces the number of circuit devices, thereby reducing the volume and cost of primary converter. The proposed WPT converter can realize zero voltage switching (ZVS) and power factor correction (PFC). In order to achieve CC and CV output, a switchable hybrid compensation topology is applied to the proposed WPT converter. A 720-W experimental prototype was manufactured to verify the rationality of the proposed WPT converter and the correctness of the theoretical analysis. [ABSTRACT FROM AUTHOR]

The missing capability of DC fault current limitation is an inherent disadvantage in the typical half-bridge modular multilevel converter (MMC), which restricts its application in long-distance high voltage direct current (HVDC) systems. The full-bridge submodule (FBSM) and clamped double submodule (CDSM) topologies allow for fault current self-clearing, but also suffer from additional hardware cost and power losses. In this paper, an improved submodule topology utilizing the new reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed to improve system economy without compromising its performance. The operating principles and DC fault characteristics of the proposed topology are analyzed in details, including comparison with various topologies in terms of cost, losses, fault current clearing speed and thermal. Compared with the traditional CDSM topology, the proposed RBSM can clear DC faults faster with reduced cost of switching devices. A DC fault protection strategy for MMC-HVDC system is also presented. Simulation results under normal operating, permanent and transient fault conditions are carried out to verify the effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

A multi-level boost topology based on a flying capacitor is compared in this work with the hybrid, multi-level, partial power processing topology already presented in the literature for use as a highly efficient and compact dc/dc stage in 1500-V, two-stage, grid-connected PV systems. Different variations of the resonant stage of the hybrid topology are analyzed and compared in terms of losses, volume and complexity. Full multivariable optimization is conducted for the multi-level boost topology with different number of levels and for all the analyzed variations of the resonant stage of the hybrid topology. Appropriately rated new classes of 650-V and 900-V WBG devices are included in the optimization algorithm. It is concluded that due to the dominant conduction losses and gap in the voltage rating of the commercially available WBG devices between 650V and 200V, increase of the number of levels over 4 leads to the deteriorated loss and volume performances. All the analysis related to the resonant stage of the hybrid topology is confirmed by detailed and comprehensive measurements of two prototypes of 4kW of nominal and 7kW of maximal power. Additionally, all the loss models applied in the optimization algorithms presented in this paper are confirmed by detailed measurements, thermal calibration and finite element thermal simulations of the wide bandgap devices and inductor designs employed in this work. [ABSTRACT FROM AUTHOR]

Two-stage AC-DC converters are considered as a prominent solution for DC-type electric vehicle (EV) chargers. However, this kind of architecture suffers from high switching losses with large heatsink and DC-link capacitor volume. To relieve this issue, this paper presents a new hybrid modulation for DC-type EV chargers, where a two-phase clamped discontinuous pulse-width-modulation (DPWM) in the front-end circuit is cooperated with the variable frequency triangular-current-mode (TCM) zero voltage switching (ZVS) or its simplified implementation, i.e., boundary-ZVS (B-ZVS) strategy, in the back-end circuit. The former can stop the switching actions in the front-end stage during two-thirds of the grid period, while the AC currents are at their highest values, which can yield to the best switching loss reduction and deliver high power factor operation. Besides, TCM-ZVS or B-ZVS modulations can achieve ZVS turn-on action for all semiconductors during all operating range in the DC-DC stage to further reduce the power losses on the semiconductors. With such characteristics, the proposed strategies can reduce the switching losses of the system to the best extent, and thus allow an enhancement of the system power density by improving the power conversion efficiency. The proposed strategy is described, analyzed, validated, and benchmarked in a 5 kW SMD SiC MOSFET-based two-stage AC-DC converter. A 99% power efficiency can be achieved with the solution implementing the TCM-ZVS strategy at an output voltage of 400 V and rated power. [ABSTRACT FROM AUTHOR]

The integration of overhead lines in future MTDC grids leads to a higher fault rate compared to cables. Most of the faults are considered to be non-permanent, so that the line can be reconnected after dielectric recovery. The auto-reclosing procedure in HVDC systems reveals new challenges since multiple restrikes are possible within a short period of time. This paper proposes an auxiliary circuit for DC Circuit Breakers (DCCB) which enables to use the DCCB internal capacitor for the line pre-energization. A comprehensive description of the switchgear operations during the pre-energization sequence is provided and the fault property identification method is defined. The method is validated by simulations in a MTDC grid and a sensitivity analysis is carried out using EMTP-RV. [ABSTRACT FROM AUTHOR]

This article develops a series of improved Z-source dc–dc converters to realize additional voltage pumping and high power density through two propositions. Proposition 1 develops two improved positive- and negative-connected Z-source dc–dc converters (IPZSC and INZSC), using the same number of components as in the existing voltage pumping Z-source converter. Based on Proposition 1, Proposition 2 proposes four novel embedded Z-source dc–dc converters (EZSCs) by placing the source in a specifically designed position, which realizes lower voltage stresses across capacitors. Various technical aspects of the proposed EZSCs, including operations, power losses, and small signal stability analyses are detailed in this paper. Besides, comparisons between the proposed series of improved Z-source dc–dc converters and other existing Z-source dc–dc converters are thoroughly made to demonstrate the better performance of the EZSCs. Finally, experiments are conducted to well validate the effectiveness and superiority of the proposed converter circuits. [ABSTRACT FROM AUTHOR]

This paper presents a new single-source three-phase seven-level inverter with an inherent three-time voltage boosting capability for medium-voltage applications. The proposed topology is comprised of series connection of two switched-capacitor (SC) networks with an added half-bridge module per phase. Each of such integrated SC networks requires a single capacitor associated with three active power switches. The three-time voltage boosting feature of the proposed topology can reduce the dc-link voltage requirements by 50% in comparison to the traditional neutral point clamped (NPC), flying capacitors, active NPC (ANPC), hybrid clamped ANPC, and cascaded H-bridge topologies, and 75% to advanced ANPC topologies. It can also reduce the number of required switches and capacitors as well as their voltage stresses compared to those state-of-the-art topologies reported in the literature. By integrating “n” number of added SC networks in the proposed seven-level basic topology, the number of output voltage levels can be extended to 2n+3 per phase. A finite control set model predictive control algorithm is also derived to control the converter in both the active and reactive power exchanges modes without distorting the generated grid current quality. The capacitor voltage balancing is inherent in the proposed topology, and thus, there is no need for any additional voltage balancing circuit, which further reduces the control complexity. The performance of the proposed topology and its control algorithm are validated by several measurement results. [ABSTRACT FROM AUTHOR]

An improved two-stage model predictive current control (MPCC) for three-phase three-level converters in the paper, which can simultaneously achieve common-mode voltage (CMV) reduction, effective dc-link capacitor voltage control, and decreased computational burden, is proposed. Compared to the other current control strategies, it has the capability of handling multiple control objectives and possesses a simple structure. Furthermore, it greatly reduces the CMV since the peak CMVs of all the candidate voltage vectors are constrained to be less than one sixth of the dc-link voltage. In addition, an optimal two-stage voltage vector selection mechanism is employed in the proposed method. It helps to significantly reduce the computational complexity. Simulation and experimental results are provided to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

Conventionally, the converter of switched reluctance motor (SRM) is fed by the uncontrollable diode bridge rectifier (DBR), which leads to a low grid-side power factor (PF) and high current total harmonic distortion (THD). In this paper, an alternative solution for the grid-connected high-speed SRM drive system with improved PF is proposed. In the proposed drive system, the three-level active front end (AFE) is connected in cascade with the midpoint converter for SRM operation. A centralized strategy, which controls the AFE and SRM together, is proposed to govern the motor speed and grid-side PF by regulating the real power and reactive power of the system, respectively. Specifically, the real power, reactive power, and the voltage balancing of split capacitors are controlled by the model predictive directed power control (MP-DPC) algorithm, which significantly reduces the control complexity and guarantees the fast dynamic response. Consequently, satisfying speed regulation, high PF, low current THD, and bi-directional power-transfer capability are achieved. An idea-proofed testbench is constructed in laboratory, and the applicability of the proposed drive system is verified by a series of experimental results. [ABSTRACT FROM AUTHOR]

With increasing penetration of solar PV, some distribution feeders are experiencing highly variable net-load flows and even reverse flows. To optimize distribution systems under such conditions, the scheduling of mechanical devices, such as OLTCs and capacitor banks, needs to take into account forecasted solar PV and actual grid conditions. However, these legacy switching assets are operated on a daily or hourly timescale, due to the wear and tear associated with mechanical switching, which makes them unsuitable for real-time control. Therefore, there is a natural timescale-separation between these slower mechanical assets and the responsive nature of inverter-based resources. In this paper, we present a network admissible convex formulation for holistically scheduling controllable grid assets to position voltage optimally against solar PV. An optimal hourly schedule is presented that utilizes mechanical resources to position the predicted voltages close to nominal values, while minimizing the use of inverter-based resources (i.e., DERs), making them available for control at a faster time-scale (after the uncertainty reveals itself). A convex, inner approximation of the OPF problem is adapted to a mixed-integer linear program that minimizes voltage deviations from nominal (i.e., maximizes voltage margins). The resulting OPF solution respects all the network constraints and is, hence, robust against modeling simplifications.Simulation based analysis on IEEE distribution feeders validates the approach. [ABSTRACT FROM AUTHOR]

Isolated, zero-voltage-switching dc–dc converter topologies represent attractive solutions in the continuous run toward higher switching frequencies, allowing more compact power supplies. Among them, the asymmetrical half-bridge flyback converter represents an interesting option, featuring simple duty-cycle control at constant switching frequency, as opposed to the popular LLC converter. The majority of papers dealing with this topology consider an approximated voltage gain similar to that of an isolated buck converter operating in continuous conduction mode, i.e., proportional to the duty cycle and, practically, load independent. On the contrary, the true voltage gain is nonmonotonic at high duty-cycle values. Anytime the converter is designed for a resonant operation, as is advisable to eliminate any reverse recovery problem of the rectifier diode, the voltage gain not only increases, but also becomes a function of the switching frequency. This article investigates the converter's voltage gain in detail, deriving a theoretical framework capable of capturing its real behavior and dependencies. The proposed analytical model has been verified through simulations as well as experimental measurements taken on a 160-W prototype working at 400 kHz. [ABSTRACT FROM AUTHOR]