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This paper proposes a resonant switching cell model to analyze and design the single-ended resonant dc–dc converters. The single-ended zero-voltage switching (ZVS) converters such as the Class E converter are efficient for megahertz switching because they feature low turn-on and turn-off switching losses. Also, they use only a ground-referenced switch, allowing a simple gate drive circuit. In this paper, we investigate the single-ended resonant converter with the small input inductance, whereas the conventional Class E converter has a large input inductance. The main contribution of this paper is to propose the resonant switching cell as an analytic model that simplifies the analysis and the design of the resonant dc–dc converters. Furthermore, this paper presents the design method of the resonant switching cell model for minimizing the resonant current magnitude and conduction loss while the converter maintains ZVS property. The experimental results from a 10-MHz GaN-based prototype demonstrate the feasibility and effectiveness of the analysis and design based on the proposed resonant switching cell model. [ABSTRACT FROM AUTHOR]

Soft magnetic powder cores with their high saturation flux density and low core loss are excellent alternatives for filter inductors in inverter-based applications. However, their nonlinear current-dependent inductance characteristics pose a challenge for control of grid-connected inverter with LCL filter. In this paper, the variable inductance conundrum is discussed and a modified direct digital control method based on a variable-structure inductance estimation model that takes into consideration wide nonlinear variation in both inverter- and grid-side inductances is proposed. The proposed method is shown to have better grid-voltage harmonic rejection and improved stability margins. However, investigation of stability which is conventionally based on nominal values of filter inductors cannot predict instabilities over the entire range of inductance variation. Hence, a parametric approach to conventional stability methods with a parameter space defined by variation in actual and estimated inductance is explored in this paper. The effect of line impedance on stability is also investigated with impedance-based stability criterion by considering line inductance as an additional dimension in the parameter space. A pattern in stability margins is observed due to inductance variation, with inductance at its minimum being most vulnerable to instability. Experimental results measured from a 5 kW single-phase grid-connected inverter with various LCL filters have verified the feasibility of the proposed control method. The experimental results also match the analytical results with reasonable accuracy. [ABSTRACT FROM AUTHOR]

Gallium-nitride-field-effect transistors (GaN-FETs) are promising switching devices with fast switching capability. However, they commonly have low gate threshold voltage, suffering from susceptibility to the false triggering. Particularly, the oscillatory false triggering, i.e., a self-sustaining repetitive false triggering, can occur after a fast switching, which is a severe obstacle for industrial applications. The purpose of this paper is to elucidate the design instruction for preventing this phenomenon. The oscillatory false triggering is known to be caused by the parasitic oscillator circuit formed of a GaN-FET, its parasitic capacitance and the parasitic inductance of the wiring. This paper analyzed the nonoscillatory condition of this oscillator. The result revealed an appropriate ratio between the gate-drain capacitance and the common-source inductance is a key to prevent the oscillatory false triggering. Experiment successfully verified this analysis result, supporting the effectiveness of the appropriate design of this ratio for preventing the oscillatory false triggering. [ABSTRACT FROM AUTHOR]

Recent progress of widebandgap semiconductor switching devices enabled extremely high-frequency operation of power converters owing to their ultrafast switching capability. Fast switching may cause large switching noise at the common source inductance, which may increase the switching loss and lead to false triggering. Therefore, measurement of the common source inductance is often intensely required in practical design of fast switching power converters. However, measurement of the common source inductance is difficult, because 1) the wiring path hidden beneath the molded package significantly contributes to this inductance, 2) the mutual inductance between the gating circuit and the power circuit also contributes to this inductance, and 3) this inductance cannot be defined as the stray inductance of a loop wiring path. These difficulties are addressed in this paper by proposing a novel measurement method of the common source inductance. The proposed method is applicable to already-mounted power circuits. In addition, the proposed method offers a straightforward measurement procedure with common instruments, such as a signal generator, an oscilloscope, and voltage and current probes. Along with the measurement principle, this paper also presents an experiment to evaluate the proposed method. [ABSTRACT FROM PUBLISHER]

For photovoltaic applications, the flyback microinverter with pseudo-dc-link is popular as a simple topology but brings large transformer turns ratio and thus large leakage inductance, which would deteriorate the converter efficiency. To solve this issue, based on the nonisolated pseudo-dc-link structure, this paper proposed a hybrid boost–flyback/flyback (BF/F) microinverter. This new topology is operated at the BF mode for the most segment of a half grid cycle and the F mode for the rest. During the BF mode, high voltage gain with low voltage stress is easily available in minimized transformer turns ratio. Besides, the leakage energy is recycled and the turn-off voltage spike of the main switch is clamped, as a result of a passive snubber inherently contained in this mode. Given that the BF mode is lack of step-down function, the F mode is developed to regulate the output voltage even for values lower than the input voltage. The operation and characteristic of the hybrid BF/F microinverter in boundary conduction mode are analyzed in detail, and the mathematical expression of reference current is derived theoretically to guarantee high power quality. Finally, a 240 W prototype was implemented to validate the theoretical analysis and the benefits of the proposed topology. [ABSTRACT FROM AUTHOR]

The discontinuous conduction mode boost power factor correction converter features zero-current turn-on for the switch, no reverse recovery in diode, and constant frequency operation. With traditional constant duty ratio control, the power transfer in each switching cycle exhibits great difference during a half-line cycle. Consequently, the peak and root mean square values of the inductor current are large, the same goes for the switch and diode. This increases not only the current stress of the power components but also the conduction and switching turn-off loss, and lowers the efficiency of the converter. Introducing third and fifth harmonics into the input current and varying the duty cycle correspondingly can reduce the aforementioned power transfer difference, and provide huge space for the increment of boundary inductance as well. An optimum boundary inductance control concerning limited power factor (PF) is proposed in this paper. For the maximum boundary inductance of the converter within wide input voltage range, the optimum harmonics amounts are analyzed and figured out. The proposed method brings about efficiency improvement, output voltage ripple reduction, and PF increase as well, especially at high input voltages. A prototype has been built and the experimental results are presented to show the validity of the scheme. [ABSTRACT FROM AUTHOR]

The inductance is an important parameter impacting current ripple calculation, usually with the assumption that the designed inductance performs ideally in most of voltage source inverters (VSIs) applications. However, the initial permeability of magnetic material usually descends when the winding current reaches or goes beyond the saturation limit. In such region of saturation, the implemented inductor does not perform as expected in design stages and its value varies with the bias current. In this paper, analysis and calculation of the current ripple are presented for a three-phase VSI with powder cores-based inductors, which reveals the calculation error of current ripple caused by the soft saturation nature of powder cores. Based on the equivalent single-phase model, the influence of inductance saturation on current ripple can be quantitatively evaluated. Then, a comparison of the current ripple calculation between considering and ignoring inductance saturation of implemented inductors is drawn in detail. Furthermore, under the condition of inductance saturation, the output current ripple peak-to-peak value of three phases is used as the constraint for variable switching frequency pulsewidth modulation (VSFPWM) design. A comprehensive method is developed to compensate the effect of inductance saturation in VSFPWM. At last, the effectiveness of the proposed strategy is verified by the detailed simulation and experiment. [ABSTRACT FROM AUTHOR]

This paper presents a multi-period frame transient switching control (MP-TSC) scheme for buck converter with a controlled coupled inductor, aiming at improving the load transient response. The proposed buck converter utilizes a controlled coupled inductor as the output inductor. During a load transient, the coupled inductor is controlled as a small equivalent inductance so as to achieve fast transient regulation. While in the steady state, the coupled inductor behaves as a large inductance to reduce the output current ripple. Furthermore, on the basis of the proposed variable inductance circuit, an MP-TSC control scheme is proposed and implemented in a digital form. With the proposed control scheme, the load transient event is divided into n + 1 sub-periods, and in each sub-period, the capacitor-charge balance principle is used to determine the switching time sequence. Moreover, the control principle design and transient response index analysis are provided. Furthermore, its feasibility is validated in simulation and experiment with a 12–3.3V low-voltage high-current synchronous buck converter. Experimental results demonstrate that the voltage deviation of the proposed MP-TSC scheme (coupled coefficient of the controlled coupled inductor is 0.52) has improved by more than 79% compared to that with the auxiliary circuit disabled. [ABSTRACT FROM AUTHOR]

In this paper, a compact, low-loss, dual-path phase-switched inductor suitable for millimeter-wave (mmWave) transceiver subblocks is proposed. The signal path through the structure is determined by the relative polarity of two differential excitation signals applied to the four-port structure. Because inductance is varied by altering signal path through the inductor, signal-path MOSFET switches are avoided. The inductor, therefore, demonstrates high, mode-invariant quality factor, facilitating the design of high-performance dual-band mmWave transceiver subblocks. Based on the proposed inductor, a dual-band Ka-band oscillator is designed in a 65-nm CMOS technology which covers two frequency bands from 14.8 to 18.7 GHz and from 20.8 to 26.6 GHz. The proposed inductor facilitates a widely tunable, dual-band frequency range while maintaining the state-of-the-art phase noise, power consumption, and figure of merit (FoM). The oscillator achieves measured fractional tuning ranges of 23.3% and 24.5% and phase noise of −115.1 dBc/Hz at 2-MHz offset while consuming only 4.8-mW dc power. A peak tuning-range FoM of −195.1 and −194.9 dBc/Hz is demonstrated across the low- and high-frequency bands. [ABSTRACT FROM AUTHOR]

This paper proposes a topology combination scheme to achieve wide-range operation for LLC resonant converters. Instead of directly adding an auxiliary current injection circuit for each individual LLC converter, the proposed scheme combines two LLC converters through coupled resonance. Then, one LLC circuit can be utilized to adjust the equivalent resonant parameters of the other LLC circuit. By only controlling the phase delay between the mosfet bridges, output voltage regulation is properly maintained without changing the switching frequency. Since the total power rating does not change and each converter can share the load, it does not have any extra cost of power components. The advantages of this design include higher power efficiency, smaller size, and optimized utilization of each converter at different load, since both converters can fulfill isolated power conversion with independent control. Also, by taking the benefit of suppressed frequency variation, a smaller leakage inductance and a lower ratio between the leakage inductance and the magnetizing inductance are allowed, so that the coupling of transformer windings and transformer efficiency just improve. In addition to detailed theoretical analysis, experimental results verify the feasibility and effectiveness of the proposed concept. [ABSTRACT FROM AUTHOR]

Middle-point inductance ${{\boldsymbol L}_{{\boldsymbol {\text{middle}}}}}$ can be introduced in multiple-chip power module package designs. In this paper, the effect of middle-point inductance on switching transients is analyzed first using a frequency-domain analysis. Then a dedicated multiple-chip power module is fabricated with the capability of varying ${{\boldsymbol L}_{{\boldsymbol {\text{middle}}}}}$ , and extensive switching tests are conducted to evaluate the middle-point inductance's impact. Experiment result shows that the active mosfet's turn-on loss decreases at higher values of ${{\boldsymbol L}_{{\boldsymbol {\text{middle}}}}}$ , while its turn-off loss increases. Detailed analysis of this loss variation is presented. In addition to the switching loss variation, it is also observed that different peak voltage stresses are imposed on the active switch and antiparallel diode during the switching transients. Specifically, in the case of lower mosfet's turn-off, the maximum voltage of the lower mosfet increases as ${{\boldsymbol L}_{{\boldsymbol {\text{middle}}}}}$ goes up; however, the peak voltage of the antiparallel diode decreases significantly. The induced voltage spikes during upper mosfet turn-on process is also evaluated, and an opposite trend is observed experimentally. Analysis of the voltage overshoot variation is discussed. Based on the experimental evaluation and analysis, a multiple-chip power module package design guideline is summarized considering the middle-point inductance's effect. [ABSTRACT FROM AUTHOR]

The widespread use of electronic devices increases the need for compact power factor corrected power supplies. This paper describes an isolated power factor corrected power supply that utilizes the leakage inductance of the isolation transformer to provide boost inductor functionality. The bulk capacitor is in the isolated part of the power supply allowing for controlled startup without dedicated surge limiting components. A control method based on switch timing and input/output voltage measurements is developed to jointly achieve voltage regulation and input power factor control. A prototype design is implemented with detailed measurements and waveforms shown to confirm the desired functionality. [ABSTRACT FROM AUTHOR]

This paper presents a high-efficiency inverter with the aid of the soft-switching technology, which is accomplished by the resonance of the in-series inductance with the snubber capacitance. The equivalent circuit of the quarter-phase ultrasonic motor is initially deduced, based on which the topology along with the operations of the novel inverter is subsequently presented. The configuration of the new quarter-phase inverter shows its uniqueness in terms of the shared arms and the especially designed snubber capacitance in comparison with the existing inverters. The circuit analysis infers that the dead time of the inverter is the key factor to arrive at the zero-voltage-switching or the zero-current-switching operations. Experimental measurements have demonstrated that the efficiency of the whole drive increases by a factor of 1.25 after replacing the traditional inverter with the proposed one. It should also be noted that the proposed inverter in association with the design method of the dead time not only can work for the quarter-phase ultrasonic motor, but also can be applicable for other kinds of quarter-phase devices. The soft-switching operations are achieved in the quarter-phase inverter for the first time, whose amplitudes of the output voltage and switching frequency are not required to be constant any more. [ABSTRACT FROM AUTHOR]

Impedance-source inverters using coupled inductors have been investigated as alternatives for providing high step-up voltages. However, leakage inductances of the coupled inductors have commonly led to lower overall effectiveness, in addition to generating high dc-link voltage spikes. The latter raises voltage stresses of switches, which in turn, may reduce the power levels of the inverters. A high step-up Y-source inverter has therefore been proposed in this paper to provide a high boost with a smooth dc-link voltage ensured by proper recycling of the leakage energy. These features have been verified by comparing simulation and experimental results of an existing Y-source and the proposed inverters. Factors compared are their respective boost ratios, voltage stresses, current stresses, and dc-link voltage spikes. [ABSTRACT FROM AUTHOR]

Hybrid dc switches have become increasingly prominent due to their low ON-state energy loss and less arc erosion in comparison with conventional semiconductor and mechanical switches. Zero-voltage switching (ZVS) is a common method for realizing a hybrid dc switch. However, a certain amount of contact voltage rather than zero voltage is necessary for commutating the current into the semiconductor devices from the mechanical contacts, which may cause arc generation if the contact voltage exceeds the boiling voltage of the contact material. It has been found that current commutation can be accomplished without arc generation if the current is below a threshold value. It is important to determine and improve the threshold current of arc-less current commutation for suppressing arcing even under the condition of a high current load. In this paper, the effect of some parameters, including the contact diameter (10, 15, and 20 mm), separation speed (0.05–0.3 m/s), and cable inductance in the current commutation path (0.1 and $0.25~\mu \text{H}$) on the threshold current of the arc-less commutation, is investigated by using copper contacts. The results show that a larger contact diameter, slow separation speed, and small commutation cable inductance are good for the improvement of the threshold current of the arc-less commutation. A 200-A current commutation is realized without arc generation, particularly by applying a 20-mm-diameter contact, 0.05-m/s separation speed, and 0.1- $\mu \text{H}$ commutation cable inductance. [ABSTRACT FROM AUTHOR]

Multileg Class-D amplifiers (CDAs) with phase-shifted carrier modulation can increase the equivalent switching frequency and reduce the output current ripples, which further reduces the size of the output filter. However, these benefits are degraded by the tolerances in the phase inductance values. The phase inductance mismatches impact the ripple cancelation effects (the harmonic contents at switching frequency and its harmonics appearing in the output current ripple). Therefore, the quality of the output waveform can further be impacted. Current research works dealing with this issue mainly focused on the interleaved dc–dc converters, which does not cover the analysis in multileg CDAs or inverters, especially for the full-bridge configuration. This paper proposes a general analytical method to characterize the steady-state phase and the total current ripple in the multileg CDAs with full-bridge configuration under inductance mismatches. Monte Carlo simulation is used to study the impact of inductance mismatches on the harmonic contents of the total current ripple, and the distribution law of the inductances at the worst case is revealed. The analytical method is verified by simulation and experimental results of a four-leg full-bridge CDA. A design guideline is given to optimize the filter design based on the analytical method. [ABSTRACT FROM AUTHOR]

DC-link current ripple is one of the important factors for operating the current-source converter. In practice, the dc-link current ripple can be reduced by increasing the switching frequency or inductance. However, it may result in the higher switching losses, larger size, or higher cost. In order to deal with this problem, the inherent limitation of the conventional solution is discussed in this paper. The time-domain equation of the dc-link current is established for the first time. And then, a new space vector control strategy is proposed to reduce the ripple with no need of increasing the switching frequency or inductance. The space vector is divided into 12 sectors, where the dc-link current ripple can be effectively reduced by the optimal vector sequence. Finally, the proposed method is implemented on the TMS320F28335DSP + XC3400FPGA digital control hardware platform. The experimental results verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

This paper is aimed at finding the effect of varying inductive energy storage systems’ (IESSs) inductance on resistance of an electrically exploded conductor-based opening switch and profile of current transferred into load, which has not yet been fully understood. Based on experimental results obtained, it is observed that when the inductance of IESS is varied, the magnitude of load current changes so as to conform to the magnetic flux conservation law but its rise time remains unchanged. Resistance of the opening switch and energy deposited in it has been estimated using recorded voltage and current waveforms. It has been found that with increasing inductance of IESS, the resistance of switch increases, whereas energy deposited in it decreases. Using these estimated values of energy, a possible explanation of observed behavior in resistance is presented. Effect of a mismatch between the inductance of IESS and load is seen to only affect the energy transfer efficiency or magnitude of load current but not its rise time emphasizing the novel finding that for a given load, the rise time of load current is independent of the inductance of IESS. [ABSTRACT FROM AUTHOR]

This paper presents the design, fabrication, and characterization of a module-level spring-interconnected stack power module for power semiconductor devices. The benefit of multilayer design capability offered by a low-temperature cofired ceramic (LTCC) substrate is used for this module-level power module structure. A half-bridge configuration is demonstrated using two standalone wire-bondless power modules with parallel power semiconductor devices stacked on top of each other. An interconnection scheme consisting of conductive copper clamps and a spring-loaded LTCC interposer is adopted to form a module-level 3-D package structure. The low loop and stray parasitic inductances for the 3-D stack are achieved using an antiparallel current path configuration along with the wire-bondless approach and a low-profile spring interposer. For demonstration, silicon insulated-gate bipolar transistors and silicon carbide (SiC) Schottky barrier diodes are used to fabricate the hybrid 3-D stack. Static and transient electrical characteristics of the 3-D stack power module are evaluated through simulation and experimental measurements and compared with a wire-bonded half-bridge power module to investigate the performance improvement in switching characteristics of the 3-D module. High-voltage isolation test, leakage current test, and thermal cycling are performed to validate the spring-interconnected module-level 3-D stack structure. [ABSTRACT FROM AUTHOR]

A major advantage of the dual active bridge (DAB) dc–dc converter is its ability to operate under zero voltage switching (ZVS) conditions to reduce switching losses. However, when the ac link coupling transformer is conventionally designed to minimize its magnetizing current, nonideal switching conditions almost invariably lead to hard switching operation at particular power transfer levels and dc–dc voltage ratios. This paper presents a mathematically based design approach for a coupling transformer with a reduced magnetizing inductance that creates just sufficient ac link circulating current to maintain continuous ZVS operation over the converter's entire specified operating range without incurring significant additional losses. The required magnetizing inductance reduction is found to be a function of the inherent transformer leakage inductances, switching dead-time, and device parasitic capacitances. The analysis approach is validated by matching experimental results. [ABSTRACT FROM AUTHOR]

This paper presents the operation principle and benefits of a novel power converter topology named three-level two-stage decoupled active neutral point clamped (3L-TDANPC) converter, which is implemented based on a hybrid utilization of silicon (Si) insulated gate bipolar transistors (IGBTs) and silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (mosfets). The 3L-TDANPC converter can achieve high efficiency with limited number of SiC mosfet modules while keeping balanced loss distribution among the switching devices, which helps increase the converter power ratings. In addition, in this 3L-TDANPC converter, the SiC mosfet has a potential to ride through short-circuit fault because of the presence of Si IGBTs. The key challenges that are associated with system resonant current are investigated and the methods to damp such resonant current are proposed and explained in detail. The simulation and experimental results based on a 1-MW 3L-TDANPC converter prototype confirm the expected benefits of this proposed converter and the effectiveness of the proposed resonant current damping methods. [ABSTRACT FROM AUTHOR]

This paper presents an improved analytical model for estimating the high-frequency current ripple of interior permanent magnet synchronous machines due to pulsewidth modulation (PWM) switching. The proposed model accounts for the impact of slotting effect, magnetic saturation, and cross-coupling between the $d$ - and $q$ -axis. The model is subsequently used to investigate several factors that influence the PWM-induced current ripple. These include the PWM switching frequency, fundamental frequency (i.e., machine speed), dc-bus voltage, current control angle (i.e., γ angle), and the excitation current amplitude (i.e., saturation level). Experiments have been conducted to verify the analytical prediction results. These results show that the analytical model can predict the PWM-induced current ripple waveshape very well for many operating conditions and accurately estimate its rms value over a complete fundamental period. [ABSTRACT FROM AUTHOR]

The powder-core-based inductor has a wide inductance variation due to the soft-saturation nature when subjected to varying load current. Under such a condition, the current ripple is influenced, and the conventional inductor design principle may be inaccurate. Besides, the voltage of the inductor is distorted. Also, the bandwidth of the controller is hard to determine. In this paper, the current ripple under the condition of wide inductance variation is analyzed, and its change rule is revealed; then, a new inductance design principle is proposed. The harmonic components for the three-phase converter with the powder core inductor are investigated, and the harmonic characteristic of the input current is analyzed. According to the current harmonic characteristic, the resonance controllers are introduced to eliminate harmonics, and the quality of the current is improved. Besides, the bandwidth of the controller is found to vary with the output power. Then, a compensation method is proposed to eliminate the influence of inductance variation on the bandwidth. The experimental results verify the analysis. [ABSTRACT FROM AUTHOR]

This paper proposes a novel circulating-current control strategy applied in back-to-back parallel three-phase converters with individual dc links for permanent magnet synchronous motor (PMSM) drives. First, the zero-sequence circulating current and the cross current paths in the whole parallel system are analyzed. Then, the models of an n-paralleled subsystem with individual dc links in both the three-phase stationary coordinates and the synchronous rotating coordinates are built up, which explores the fundamental mechanism of circulating current. Based on the analysis, a novel control strategy can suppress the circulating current at the motor side. The control system consists of two main loops in the d-axis, q-axis, and zero-axis, which are defined in this paper as sum control and difference control. The proposed control strategy effectively suppresses the circulating current in both steady-state and transient operations. The zero-sequence circulating current is greatly reduced by the difference control on the zero-axis. In addition, the bandwidth of the controllers is greatly improved, especially when the current-sharing inductance is much smaller than the stator inductance. Finally, with a PMSM load, the simulation and experiment results are presented to verify the theoretical analysis and proposed control strategy. [ABSTRACT FROM PUBLISHER]

A magnetic pulse compressor (MPC) transfers energy via $C$ – $L$ – $C$ resonance. The pulse width of the MPC is determined by the saturation inductance of the magnetic switch (MS). When using the MS, the pulse width is limited due to the stray elements. To increase the pulse compression rate, the number of stray elements must be reduced. In this paper, we propose an optimum design for an MS having the lowest impedance of stray elements, along with its analysis and experimental verification. The proposed model is designed to have a reduced magnetic path length while retaining the same saturation inductances as that of a common MS; this is accomplished by using the relationship between the magnetic field path length and the number of inductor turns. The experimental results show that the proposed MS decreases the full width at half maximum by 18% and increases the rise rate by 69%. This result demonstrates that the proposed MS increases the pulse compression rate of the MPC by reducing impedance of stray elements in the system. [ABSTRACT FROM AUTHOR]

1200 V SiC mosfet is a suitable replacement for Si insulated gate bipolar transistors due to its improved switching behavior. However, high $di/dt$ and $dv/dt$ of SiC mosfet cause very high voltage overshoot and oscillations due to the presence of parasitic inductance in the converter layout and parasitic capacitance of the load. These undesired switching responses increase switching loss and give rise to electromagnetic interference related issues. Therefore, it is important to minimize these adverse effects in order to extract maximum benefits from SiC mosfet. This paper proposes an active gate driving technique for SiC mosfet to improve its overall switching performance in the presence of a moderately higher amount of parasitic inductance in the converter layout. It is achieved by controlling the device $di/dt$ and $dv/dt$ independently in four stages, with appropriate values of gate resistances for both turn- on and turn-off switching transient. The developed active gate driver is tested in a double-pulse test bed and a two-level voltage source inverter driving an induction motor load. [ABSTRACT FROM AUTHOR]

In this paper, an ultralow inductance power cell is designed for a three-level active neutral point clamped (3L-ANPC) based on 650-V gallium nitride (GaN) high electron mobility transistor (HEMT) devices. The 3L-ANPC topology with GaN HEMT devices and the selected modulation scheme suitable for wide-bandgap devices are presented. The commutation loops, which mainly contribute to voltage overshoots and increase of switching losses, are discussed. The ultralow inductance power cell design based on a four-layer printed circuit board with the aim to maximize the switching performance of GaN HEMTs is explained. The design of gate drivers for the GaN HEMT devices is presented. Parasitic inductance and resistance of the proposed design are extracted with finite-element analysis and is discussed. Common-mode behaviors based on the simulation program with integrated circuit emphasis (SPICE) model of the converter are analyzed. Experimental results on the designed 3L-ANPC with output power of up to 1 kW are presented, which verifies the performance of the proposed design in terms of ultralow inductance. [ABSTRACT FROM AUTHOR]

This paper discusses the operation of a single-stage, isolated, high-frequency ac-link-based single-phase dc–ac converter, suitable for photovoltaic microinverter applications, controlled using phase modulation of the secondary-side cycloconverter devices. A detailed analysis is presented explaining the impact of prominent circuit nonidealities such as device capacitance and transformer leakage inductance on circuit behavior. The proposed extended-dead-time based modulation scheme helps in achieving zero-voltage-switching of the primary devices over the entire line cycle of the ac output and also offers the benefit of reduced transformer rms current due to absence of circulating current in the zero state. A flyback-based regenerative clamp circuit is used for mitigating voltage spikes on the secondary devices arising due to leakage inductance induced oscillations. A generic commutation strategy is also discussed, which makes operation with nonunity power factor loads also possible. Experimental results on a 260-W laboratory prototype under different load conditions are presented to illustrate the discussed principles and highlight the performance improvements. [ABSTRACT FROM PUBLISHER]

This paper analyzes the problem of instability in enhancement-mode gallium nitride (GaN) transistors based half-bridge circuits. The instability may cause sustained oscillation, resulting in overvoltage, excessive electromagnetic interference (EMI), and even device breakdown. GaN devices operate in the saturation region when they conduct reversely during the dead time. Under the influence of parasitic parameters, the GaN-based half-bridge circuit exhibits positive feedback under certain conditions, thus, resulting in sustained oscillation. A small-signal model is proposed to study this positive feedback phenomenon. Like the second-order under-damped system, damping ratio is defined to determine the system's stability. Based on the model, the influence of circuit parameters on instability is investigated and guidelines to suppress the oscillation are given. Reducing the common-source inductance, increasing the gate resistance of the inactive switch or connecting a diode in parallel to the inactive switch are some effective ways to suppress the oscillation. Finally, the analyses are verified by both simulation and experiment. [ABSTRACT FROM AUTHOR]

Quasi-square wave mode with zero voltage switching (QSW-ZVS) is an operation mode in which the switching losses can be minimized. However, a large inductance current ripple is needed in this mode, which limits the maximum attainable power of the topology. A possible way to increase the power managed by a QSW-ZVS mode converter is to use a modular converter. An input parallel output parallel (IPOP) arrangement, in which the current can be shared among the modules, can increase the total power proportionally to the number of modules. This paper addresses two main proposals. The first one is a master–slave technique to extend the QSW-ZVS mode to an IPOP modular converter, achieving an interleaved solution which minimizes the total input current ripple and assures the current balance among the modules. The second one is a comparison of four different control techniques applied to the IPOP modular converter to improve the overall efficiency at light to medium load: balanced master–slave technique, master–slave with phase-shedding, asymmetrical master–slave, and burst mode (or hysteretic control). These four strategies are theoretically analyzed, experimentally validated and compared using a 150–400 V 2 kW modular IPOP prototype made up of four synchronous boost converter operating in QSW-ZVS mode. [ABSTRACT FROM PUBLISHER]

High di/dt and dv/dt of SiC MOSFET cause a considerable amount of overshoot in device voltage and current during switching transients in the presence of inverter layout parasitic inductance and load parasitic capacitance. The excessive overshoots in device voltage and current cause failure of the device. Moreover, these uncontrolled overshoots increase the switching loss in the inverter. It is difficult to reduce parasitic inductance beyond a certain point. This paper proposes an active gate driving technique, which allows inverter to operate with moderate amount of layout parasitic inductance and load parasitic capacitance. The proposed technique dramatically reduces switching loss of the SiC MOSFET with the help of existing parasitic elements. The proposed switching loss reduction technique is termed as quasi zero switching. The developed active gate driver has been tested in a double pulse test setup and a 10 kW two-level voltage source inverter driving an induction motor. [ABSTRACT FROM PUBLISHER]

Impedance networks have been already investigated in various literature with the main goals of increasing the attainable voltage gain and reducing the components number. Recently, coupled inductors found popularity because they let converters with lower weight and cost. It seems that coupled inductances are a proper answer to the increasing voltage gain while keeping down the components number. This paper proposes a novel impedance network circuit based on three coupled inductors with a Δ connection. The proposed Δ-source converter offers smaller magnetizing current and winding losses compared to the successful Y-source circuit. Moreover, with the Δ-connected three coupled inductors, the adverse effect of leakage inductance on the converter performance is significantly reduced. The effectiveness of the proposed structure is analytically proved. The theoretical achievements over the conventional Y-source structure are confirmed through extensive simulations and experiments. [ABSTRACT FROM PUBLISHER]

A new soft-switching dc/dc converter, which can solve the drawbacks of existing phase-shifted full-bridge converters such as narrow zero-voltage-switching (ZVS) range, large circulating current, large duty-cycle loss, and a large output filter in high-voltage applications, is proposed in this paper. The proposed converter is composed of two symmetric half-bridge inverters that are placed in parallel on the primary side and are driven in a phase-shifting manner to regulate the output voltage. At the rectifier stage, two full-bridge rectifiers sharing two low-current-rating diodes are employed. This structure allows the proposed converter to have the advantages of a full ZVS range, no problems related to duty-cycle loss, no circulating current, and a significantly reduced output filter. In this paper, the circuit configuration, operation principle, and relevant analysis results of the proposed converters are presented. Experimental results on a prototype converter realized with the specification of 80-in plasma display panel sustain power module (320-385 Vdc input, 205 Vdc/5 A output) validate the theoretical analysis. [ABSTRACT FROM AUTHOR]

Interleaving is a technique that is commonly used due to its inherent reduction of current ripple and filter capacitance size. However, optimal interleaving is only achieved when the switching cells are identical. Variations of the filter inductance, which are caused by the manufacturing process or magnetic material properties, may lead to the total current ripple of all phases significantly larger than that of the ideal case in steady state, and slow down the energy transfer speed during the transient response. Consequently, in order to meet the voltage ripple and dynamic response requirements of multiphase converters, the calculation of the output capacitor under inductance mismatches has to be reconsidered, which has been rarely mentioned previously. This paper proposes a method to estimate the effect of inductance mismatches on output capacitance selection from two aspects including steady state and transient state. The proposed methodology enables mathematical expressions that allow us to calculate the maximum value of the capacitor considering nonidealities. Monte Carlo simulation is also used during the analysis by varying all of the inductors’ values with respect to tolerance and distribution type to identify the worst case values in real applications, according to this approach, the principle of when the worst condition happens is summarized. Simulated and experimental results of a four-phase buck converter are presented in this study. Good agreement between the estimates and the measured values is demonstrated. [ABSTRACT FROM AUTHOR]

This paper presents a soft-switching dual-flyback dc–dc converter with improved efficiency and reduced output ripple current. Zero-voltage-switching (ZVS) technique and a dual-flyback module for reducing the number of snubber current paths are adopted to improve efficiency. For the ZVS technique, a self-driven synchronous rectifier (SR) is used instead of an output diode. By turning the self-driven SR off after a short delay, a main switch is turned on under the ZVS condition. For reducing the number of snubber current paths, a dual-flyback module and a snubber diode are used. When the main switch is turned off, leakage inductance energy is absorbed by a snubber diode into an input source and a primary dc-bus capacitor. Then, this energy is reprocessed by the dual-flyback dc-dc module to secondary side. Hence, there is only one snubber current path. In addition, the proposed converter features a reduced output ripple current because of the continuous current. Consequently, the proposed converter can achieve high efficiency and reduced output ripple current. To verify the performance of the proposed converter, operating principles, steady-state analyses, and experimental results from a 340 to 24-V, 100-W prototype are presented. [ABSTRACT FROM AUTHOR]

Dual active bridge (DAB) converters offer an unmatched capability to transfer energy in either direction between two dc sources, while also providing galvanic isolation and high conversion efficiency. However, to operate at higher efficiencies, the bridges must operate with zero voltage switching (ZVS) over as wide an operating range as possible. The conventional approach to determine ZVS operation uses time domain analysis with ideal ac coupling inductances, which only approximately identifies the ZVS boundaries. This paper proposes a new approach using harmonic decomposition of the bridge switching patterns, which gives an explicit theoretical solution under all operating conditions, while also accommodating more complex ac coupling structures, practical impedance nonidealities, and the switching impact of dead-time and device capacitance. The methodology is confirmed by matching analytical predictions with experimental results for selected DAB systems. [ABSTRACT FROM AUTHOR]

A nonlinear pulse width modulation-controlled single-phase boost mode photovoltaic grid-connected inverter with limited storage inductance current is proposed in this paper. The circuit topology, control strategy, steady-state principle characteristic, and design criterion for the key circuit parameters of this kind of inverter are investigated in depth, and important conclusions are obtained. The inverter's regenerating energy duty ratio 1–D which decreases with the decline of the grid-connected voltage is real time adapted by sampling and feeding back the inverting bridge modulation current, and the average value of the modulation current in each switching cycle tracks the reference sinusoidal signal to get high-quality grid-connected current. The active control of the energy storage inductance current and the balance of the voltage step-up ratio are realized by adding a bypass switch connected in parallel with the energy storage inductance and using two kinds of switching pattern namely boost pattern and freewheeling pattern. The theoretical analysis and experimental results of the 1 kVA 110 VDC/220 V50 Hz photovoltaic grid-connected inverter prototype show that it has the advantages such as single-stage boost conversion, high conversion efficiency, high quality of grid-connected current waveform, low value of energy storage inductance, simple control, etc. [ABSTRACT FROM AUTHOR]

This paper proposes a modulation method for a full-bridge three-level LLC resonant converter. The target converter is known to enable fixed frequency operation, small resonant inductance ratio, and zero-current switching operation of rectifier diodes under wide output-voltage variation. Therefore, it is suitable for an application such as in battery chargers. A new parameter named “master duty,” which determines each voltage-level duty, is introduced to this modulation method. It simplifies the modulation method; therefore, a modification of the modulation is easy. It also makes possible seamless handling of two-level, three-level, and mixed modes. The modulation method is represented by the relationship between the master duty and each gate-pulse edge position. This representation can clearly depict a complex modulation such as a combination of pulse-width and phase-shift modulations. The voltage gain of the converter is analyzed using the first-harmonic approximation technique. The result of the analysis is verified by the circuit simulation. The voltage gain is also analyzed using lossy components, which is verified by the experimental result. A 385-V input 225- to 378-V/6.6-kW output prototype converter is fabricated for this verification. It shows 98.14% peak efficiency, and its power density is 1036 W/L. [ABSTRACT FROM AUTHOR]

A quasi-resonant dc–dc converter with high voltage gain and low current stresses on switches is proposed in this paper. This converter preserved inherent advantages of current-fed structures, for instance, zero magnetizing dc offset, low input ripple, and low transformer turn ratio. Moreover, by employing the active-clamp circuit, the voltage spikes across the main switch, due to the existence of leakage inductance of the isolating transformer, is absorbed, and switches work in zero voltage switching. Since quasi-resonant switching strategy is employed, turn-off current (TOC) and losses of switches are considerably reduced. Because of zero current switching (ZCS), reverse recovery problem of diodes is alleviated. Experimental results on a 150-W prototype are provided to validate the proposed concept. [ABSTRACT FROM AUTHOR]

This paper discusses the modeling of a peaking switch to study the reduction in rise time for the subnanosecond duration pulses. The effect of the various shapes of input pulse, inductance, and interelectrode distance on the output voltage and wave shape is discussed in this paper. The modeling has been carried out using the electromagnetic and microwave modeling software of Computer Simulation Technology. [ABSTRACT FROM PUBLISHER]

Megavolt-class-triggered switches play a key role in large-induction voltage adder accelerators. This paper introduces a 2.8-MV, low-inductance, low-jitter, electrical-triggered, gas SF6 switch. The main section is a $V/n$ switch and the pretrigger section is a trigatron switch. Based on electric field simulation, experiment, and analysis, the structure and spacing of gaps, location of trigger disk, diaphragm, and switch inductance are all discussed. The primary test indicates that the switch can be operated in the range of 0.85–2.76 MV with the pressure of the SF6 changing from 0.1 to 0.9 MPa. The self-breakdown voltage is linearly related to the logarithm of the pressure, as the gap spacing and the voltage rise time are fixed. Three working modes were observed: self-breakdown, self-triggered, and ex-triggered. In the triggered modes, the switch jitter is <3 ns and the switch inductance is usually below 150 nH. [ABSTRACT FROM AUTHOR]

In this paper, a simple control method of the half-bridge (HB) LLC converter with one additional switch and capacitor in the primary side is proposed for wide-input-voltage applications with the hold-up time conditions. At nominal input, since the proposed method enables the HB LLC converter to operate with large transformer magnetizing inductance, it can reduce the conduction and switch turn-off losses in the primary side, which makes it highly efficient. On the other hand, during the hold-up time, since the proposed method increases the resonant capacitance by turning on one additional switch, the HB LLC converter can obtain high-voltage gain. To confirm the validity of the HB LLC converter with the proposed method, a 325–385 V input and 56 V/350 W output laboratory prototype is built and tested. [ABSTRACT FROM PUBLISHER]

In this paper, an integrated double buck–boost (IDBB) converter is proposed as a high-power-factor offline power supply for power-LED lamps. The IDBB converter features just one controlled switch and two inductors and is able to supply a solid-state lamp from the mains, providing high power factor and good efficiency. In this paper, the IDBB converter is analyzed, and a design methodology is proposed. It is demonstrated that, with a careful design of the converter, the filter capacitances can be made small enough so that film capacitors may be used. In this way, the converter mean time between failures can be made as high as that of the solid-state lamp. A design example for a 70-W converter supplied from a 230 V/50 Hz mains for street lighting applications is shown. Finally, experimental results from a laboratory prototype are also presented. [ABSTRACT FROM AUTHOR]

First, the limitations of the conventional interleaved boost converters in high-step-up and high-output-voltage applications are addressed in this paper. Then, a general derivation law of the nonisolated converters from their isolated counterparts is proposed and studied to give a universal solution for high-performance topology deduction. By employing the direct energy transfer concept, a family of nonisolated high-step-up interleaved boost converters is originated to make the turns ratio of a built-in transformer as another design freedom for the voltage gain extension. The derived converters have the advantages of large voltage conversion ratio, low power switch voltage stress, small input current ripple, and zero-voltage-switching soft-switching performance. The steady-state operation of the derived converter is analyzed, and the circuit performance is summarized to explore its advantages in the high-step-up, high-output-voltage, and large-current conversion systems. Finally, a 1-kW prototype with 40-V input and 380-V output voltages is implemented and tested to show the effectiveness of the derived converters. One of the main contributions of this paper is that a clear picture is made on the universal derivation law to generate high-step-up and high-performance dc/dc converters. [ABSTRACT FROM PUBLISHER]

This paper proposes improvements to the control method based on the complete dynamical model published by Kömürcügil and Kükrer, which is very simple by operation in the stationary reference frame and lacks ac-line-current sensors. Nevertheless, the basic control method is very sensitive to variations of the line inductances, which provide difficulties in many industry applications. The modifications proposed in this paper overcome this disadvantage using a fuzzy logic controller to tune parameters and do more robust the basic control in view of line inductance parameters variations. Unfortunately, the new tuning method needs information about the reactive line current; therefore, ac-line-current reconstruction algorithm based on the dc-link current measurement has been included to keep the same number of sensors as the basic solution. Simulation and experimental results have proved the correct system operation at wide variations of the line inductance. [ABSTRACT FROM PUBLISHER]

Switching power supplies are sources of noise for sensitive circuits. Converters should comply with electromagnetic compatibility (EMC) rules so that the electromagnetic interference (EMI) caused by switching cannot interfere with the normal operation of adjacent circuits and also the converter itself. The produced interference can be in the form of conduction or radiation. In this paper, some techniques are used in switching converters to suppress EMI with emphasis on the conduction form. EMI analysis and evaluation of a conventional flyback converter and a proposed zero-current transition (ZCT) flyback converter is achieved by simulation and experimental results. In addition to evaluating some EMI suppression techniques, the main objective of this paper is to improve EMI in the topology design stage. The operating modes of the improved ZCT flyback are discussed. In addition to the efficiency improvement, the amount of EMI reduction of this ZCT flyback and the effectiveness of some EMI reduction techniques are shown by practical implementation. [ABSTRACT FROM AUTHOR]

This paper presents design and implementation of a 5-kW single-phase bidirectional inverter with wide inductance variation. For dc-microgrid applications, the bidirectional inverter has to fulfill grid connection and rectification with power factor correction to regulate the dc bus to a certain range of voltages. In the inverter operation, inductor current can vary from 0 to 32 A in one line cycle. This will result in wide inductance variation, around seven times for an inductor constructed with a molybdenum permalloy powder core, and thus, high current ripple and fluctuation. In this paper, we take into account this variation while designing controller and selecting key components to ensure inverter normal operation. Additionally, to adopt a cost-effective microcontroller for the inverter, the sensitivities of the control to various parameters are investigated and presented in this paper. Experimental results measured from a 5-kW single-phase prototype have verified the feasibility of the designed inverter. [ABSTRACT FROM PUBLISHER]

A new zero-voltage-switched bidirectional dc–dc converter with coupled inductors is proposed in the paper. The proposed converter can operate with a steep conversion ratio, soft switching, a continuous inductor current, and fixed switching frequency. It can also operate with the switch stresses of a conventional pulsewidth-modulation-tapped/coupled-inductor converter regardless of the direction of power flow and without any voltage spikes across the switches during turn-OFF. These features are due to a very simple auxiliary circuit that is operational regardless of the direction of power flow and absorbs energy from the leakage inductance of the coupled inductors during switch turn-OFF. In the paper, the operation and design of the converter are discussed and its feasibility is confirmed with experimental results obtained from a prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a control method for efficiency improvement of the LLC resonant converter operating with a wide input-voltage and/or output-voltage range by means of topology morphing, i.e., changing of power converter's topology to that which is the most optimal for given input-voltage and/or output-voltage conditions. The proposed on-the-fly topology-morphing control maintains a tight regulation of the output during the topology transitions so that topology transitions are made without noticeable output-voltage transients. The performance of the proposed topology morphing method is verified experimentally on an 800-W LLC dc/dc converter prototype designed for a 100-V to 400-V input-voltage range. [ABSTRACT FROM PUBLISHER]

Power electronics solutions based on multiple converter configurations offer cost-effective solutions by integrating a number of components at input or output power stages. This paper proposes a new multiinput isolated three-level converter for renewable and sustainable energy systems adopting high dc link voltage. Multiple dc sources are integrated to the three-level dc/dc converter before the isolation stage, resulting in reduced part-count, determining dc link voltage level and allowing flexibility in transformer design. The proposed architecture eliminates two boost switches which are present in the two-stage counterpart. The input inductors are operated in discontinuous conduction mode; thus, power can be shared between input sources through proper selection of input inductors. A low voltage prototype has been designed to serve as a proof of concept. [ABSTRACT FROM PUBLISHER]