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This paper proposes a current sensorless control strategy for the dual active bridge (DAB) converter with nonlinear disturbance observer (NDO)-based load current feedforward. The proposed method can regulate both the dc-bus voltage and the current of the DAB converter without current sensors. Several performance indexes are established for the parameter design and a detailed design method is presented in this paper. When a single-phase H-bridge inverter is connected, the double-frequency oscillation from the feedback path is suppressed by proper parameter design, while the transient response of dc-bus voltage can be further improved by the NDO-based load current feedforward with a notch filter in the feedforward path. The performance of the proposed control method and the effectiveness of the parameter design are verified in a prototype by experimental results. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

This paper presents a novel model predictive control (MPC) for the T-type single-phase three-level inverters. The cumbersome procedure in tuning of weighting factors is eliminated so that the implementation of the proposed MPC becomes easy. The constant switching frequency is achieved during the control implementation in order to facilitate the filter design. In order to optimize the distribution of the output current harmonics, multiple voltage vectors are employed in each control cycle with their application times setting inversely proportion to the respective cost function. The redundant small voltage vectors are utilized to balance the neutral point voltage of the inverter by directly regulating the upper and lower dc-link capacitors voltages. Finally, the proposed MPC algorithm is experimentally evaluated and compared with other two unfixed switching frequency MPC algorithms in terms of the steady state, transient performance, and parameter sensitivity. [ABSTRACT FROM AUTHOR]

In this paper, a new multi-input multi-output (MIMO) dc–dc converter with high step-up capability is proposed for wide power ranges. Also, in order to increase each output voltage, diode–capacitor voltage multiplier (VM) stages are utilized in the proposed converter. The number of input stages, output stages, and VM stages are arbitrary and dependent on design conditions. At first, the general structure of proposed MIMO converter is presented. Then, in order to explain the converter operation, we walk through the design of a 1-kW four-input two-output example, including loss and efficiency calculations. We validate the design with a prototype that matches efficiency calculations. [ABSTRACT FROM AUTHOR]

When fast voltage control is used in a power factor control, the ripple of the dc link causes current harmonics. This paper proposes a method to reduce the harmonic content of a fast voltage loop in a power factor correction, which can both produce low distortion during steady-state operation and fast recovery from a load transient. The performance is achieved by using a Takagi–Sugeno-type nonlinear controller for dc-link voltage control. The proposed nonlinear control is compared with linear proportional–integral (PI) control, which is tuned to meet the standardized regulations for the harmonic content in a 3-kW single phase power supply. The results show that the presented nonlinear voltage controller can maintain the dynamic performance of the linear control with reduced current harmonics. It is also shown that the used nonlinear control method requires only marginally more complex control algorithm compared to commonly used linear PI control. [ABSTRACT FROM AUTHOR]

This paper presents a new reconfiguration module for asymmetrical multilevel inverters in which the capacitors are used as the dc links to create the levels for staircase waveforms. This configuration of the multilevel converter makes a reduction in dc sources. On the other hand, it is possible to generate 13 levels with lower dc sources. The proposed module of the multilevel inverter generates 13 levels with two unequal dc sources (2VDC and 1VDC). It also involves two chargeable capacitors and 14 semiconductor switches. The capacitors are self-charging without any extra circuit. The lower number of components makes it desirable to be used in wide range of applications. The module is schematized as two back-to-back T-type inverters and some other switches around it. Also, it can be connected as a cascade modular which leads to a modular topology with more voltage levels at higher voltages. The proposed module makes the inherent creation of the negative voltage levels without any additional circuit (such as H-bridge circuit). Nearest level control switching modulation scheme is applied to achieve high-quality sinusoidal output voltage. Simulations are executed in MATLAB/Simulink and a prototype is implemented in the power electronics laboratory in which the simulation and experimental results show a good performance. [ABSTRACT FROM AUTHOR]

Cascaded multilevel inverter (CMI) is one of the most popular multilevel inverter topologies. This topology is synthesized with some series-connected identical H-bridge cells. CMI requires several isolated dc sources which brings about some difficulties when dealing with this type of inverter. This paper addresses the problem by proposing a switched-capacitor (SC)-based CMI. The proposed topology, which is referred to as switched-capacitor single-source CMI (SCSS-CMI), makes use of some capacitors instead of the dc sources. Hence, it requires only one dc source to charge the employed capacitors. Usually, the capacitor charging process in a SC cell is companied by some current spikes which extremely harm the charging switch and the capacitor. The capacitors in SCSS-CMI are charged through a simple auxiliary circuit which eradicates the mentioned current spikes and provides zero-current switching condition for the charging switch. A computer-aid simulated model along with a laboratory-built prototype is adopted to assess the performances of SCSS-CMI, under different conditions. [ABSTRACT FROM AUTHOR]

This paper introduces a new analysis approach to modeling resonant converters that can be used to determine closed-form expressions for the exact resonant network waveforms. This approach, based on superposition of step responses to inverter and rectifier imposed steps, can easily be applied to resonant converters with high-order resonant networks, multiple inverters, and/or rectifiers. The usefulness of the proposed analysis approach is demonstrated first by applying it to a series-resonant converter, wherein it is used to determine accurate closed-form expressions for its tank current in different operating modes. These expressions are utilized to draw insights that help identify the converter's operating mode, and determine associated expressions for its output voltage and the switching frequency required to achieve a desired output power. The proposed approach is also applied to the multi-inverter multi-element impedance control network (ICN) resonant converter, wherein it is used to derive closed-form expressions for the converter's currents. These expressions are utilized to evaluate the behavior and optimize the design of an ICN resonant converter. A prototype 200-W 500-kHz ICN resonant converter optimized using the proposed approach is used to validate the modeling results. It is shown that there is an excellent agreement between the experimental and modeled waveforms during steady-state operation as well as during startup transients. [ABSTRACT FROM AUTHOR]

This paper discusses the use of a cascaded multilevel converter for flexible power conditioning in smart-grid applications. The main feature of the proposed scheme is the use of independent dc links with reduced voltages, which makes such a topology an ideal candidate for medium- and high-power applications with increased reliability. The developed control strategy regulates independent dc-link voltages in each H-bridge cell, and allows the selective and flexible compensation of disturbing currents under a variety of voltage conditions without requiring any reference frame transformation. The selective control strategies are based on the decompositions proposed in the conservative power theory, which result in several current-related terms associated with specific load characteristics. These current components are independent of each other and may be used to define different compensation strategies, which can be selective in minimizing particular effects of disturbing loads. Experimental results are provided to validate the possibilities and performance of the proposed control strategies, considering ideal and deteriorated voltage conditions. [ABSTRACT FROM PUBLISHER]

This paper proposes an improved offset selection method for discontinuous-pulse-width-modulation (DPWM)-based back-to-back converters to reduce dc-link current ripple. DPWM is introduced to power converters to diminish the stress on power transistors and prolong their lifespan. However, when using the DPWM method, the dc-link current ripple is increased in nonswitching regions of the power transistors. Moreover, in DPWM-based back-to-back converters, the dc-link current ripple reaches its maximum when the two transistors of both inverters are clamped in opposite directions. Therefore, the dc-link capacitors endure more stress, resulting in decreased life duration. To overcome this issue, the switching method should consider the clamping periods, when the current ripple increases. This can be achieved by modifying the DPWM offset, so that the clamping states of both converters are matched. The effectiveness of the proposed method is confirmed by both simulation and experimental results. [ABSTRACT FROM PUBLISHER]

In order to increase the output voltage levels and reduce the isolated dc sources, a symmetrical hybrid nine-level inverter for high-speed motor drive applications is presented in this paper. Each phase of this inverter is composed of a five-level dc/dc converter cell and an H-bridge cell. The dc/dc converter is operated at high frequency with low-voltage devices and the H-bridge is operated at fundamental frequency with high-voltage devices. The three phases are connected to a common dc-link and each drives an isolated winding of an open-winding motor. The operating principles and modulation method are introduced. A detailed analysis of the average currents through the flying capacitor and neutral point of the dc-link is presented and a capacitor voltage balancing method based on phase-shifted pulse-width modulation is proposed. Simulation and experimental results are presented to demonstrate the feasibility of this topology and control method. [ABSTRACT FROM PUBLISHER]

A new zero-sequence circulating current (ZSCC) reduction method for multimodule voltage source inverters (MVSIs) consisting of P three-phase inverters that are connected in parallel is proposed in this paper. Four-switch inverter modules are used instead of the conventional six-switch modules to reduce the cost. In this paper, the effectiveness of the proposed ZSCC reduction method is studied using selective harmonic elimination pulse width modulation. The proposed ZSCC reduction method can remove about P times the number of harmonics using the same switching frequency as compared to more conventional methods, as explained later in this paper. The concepts discussed in the paper are confirmed with results obtained from an MVSI experimental prototype. [ABSTRACT FROM AUTHOR]

Multilevel inverters are receiving more attentions nowadays as one of preferred solutions for medium- and high-power applications. As one of the most popular hybrid multilevel inverter topologies, the five-level active-neutral-point-clamped inverter (5L-ANPC) combines the features of the conventional flying-capacitor type and neutral-point-clamped (NPC) type inverter and was commercially used for industrial applications. In order to further decrease the number of active switches, this paper proposes a seven-switch 5L-ANPC (7S-5L-ANPC) topology, which employs only seven active switches and two discrete diodes. The analysis has shown a lower current rating can be selected for the seventh switch under high power factor condition, which is verified by simulation results. The modulation strategy for 7S-5L-ANPC inverter is discussed. A 1 kVA single-phase experimental prototype is built to verify the validity and flexibility of the proposed topology and modulation method. [ABSTRACT FROM AUTHOR]

This paper presents a three-phase hybrid cascaded modular multilevel inverter topology which is derived from the proposed modified H-bridge module. This topology results in the reduction of number of power switches, losses, installation area, voltage stress and converter cost. For renewable energy environment such as photovoltaic (PV) connected to the microgrid system, it enables the tranformerless operation and enhances the power quality. This multilevel inverter is an effective and efficient power electronic interface strategy for renewable energy systems. The basic operation of single module and the proposed cascaded hybrid topology is explained. The ability to operate in both symmetrical and asymmetrical modes is analyzed. The comparative analysis is done with classical cascaded H-bridge and flying capacitor multilevel inverters. The nearest level control method is employed to generate the gating signals for the power semiconductor switches. To verify the applicability and performance of the proposed structure in PV renewable energy environment, simulation results are carried out by MATLAB/Simulink under both steady-state and dynamic conditions. Experimental results are presented to validate the simulation results. [ABSTRACT FROM AUTHOR]

Multiterminal converters eliminate using several single-input-single-output converters and simplify their topologies and reduce their cost. In this paper, a new family of multi-input converters based on three switches leg is introduced. Inputs of the proposed converters are similar and they are topologically interchangeable and have boost or buck operation modes. The proposed converter has one output that operates as an inverter. Here, all operating modes of the proposed converters and their effects on each other are investigated, in details. Also, an appropriate switching technique for the converters is given. A detailed comparison between conventional and proposed two-input converters is also presented. A two-input, one-output prototype converter has been implemented to validate the given analyses and to verify the proposed converter's performance. The experimental results are in good agreement with the theoretical and simulated analyses. [ABSTRACT FROM AUTHOR]

In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology. [ABSTRACT FROM AUTHOR]

This paper presents a three-phase multilevel quasi-Z-source inverter (qZSI) topology operating in normal and fault-tolerant operation mode. This structure is composed by two symmetrical quasi-Z-source networks and a three-phase T-type inverter. Besides the intrinsic advantages of multilevel voltage source inverters, the proposed structure is also characterized by their semiconductor fault tolerance capability. This feature is only obtained through changes on the modulation scheme after the semiconductor fault and does not require additional extra-phase legs or collective switching states. In certain fault types, the reduction of the output power capacity will be compensated by the boost characteristic of the qZSI. The fault-tolerant behavior of the proposed topology is demonstrated by several simulation results of the converter in normal and fault condition. To validate the characteristics of this multilevel qZSI, an experimental prototype was also built to experimentally confirm the results. [ABSTRACT FROM PUBLISHER]

In this paper, a single-phase grid-connected transformerless photovoltaic inverter for residential application is presented. The inverter is derived from a boost cascaded with a buck converter along with a line frequency unfolding circuit. Due to its novel operating modes, high efficiency can be achieved because there is only one switch operating at high frequency at a time, and the converter allows the use of power MOSFET and ultrafast reverse recovery diode. It also features a robust structure because the phase leg does not have a shoot-through issue. This paper begins with theoretical analysis and modeling of this boost-buck converter-based inverter. And the model indicates that small boost inductance will lead to an increase in the resonant pole frequency and a decrease in the peak of Q, which results in easier control and greater stability. Thus, interleaved multiple phases structure is proposed to have small equivalent inductance; meanwhile, the ripple can be decreased, and the inductor size can be reduced as well. A two-phase interleaved inverter is then designed accordingly. Finally, the simulation and experiment results are shown to verify the concept and the tested efficiency under 1-kW power condition is up to 98.5%. [ABSTRACT FROM AUTHOR]

This paper proposes a unified PWM method for matrix converters so as to establish a common platform which can generate various types of PWM methods in real time by adjusting the free parameters in the modulation algorithm. As a foundation for unification, the general form of the modulation functions for matrix converters is derived using geometric transformation approach. All eligible direct modulation matrices are shown to be of indirect form and are expressed in terms of instantaneous phase quantities. This paper also presents a new viewpoint to consider a matrix converter as a generalized three-level inverter and to apply the double-carrier-based dipolar modulation technique of the three-level inverter to the matrix converter. Several concepts of the two-level PWM inverters are then generalized to the matrix converters for better visualization and understanding of the modulation process. [ABSTRACT FROM AUTHOR]

The main objective of this paper is to simplify the implementation of continuous and discontinuous 3-D space vector pulsewidth modulations (SVPWMs). This paper analyzes the relationships, whether in abc or \alpha\beta 0 coordinates, between three-phase voltages and the following elements: the tetrahedron in which the reference vector resides, three adjacent active switching vectors (or three switching states), and their duration times. Based on the analysis, the calculation of the turn-on time of each switch in the actual implementation is simplified, and discontinuous PWM (DPWM) methods in three-leg inverters can be extended to four-leg inverters without the phase angle. In addition, two more DPWM methods that are peculiar to 3-D SVPWM are presented. This simplified algorithm does not use irrational operations or look-up tables, and it alleviates the computation burden of the processor. The simulation and experimental results are provided to validate the effectiveness of the proposed algorithm. [ABSTRACT FROM AUTHOR]

In this paper, a cascaded H-Bridge (CHB)-multilevel converter (MC)-based photovoltaic (PV) system with no voltage or current sensors at the dc-side is proposed. Eliminating the dc-side sensors simplifies the hardware, leading to lower cost and higher reliability of the PV system. A novel scheme estimating the capacitors’ voltages from the ac output voltage of the inverter is developed. The scheme allows replacing all dc-side voltage sensors by a single-voltage sensor at the ac-side of the converter. Furthermore, the dc current sensors, conventionally required for the maximum power point tracking (MPPT), are also eliminated. Instead, the outputs from the capacitors’ voltage control systems are utilized for the MPPT. The effectiveness of the proposed dc-side sensorless system is experimentally demonstrated on a 2-kW single-phase seven-level CHB converter-based PV system. [ABSTRACT FROM PUBLISHER]

When the faulty cells of a nonregenerative cascaded H-bridge inverter are bypassed, it is necessary to inject a zero-sequence voltage into the inverter phase voltages so as to achieve the maximum balanced line-to-line voltage. However, the injected zero-sequence voltage may lead to a back flow of real power (BFRP) in at least one phase so that the dc voltage will rise to an intolerable level. To solve the problem, this paper proposes a new method of generating zero-sequence voltages. This method can not only maximize the available output voltage but also suppress the BFRP effectively. The zero-sequence voltage is always limited to an appropriate range to achieve the maximum output voltage through linear modulation. Closed-loop control is used to minimize the fundamental component of the zero-sequence voltage so that the power is less likely to flow back. Compared with the conventional methods, the proposed method allows the inverter to drive a load with a lower power factor not inducing BFRP or degrading the output voltage capability. As a result, the probability of overvoltage on the dc side is reduced. The experimental results show that the proposed method is effective and feasible. [ABSTRACT FROM AUTHOR]

In this paper, an advanced configuration for a symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and those most recently introduced is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices, including power semiconductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced, and the control scheme gets simpler. Moreover, the reduced amount of on-state switches in the suggested configuration decreases voltage drops. Furthermore, power losses are diminished. The given simulation results confirm the feasibility of the proposed configuration. To approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally, simulation and experimental results are compared, and the provided comparison shows that the obtained results are in good agreement. [ABSTRACT FROM PUBLISHER]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new single-phase cascaded multilevel inverter is proposed. This inverter is comprised of a series connection of the proposed basic unit and is able to only generate positive levels at the output. Therefore, an H-bridge is added to the proposed inverter. This inverter is called the developed cascaded multilevel inverter. In order to generate all voltage levels (even and odd) at the output, four different algorithms are proposed to determine the magnitude of dc voltage sources. Reduction in the number of power switches, driver circuits, and dc voltage sources is the advantage of the developed single-phase cascaded multilevel inverter. As a result, the installation space and cost of the inverter are reduced. These features are obtained by the comparison of the conventional cascaded multilevel inverters with the proposed cascaded topology. The ability of the proposed inverter to generate all voltage levels (even and odd) is reconfirmed by using the experimental results of a 15-level inverter. [ABSTRACT FROM PUBLISHER]

This paper presents the design of a resonant converter with a switching frequency in the very high frequency range (30-300 MHz), a large step down ratio (ten times), and low output power (1 W). Several different inverters and rectifiers are analyzed and compared. The class E inverter and rectifier are selected based on complexity and efficiency estimates. Three different power stages are implemented; one with a large input inductor, one with a switch with small capacitances, and one with a switch with low on-resistance. The power stages are designed with the same specifications and efficiencies from 60.7-82.9% are achieved. [ABSTRACT FROM AUTHOR]

In this paper, a new medium voltage power converter topology using a diode rectifier, three-level boost (TLB) converter, and neutral-point-clamped (NPC) inverter is proposed for a high-power permanent magnet synchronous generator-based wind energy conversion system. The generator-side TLB converter performs the maximum power point tracking and balancing of dc-link capacitor voltages, while the grid-side NPC inverter regulates the net dc-bus voltage and reactive power to the grid. A significant improvement in the grid power quality is accomplished as the NPC inverter no longer controls the dc-link neutral point voltage. A model predictive strategy is proposed to control the complete system where the discrete-time models of the proposed power electronic converters are used to predict the future behavior of control variables. These predictions are evaluated using two independent cost functions, and the switching states which minimize these cost functions are selected and applied to the generator- and grid-side converters directly. In order to comply with the high-power application, the switching frequencies of the TLB converter and NPC inverter are minimized and maintained below 1.5 and 1 kHz, respectively. The proposed topology and control strategy are verified through MATLAB simulations on a 3-MW/3000-V/577-A system and dSPACE DS1103-based experiments on 3.6-kW/208-V/10-A prototype. [ABSTRACT FROM AUTHOR]

The distributed generation (DG) should supply continuous power to the local critical load, even in the condition of utility outage. And many efforts have been made for the three-phase inverter in the DG to transfer between the islanding mode and the grid-tied mode seamlessly. This paper proposes a transfer strategy based on indirect current control for the three-phase inverter in the DG, which is composed mainly of two cascaded feedback loops, i.e., capacitor voltage loop and external grid current loop, in synchronous reference frame. In the grid-tied mode, the grid current is controlled by regulating the capacitor voltage. When islanding happens, the reference of the voltage loop is fixed by the limiter. As the local load is located in parallel with the filter capacitor in the proposed strategy, the load voltage is always controlled by the capacitor voltage loop directly, and the quality of the load voltage can be guaranteed. Besides, the performance of the capacitor voltage loop is further improved by introducing an inner capacitor current loop. Moreover, the steady state and transient state of the system, including the output of the limiter, are comprehensively analyzed, and then the compensators and limiters are designed. Finally, the proposed control strategy is verified by the simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a new solar power generation system, which is composed of a dc/dc power converter and a new seven-level inverter. The dc/dc power converter integrates a dc-dc boost converter and a transformer to convert the output voltage of the solar cell array into two independent voltage sources with multiple relationships. This new seven-level inverter is configured using a capacitor selection circuit and a full-bridge power converter, connected in cascade. The capacitor selection circuit converts the two output voltage sources of dc-dc power converter into a three-level dc voltage, and the full-bridge power converter further converts this three-level dc voltage into a seven-level ac voltage. In this way, the proposed solar power generation system generates a sinusoidal output current that is in phase with the utility voltage and is fed into the utility. The salient features of the proposed seven-level inverter are that only six power electronic switches are used, and only one power electronic switch is switched at high frequency at any time. A prototype is developed and tested to verify the performance of this proposed solar power generation system. [ABSTRACT FROM AUTHOR]

The three-level neutral-point (NP)-clamped (3L-NPC) converter is a promising multilevel topology in the application of megawatt wind power generation systems. However, the growing requirements by grid codes may impose high stress and even give reliability problem to this converter topology. This paper investigates the loss and thermal performances of a 10-MW 3L-NPC wind power inverter undergoing low-voltage ride-through (LVRT) operation. A series of new space vector modulation methods is then proposed to relocate the thermal loading among the power switching devices. It is concluded that, with the proposed modulation methods, the thermal distribution in the 3L-NPC wind power inverter undergoing LVRT becomes more equal, and the junction temperature of the most stressed devices can be also relieved. Also, the control ability of the dc-bus NP potential, which is one of the crucial considerations for the 3L-NPC converter, is even more improved by the proposed modulation methods. [ABSTRACT FROM AUTHOR]

In this paper, a number of alternate-cascaded switched-inductor and tapped-inductor networks have been proposed for Z-source inverters. The resulting topologies have enhanced voltage-boost capability while retaining the usual voltage-buck flexibility of a conventional voltage-source inverter. The enhanced capability is achieved by using lower rated components that can more readily be found. These components are assembled without direct series connection and hence avoid unbalanced voltage sharing problems and losses linked to balancing resistive circuits. The component count is, however, high, meaning that the proposed inverters should only be considered when a design requires multiple lower rated components rather than a few higher rated ones. Analysis, simulation, and experimental results have already validated the concepts discussed. [ABSTRACT FROM PUBLISHER]

Hybrid cascade multilevel inverters combine semiconductor devices of different voltage ratings and technologies, which theoretically allow high efficiency to be achieved. The bottlenecks of these topologies are, however, the need for isolated supplies for the cells and the lack of modularity. This paper focuses on the design and control of high-resolution, high-efficiency multilevel inverters with simplified dc power supplies. It introduces several rules for systematically designing the dc voltages of the cells, for which all unsupplied capacitor voltages can be regulated. Six classes of inverters are obtained covering single- and three-phase, staircase and pulsewidth-modulated (PWM) inverters. New configurations of hybrid cascade multilevel inverters are obtained for each class. A double modulation strategy with two different frequencies is proposed that allows switching losses of PWM inverters to be reduced. Decoupled mechanisms are proposed for the total and internal energy balances. It is shown how to make the design robust by taking into account conversion losses and large dc-voltage imbalances in the design and control. An analysis of the maximum voltage utilization and efficiency of the resulting configurations is carried out. The effectiveness of the novel concepts is validated experimentally for two of the proposed topologies. [ABSTRACT FROM PUBLISHER]

Common-mode voltages (CMVs) can lead to premature failure of the motor insulation system in medium-voltage current-source-fed drives. By analyzing the CMV values at all switching states under different operating conditions of a current-source-inverter (CSI)-based motor drive, this paper first indicates that the CMV peaks are produced by the zero states in most of the cases. The nonzero-state (NZS) modulation techniques employed in voltage-source converters are adapted for use in a space-vector-modulated current-source converter (CSC) to reduce the CMV magnitude. For NZS modulation in CSCs, the nearest three-state (NTS) modulation sequences are designed with good low-order harmonic performances in their linear modulation region of m _a ≥ 0.67 and with no increase in the device switching frequency. A combined active-zero-state (AZS) modulation technique is also proposed as compensation, for a lower modulation index in the range of 0.4–0.67, when a compromise is made between the dc-link current minimization and high input power factor control. The simulation and experimental results are provided to validate the CMV reduction effects and harmonic performances of the NTS and combined AZS modulation methods in CSI-fed drives. [ABSTRACT FROM AUTHOR]

The advancement in power electronics has made the use of any number of phases in ac machines possible since with the inverter, any number of phase voltages can be realized as long as the corresponding inverter exists. To supply multiphase drives requires multiphase voltage source inverters (VSIs) whose output voltages depend very much on the methods of generating the pulses to turn on and turn off the inverter devices appropriately. This paper presents an analytical technique for the determination of the expressions for the modulation signals used in the carrier-based sinusoidal and generalized discontinuous pulse width modulation schemes for two-level, five-phase voltage source converters. These expressions can be used for both balanced and unbalanced phase voltages generated by any two-level multiphase inverter, in generating the required reference signals appropriately. An example of a five-phase VSI is presented to illustrate the strategy. Simulation and experimental results are presented in which a close examination shows that both results are similar for the balanced and unbalanced load voltage cases. [ABSTRACT FROM AUTHOR]

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor. [ABSTRACT FROM AUTHOR]

This paper presents a new type of cascade inverter based on dual buck topology and phase-shift control scheme. The proposed cascade dual buck inverter with phase-shift control inherits all the merits of dual buck type inverters and overcomes some of their drawbacks. Compared to traditional cascade inverters, it has much enhanced system reliability thanks to no shoot-through problems and lower switching loss with the help of using power MOSFETs. With phase-shift control, it theoretically eliminates the inherent current zero-crossing distortion of the single-unit dual buck type inverter. In addition, phase-shift control and cascade topology can greatly reduce the ripple current or cut down the size of passive components by increasing the equivalent switching frequency. A cascade dual buck inverter has been designed and tested to demonstrate the feasibility and advantages of the system by comparing single-unit dual buck inverter, 2-unit and 3-unit cascade dual buck inverters at the same 1 kW, 120 V ac output conditions. [ABSTRACT FROM AUTHOR]

This paper presents a phase-modulated high-frequency isolated dc/ac converter as the grid interface in a distributed generation system. The converter includes two full-bridge HF LCL-type resonant inverters working at fixed duty cycle. The power control is realized by means of the phase-shift between the two bridges. Using the LCL-type resonant tank, zero-voltage-switching is achieved for all switches for the whole power range. With the phase-shift modulated sinusoidally, a full-wave rectified output current synchronized with the utility line is obtained, which is unfolded and fed to the single-phase utility line. The analysis is verified with computer simulation results. Experimental data based on a 500-W prototype circuit is included for validation purpose. [ABSTRACT FROM PUBLISHER]

This paper extends the Z-source concept to matrix converters and explores a family of Z-source matrix converters. Their principles and characteristics are analyzed, and a simplified voltage-fed Z-source matrix converter is used as an example to demonstrate its operation, voltage gain versus modulation index, PWM method, boost control, and implementation of the control. Both simulation and experimental results verify operation of the proposed Z-source matrix converter, analytical results, and control method. The Z-source converters can achieve buck and boost operation with reduced number of switches needed, therefore achieving low cost, high efficiency, and reliability, compared to the traditional matrix converters. [ABSTRACT FROM AUTHOR]

Power converters consisting of naturally commutated thyristors such as cycloconverters and current source inverters were the first to be used in driving electrical motors with variable speed, but now, due to their inferior performance compared to forced commutated converters, their use is restricted in the high voltage/high power range where the performance and cost of forced commutated switching devices are not yet competitive. Hybrid cycloconverters proposed recently are capable of improving the performance of cycloconverters by adding an auxiliary forced commutated inverter with reduced installed power. It will be shown that the new topology is not only able to improve the quality of the output voltage but is also able to enhance the control over the circulating current and, therefore, for some of the cycloconverter arrangements, to improve the input power quality. This paper evaluates the performance of a few standard and hybrid cycloconverter arrangements using both simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a novel matrix converter with one ac input and two ac outputs. The presented topology is based on the traditional indirect matrix converter, but with its rear-end six-switch inverter replaced by a compact nine-switch inverter. With only three extra switches added, the proposed converter can produce two sets of three-phase ac outputs, whose amplitudes, frequencies, and phases can appropriately be regulated. Features such as sinusoidal input and outputs, unity input power factor and minimum commutation count are all retained by the proposed topology, despite having an additional output. Its modulation is realized by the computationally less intensive carrier-based method, whose unique carrier requirements can easily be managed within a programmable logic device. Mathematical proof for validating sinusoidal input and outputs achieved by this modulation technique is also discussed, before being verified in simulation and experimentally, together with other findings. [ABSTRACT FROM AUTHOR]

This paper presents first an overview of the well-known voltage and current dc-link converter topologies used to implement a three-phase PWM ac–ac converter system. Starting from the voltage source inverter and the current source rectifier, the basics of space vector modulation are summarized. Based on that, the topology of the indirect matrix converter (IMC) and its modulation are gradually developed from a voltage dc-link back-to-back converter by omitting the dc-link capacitor. In the next step, the topology of the conventional (direct) matrix converter (CMC) is introduced, and the relationship between the IMC and the CMCs is discussed in a figurative manner by investigating the switching states. Subsequently, three-phase ac–ac buck-type chopper circuits are considered as a special case of matrix converters (MCs), and a summary of extended MC topologies is provided, including three-level and hybrid MCs. Therewith, a common knowledge basis of the individual converter topologies is established. [ABSTRACT FROM PUBLISHER]

This paper proposes an energy regeneration circuit for three-phase voltage-fed inverters using a modified Undeland snubber. The proposed system uses a quasi-square-wave zero voltage switching dc–dc auxiliary converter to regenerate the energy from snubber capacitor to the dc bus. The regenerative circuit uses a single active switch, and it operates independently of the three-phase inverter. Operation stages, theoretical waveforms, and a design methodology are presented. Experimental results based on a 4.5-kVA three-phase inverter prototype are included to validate the proposed topology. [ABSTRACT FROM PUBLISHER]

This paper proposes a new high step-up dc–dc converter designed especially for regulating the dc interface between various microsources and a dc–ac inverter to electricity grid. The figuration of the proposed converter is a quadratic boost converter with the coupled inductor in the second boost converter. The converter achieves high step-up voltage gain with appropriate duty ratio and low voltage stress on the power switch. Additionally, the energy stored in the leakage inductor of the coupled inductor can be recycled to the output capacitor. The operating principles and steady-state analyses of continuous-conduction mode and boundary-conduction mode are discussed in detail. To verify the performance of the proposed converter, a 280-W prototype sample is implemented with an input voltage range of 20–40 V and an output voltage of up to 400 V. The upmost efficiency of 93.3% is reached with high-line input; on the other hand, the full-load efficiency remains at 89.3% during low-line input. [ABSTRACT FROM AUTHOR]

A multilevel multiphase space vector pulsewidth modulation (SVPWM) algorithm has been introduced recently, in which the reference is separated into an integer part and a fractional part. The fractional part is, in essence, a two-level multiphase space vector algorithm. This paper shows that, with appropriate adaptations, the fractional part of the general space vector multilevel multiphase PWM can be applied as a stand-alone PWM method in conjunction with two-level voltage-source converters with any number of phases. Simulation results of the five- and six-phase cases are shown, and the new algorithm is compared with another recent multifrequency SVPWM algorithm, which follows the standard approach of selecting the switching vectors and calculating their application times using dq planes. The experimental verification is provided using a five-phase two-motor series-connected induction motor drive, supplied from a custom-designed five-phase voltage-source inverter. [ABSTRACT FROM AUTHOR]

A novel H-bridge multilevel pulsewidth modulation converter topology based on a series connection of a high-voltage diode-clamped inverter and a low-voltage conventional inverter is proposed in this paper. A dc link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a 15-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low total harmonic distortion of voltage and current, which leads to the possible elimination of the output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which 19 levels can be synthesized in output voltage with the same number of components. To balance the dc link capacitor voltages for the maximum output voltage resolution as well as synthesize asymmetrical dc link combination, a new multi-output boost converter is utilized at the dc link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high-quality output voltage. [ABSTRACT FROM PUBLISHER]

The output voltage quality of some of the single-phase multilevel inverters can be improved when their dc-link voltages are regulated asymmetrically. Symmetrical and asymmetrical multilevel diode-clamped inverters have the problem of dc-link capacitor voltage balancing, especially when power factor of the load is close to unity. In this paper, a new single-inductor multi-output dc/dc converter is proposed that can control the dc-link voltages of a single-phase diode-clamped inverter asymmetrically to achieve voltage quality enhancement. The circuit of the presented converter is explained and the main equations are developed. A control strategy is proposed and explained in details. To validate the versatility of the proposed combination of the suggested dc–dc converter and the asymmetrical four-level diode-clamped inverter (ADCI), simulations and experiments have been directed. It is concluded that the proposed combination of introduced multioutput dc–dc converter and single-phase ADCI is a good candidate for power conversion in residential photovoltaic (PV) utilization. [ABSTRACT FROM PUBLISHER]