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The supply-side current of an inverter-fed induction motor (IM) is easily accessible and less affected by noises than the motor stator current. This paper proposes a novel sensorless speed estimation method for an IM using the spectrum of the supply-side current. However, due to the influence of fundamental supply frequency, it is difficult to carry out the speed detection straight from the supply-side current signal. In this paper, an analytic model for characterizing the supply-side current of an inverter-fed IM using the modulation theory and the switching function concept is developed. Then, the Hilbert transform is applied to extract the speed harmonic component from the supply-side current. Finally, an interpolated Goertzel algorithm is put forward to enhance the estimation precision of IM speed. The performance of the proposed sensorless speed estimation method is proved by the speed estimation results obtained from hardware experiments of an IM fed by an inverter under different load conditions. [ABSTRACT FROM AUTHOR]

Motors and inverters are increasingly being used in vehicles. As more vehicle components are being adopted, requirement for safety and installation space are increasing. Growing attention is being paid to the use of six-phase permanent magnet synchronous motors (PMSMs) and their parallel control by two inverters, because of their reduced size and enhanced safety. This paper proposes a pulsewidth modulation (PWM) control algorithm for a six-phase PMSM. In low-voltage vehicle components such as electric power steering, the current is usually acquired with resistors placed under the low-side switching devices. In the proposed control algorithm, the neutral voltage of the two inverters is shifted to either a lower or higher voltage within a certain range to allow for the signal conditioning time delay after the switching device turns on or off, and the time taken for the phase current to rise or settle. The paper proposes a novel PWM control algorithm that ensures that the on-time of the low-side switching devices satisfies the restriction on current sensing with resistors and reduces the current in the capacitor at the same time. The work contributes to reducing the current in a practical configuration involving low-voltage vehicle components. [ABSTRACT FROM AUTHOR]

Induction motor drives operated with a low ratio of the switching frequency to the fundamental frequency (i.e., pulse number) are prone to have high magnitudes of low-order torque harmonics. This paper proposes a method to analytically evaluate the harmonic torque spectrum based on the pulsewidth-modulated voltage waveforms for low pulse number operation. The predicted torque harmonic spectra for different pulsewidth-modulated waveforms are validated through simulations and experiments. This paper also reports optimal switching angles to minimize the total rms value of torque harmonics of order 6, 12, 18 $,\dots,$ $6(N-1)$ , considering the number of switching angles per quarter ($N$) to be 4 and 5. Compared to sine triangle pulsewidth modulation and selective harmonic elimination pulsewidth modulation with the same pulse number, the proposed optimal switching angles significantly reduce the total rms value of all harmonic torques of order lower than $6N$. Extensive simulation and experimental results on a 3.7-kW induction motor drive are presented to demonstrate the superior performance of the proposed optimal pulsewidth modulation. [ABSTRACT FROM AUTHOR]

In a sensorless vector control method, at low speeds and self-commissioning for AC motors, it is necessary to model dead time, rise/fall time, parasitic capacitors, and semiconductors’ voltage drop accurately. In this paper, voltage drop in each phase due to the nonlinear behavior of the inverter from the control system's viewpoint is precisely modeled by using two lookup tables. These lookup tables make the proposed model robust against the dc-link voltage and carrier frequency variations in the entire current range. In conventional methods at standstill, the measured voltage in the dc current test contains the nonlinearity of two phases. Therefore, to obtain the nonlinear voltage of each inverter phase, it is assumed that the values of inverter nonlinearity voltage at both high current and low current are equal. This simplification leads to distortion in measured voltage in the low currents. However, in this paper, the voltage drop equation of each phase is solved by numerical method that is realizable in conventional processors. The results obtained in actual voltage measurement show the superiority of the proposed method over traditional methods in the low currents. The proposed method is verified by using a voltage source inverter feeding a 2.2-kW three-phase induction motor. [ABSTRACT FROM AUTHOR]

This paper proposes a novel discontinuous pulse-width modulation (DPWM) method to reduce the current harmonics and improve the system efficiency for a single-phase three-level neutral-point clamped inverter. In single-phase inverters, the unipolar pulse-width modulation (UP-PWM) method is commonly used. However, this method has the disadvantage of power losses due to numerous switching operations. Conventional DPWM methods reduce the power losses and improve efficiency but increase the current total harmonic distortion (THD). To overcome these weaknesses, this paper proposes a hybrid DPWM switching method combining two PWM methods: the UP-PWM method and the conventional DPWM method called one-pole clamped PWM method. Since the proposed DPWM method offers all the advantages of both PWM methods, the optimal performance—with regard to the power losses and current THD—is obtained. The combination of two PWM methods is investigated by analyzing the power losses and current THD. Based on the analysis, the process determining the optimal operating condition is introduced. The effectiveness of the proposed DPWM method is demonstrated through simulations and experiments. [ABSTRACT FROM AUTHOR]

This paper presents an intelligent-based fault-tolerant system for a solar photovoltaic (PV) inverter. Artificial neural network based controller is used to monitor, detect, and diagnose the faults in solar PV panels, battery, semiconductor switches, and inverters. The cascaded multilevel inverter is connected across the combination of solar PV panel and battery for dc–ac conversion. The major advantage of the proposed topology is that it can deliver power from source to the load even under fault and partial shaded conditions. The paper also reviews on various faults in the solar PV energy conversion process and provides suitable solutions for each circumstance. Simulations are undertaken in MATLAB 2016a/Simulink and experimental investigation is carried out for a 3 kWp solar PV system. The results have proven that the system is capable to deliver power in spite of faulty environments. The comparison and discussion of the results were made to show the effectiveness of the proposed system. [ABSTRACT FROM AUTHOR]

Impedance source inverters have experienced a fast evolution since the first release of the Z-source inverter in 2003. This evolution is not limited to improving the structure of the different topologies but also includes their modulation and control schemes in order to reinforce their performance from many perspectives. Accordingly, many modulation schemes have been proposed in different research activities, but the full differences among these modulation schemes, including their effect on the switching losses, are not clear yet to the researchers. Hence, this research activity is aimed at introducing a comprehensive review of these different modulation schemes employed for the three-phase impedance source inverters, which is enhanced with a comparative assessment. In this paper, different modulation schemes are classified and reviewed, introducing an important benchmark in order to identify the basic differences between these modulation schemes. In other words, from this paper, the concept of classifying the different modulation schemes and the mandatory equations to implement each scheme can easily be drawn. Moreover, this review is essential for the next part, i.e., Part II, in which a comparative assessment is introduced. [ABSTRACT FROM PUBLISHER]

This paper proposes a new single-phase single-stage switched-boost inverter with four switches. Like the quasi-Z-source inverter and quasi-switched boost inverter (qSBI), the proposed inverter has the main features as continuous input current, buck/boost voltage with single-stage conversion, and shoot-through immunity. Compared to the qSBI, the proposed inverter uses one more capacitor and one less switch. This paper presents the operating principles, pulse-width modulation control strategy, parameter design guidelines, and simulation results for the proposed inverter. To verify the performance of the proposed inverter, an 800-W prototype was built with an 110 V/50 Hz output voltage in stand-alone and grid-connected modes. The simulation and experimental results matched those of the theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, the characteristics of ripple current of a multimegawatt drive system fed by a pulse-width modulation (PWM) inverter are investigated. Based on the investigation, a novel PWM scheme is devised to reduce the switching loss of the inverter under an identical amount of torque ripple of a motor. The proposed PWM is composed of two parts. The first is minimum torque ripple PWM (MTRPWM), which is optimized in terms of the minimum torque ripple in high modulation index (MI). The second determines the minimum switching frequency while holding the average torque ripple less than the allowable value under various operating conditions. It is termed reduced switching frequency PWM (RSFPWM). Consequently, by simply changing the PWM method from conventional fixed switching frequency continuous PWM to the proposed PWM, MTRPWM and RSFPWM, simulation results show that the switching loss of the inverter driving a 3.5 MW induction motor is reduced to 51.6% while keeping the torque ripple in the allowable boundary, where MI is 1.12. This approach is applied to small-scale experimental sets consisting of an interior permanent magnet synchronous machine (IPMSM) motor-generator set, and an induction machine MG set in an effort to verify the validity and feasibility of the proposed method. Based on these experimental results, the cost indexes of the IPMSM and the induction machine, as defined in this paper, decrease by up to 66% and 77%, respectively, when the proposed method is applied when MI is 1.12 compared with the outcome with the conventional PWM. [ABSTRACT FROM AUTHOR]

In the traditional three-resistor-based current sampling scheme, the sampled currents will become inaccurate when the duration of zero-voltage vectors of an inverter is too short, which leads to a limited modulation index (MI). To overcome this problem, an improved three-resistor sampling method is proposed by establishing a predictive current model of an inverter load, which is that of an induction motor on the synchronous rotating frame for the demonstration purpose in this paper. The principle of this method is detailed in the paper. Then a simulation model of a vector-controlled induction motor drive that utilizes the proposed current sampling scheme is built in the Simulink environment. Finally, the experiment on the new sampling scheme is performed in both steady-state and dynamic conditions. The results verify that the existing current sampling problems can be solved effectively and the motor can perform well with higher MI under the new scheme. As a result, the loading capacity of the system can be enhanced notably. [ABSTRACT FROM PUBLISHER]

In this paper, two structures are proposed for the switched-inductor quasi-Z-source inverter. In the proposed structures to extend the voltage gain of inverter, two new switched-inductor structures are used. In the proposed structures, voltage across the capacitors in the Z-source network and in the switched-inductor is symmetric and small. The other advantage of proposed inverters is known as achieving higher voltage gain per smaller duty cycle ratio (of shoot-through). Compared with a conventional continuous input current switched-inductor quasi-Z-source inverter at the same gain voltage, there is less of a ripple of input current in the proposed inverters. In this paper, at first the both the conventional and the proposed switched-inductor Z-source inventers are thoroughly investigated to find out their governing relations. Then, the proposed Z-source inverters are compared with the conventional ones by simulating them to assess their performance efficiency. Next, applying the simple boost pulse width modulation the simulation is carried out with PSCAD/EMTDC software. After that, to evaluate the obtained results, the prototypes of the proposed inverters with 48 Vdc input voltage are used. [ABSTRACT FROM PUBLISHER]

This paper presents a novel six-pulse low-frequency (LF) fluctuating high-voltage dc-bus-based power system architecture for fuel cell vehicles (FCVs) application. A novel hybrid modulation scheme consisting of six-pulse modulation at LF scale and modified secondary modulation and 33% pulse width modulation at high-frequency (HF) scale is proposed. Three-phase ac waveforms for the propulsion system of FCVs are generated from LF fluctuating high-voltage dc bus. The proposed modulation technique significantly reduces the switching losses of the bidirectional dual-stage inverter: 1) soft-switching of both sides of the front-end current-fed full-bridge converter is realized; and 2) at any moment, only one leg of back-end three-phase inverter is switched at HF, while the other two legs are kept in on or off states. This tremendously reduces the bidirectional inverter's switching losses and improves the system efficiency. The LF fluctuating high-voltage dc bus allows the elimination of large electrolytic dc-link capacitor, which contributes to a more reliable and compact design. This paper presents the operation, analysis, and design of a bidirectional inverter implementing the proposed hybrid modulation technique. Simulation results obtained from power electronics simulation software PSIM and experimental results from the lab prototype clearly validate the effectiveness of the proposed modulation technique. [ABSTRACT FROM PUBLISHER]

This paper proposes an active switching harmonic current reduction method within the dc-link capacitor of two-level, three-phase, back-to-back converters. This method is based on the derived analytical solution for switching harmonic currents in the dc-link. It is shown that by controlling the pulse width modulation carrier waveform's phase angles, the harmonics in the second carrier band of the rectifier and the inverter can be synchronized such that cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. The feasibility of the proposed approach has been verified experimentally and results are presented in this paper. [ABSTRACT FROM PUBLISHER]

Digital current controllers have the key impact on the performance of grid-side converters and ac drives. The voltage disturbances are commonly suppressed by enhancing the controller with an inner active resistance feedback. In cases where the switching noise and parasitic oscillations introduce sampling errors, conventional sampling is replaced by the oversampling-based error-free feedback acquisition which derives the average of the measured currents over the past switching period. The time delay introduced into the feedback path creates difficulties in designing the current controller with the active resistance. In this paper, we introduce a novel structure of the current controller, which includes the error-free sampling and the active resistance feedback. Devised structure improves the disturbance rejection by extending the range of permissible values of the active resistance. Controller structure is based on the internal model principles, and it maintains the input step response unaffected. This paper comprises analytical design, the gain setting procedure, computer simulation, and experimental results obtained from an experimental setup with a three-phase inverter, digital controller, and a permanent-magnet synchronous motor. [ABSTRACT FROM PUBLISHER]

High dc voltage utilization is one of the important requirements in a three-phase inverter. Under some carrier-based pulse width modulations (PWMs), the dc voltage utilization can reach the same maximum as that under the space vector modulation. But the third harmonic component of common-mode voltage (CMV) will be increased markedly while using these carrier-based PWMs in inverters. To improve the situation, this paper proposes that a midpoint-fluctuation carrier (MFC) scheme should be used in the three-phase inverter. The MFC is formed by adding a midpoint-fluctuation signal on the standard symmetrical triangular carrier. By analyzing the linear modulation region of the midpoint-fluctuation signals, a minimum fluctuant signal in the linear modulation region is designed in the paper. Compared with the use of other conventional schemes in the three-phase inverter, the use of minimum MFC scheme has higher fundamental amplitude in the output line voltage and smaller magnitude of the third harmonic in the CMV. The feasibility and validity of the MFC are proved by experiment results in a three-phase inverter. [ABSTRACT FROM PUBLISHER]

A novel hybrid pulse width modulation (PWM) technique is proposed in this paper for two parallel interleaved, two-level, three-phase voltage source inverters (VSIs). The two parallel interleaved VSIs are analyzed as a three-level (3L) inverter. A 3L inverter provides minimum line current ripple when nearest three voltage vectors are applied. In this paper, a novel carrier-based PWM technique is developed that ensures the application of nearest voltage vectors, keeping average circulating current to zero over a switching period. For carrier-based implementation of the proposed PWM, generalized common-mode (CM) offsets are derived in terms of maximum and minimum values of reference signals. Each 3L space-vector sector is divided into seven subsectors. For each subsector, a CM offset is calculated, addition of which to reference signals ensures the minimum line current ripple and zero average circulating current. Simulation and experimental results are provided to validate the proposed technique. [ABSTRACT FROM PUBLISHER]

This paper analyzes synchronization strategy for cascaded H-bridge multilevel inverter (CHBMLI) topologies with a carrier-based sinusoidal phase-shifted pulse width modulation (PSPWM) technique. In the PSPWM technique, a separate carrier is used for each H-bridge (HB). The carriers are generally phase shifted from each other by π /x rad (x = No. of HBs) for unipolar PWM. With the carrier frequency being an integer (odd/even) multiple of the fundamental frequency, it is observed that the positions of zero crossings of the carriers with respect to the zero crossings of voltage references play an important role for maintaining quarter-wave symmetry among multilevel inverter pole voltage waveforms. This paper analytically shows the conditions for half-wave symmetry and quarter-wave symmetry and experimentally verifies those conditions for the PSPWM technique with a five-level CHBMLI laboratory prototype. [ABSTRACT FROM PUBLISHER]

The performance of modular multilevel converters (MMCs) in medium-voltage applications, where the number of required submodules is not high, can be improved utilizing low switching frequency modulations such as (2N+1) selective harmonic elimination-pulse width modulation (SHE-PWM), which provides tight control of lower order harmonics and low switching losses. This paper proposes a calculation method, which is based on a novel formulation, to solve the SHE-PWM problem. In particular, MMCs with (2N+1) phase output voltage levels are considered, obtaining a (2N+1) SHE-PWM waveform. This method utilizes a unique system of equations that is valid for any possible waveform. Therefore, it is able to calculate simultaneously, without predefined waveforms, both the switching patterns and the associated firing angles that solve the (2N+1) SHE-PWM problem. Consequently, the search process is simplified and optimized. Furthermore, this paper also proposes a circulating current control technique, which can be applied along with (2N+1) SHE-PWM without disturbing the phase output voltage. Simulation results and experimental tests obtained with a single-phase laboratory prototype prove the validity of the novel (2N+1) SHE-PWM implementation method and the proposed circulating current control technique. [ABSTRACT FROM PUBLISHER]

This paper discusses and compares phase-shifted pulse-width modulation (PS-PWM) and level-shifted PWM (LS-PWM) in a modular multilevel single-delta bridge-cell (SDBC) inverter for utility-scale grid-tied photovoltaic applications. This three-phase SDBC inverter provides the capability of operating even under power-distribution imbalances not only among three clusters, but also among cascaded bridge cells in each cluster. The main focus of this research lies in analyzing the capability of operation under severe power-distribution imbalances and presenting power-balancing methods based on zero-sequence current injection, which result in an extended power-balancing capability. This paper highlights that LS-PWM is superior to PS-PWM in both power-balancing capability and harmonic performance at the ac side of the SDBC inverter when operating under power-distribution imbalances. Experimental results obtained from a three-phase 10-kW downscaled system show good agreement with those from the theoretical analysis. [ABSTRACT FROM AUTHOR]

Passivity-based analysis and controller design offer a promising approach to guarantee the stability of power systems. If all grid-connected components act strictly passive, critical oscillations cannot arise. Recent research establishes design guidelines for current-controlled voltage-source converters that allow obtaining a nonnegative real part of the converter input admittance for a wide frequency range. In this paper, the findings are extended and generalized from a control engineering point of view. Utilizing passivity indices to quantify the degree of the input admittance's passivity, the current controller design is reviewed and assessed. Further, generic and necessary passivation design criteria are proposed and carried out exemplarily for passive as well as for active damping using voltage feed-forward filters. Finally, the theoretical findings are validated by experiments. [ABSTRACT FROM AUTHOR]

In this paper, a generalized switching modification method is proposed to reduce the root-mean-square (rms) current flowing into a dc-link capacitor in a dc–dc–ac structure consisting of a boost converter and a three-phase inverter. To analyze the current flowing into the capacitor, we analyze the currents at the respective converter and inverter sides. Based on this analysis, we derive an analytical method to find the modification time between the converter and inverter pulsewidth modulation (PWM) carriers through a Fourier series and approximation to facilitate real-time implementation. Real-time implementation of the modification time calculated by the derived method is described. To verify the validity of the proposed method, experimental results are presented based on a 1-kVA dc–dc–ac prototype. The proposed method has a better capacitor rms current reduction performance than the conventional method in various inverter power factors and PWM strategies. Especially, it has an excellent performance in mid-power factor level (0.95–0.1). [ABSTRACT FROM AUTHOR]

There have been several advanced topologies proposed by the community for micro-inverter applications. However, many such applications suffer from unwanted second-order harmonic current ripple at dc input. Moreover, in the absence of suitable passive filter or ripple compensator, the second-order harmonics ripple may propagate into the dc source. This results in several problems to the system, related to system efficiency, life, cost, size, reliability, and stability. This paper proposes an adaptive sliding-mode controller to shape the output impedance of the boost-circuit of quasi-switched boost inverter such that the propagation of the ripple from dc link to the dc-input source is resisted. The quasi-switched boost inverter is one of the advanced and suitable topologies for the micro-inverter applications. The adaptive nature of the proposed controller improves the transient performance of the system at the line–load transients unlike some existing solutions, which affects dynamics adversely to achieve ripple mitigation objective. The controller ensures voltage regulation within ${5\%}$ at dc link. The proposed control technique is verified using a lab-prototype of 500 W quasi-switched boost inverter. [ABSTRACT FROM AUTHOR]

Repetitive control strategies have been commonly applied in pulse-width-modulated (PWM) voltage source inverters (VSIs) for many industrial applications. This paper presents a repetitive controller for voltage harmonic mitigation of VSI-based islanded microgrids. The phase delay in the overall control system, e.g., the delay caused by the digital duty cycle calculation, PWM generation, and repetitive controller, has to be compensated by elaborately designed phase lead filters in order to prevent control performance deterioration and system instability. Nevertheless, quantificational analysis and practical design of the time advance unit in such filters are hardly found in existing literature works. In view of this, this paper proposes an explicit analysis of the phase lead filters and a novel design method of the time advance unit in repetitive controllers to ensure system stability. Moreover, with the help of the proposed method, the overall system stability margin is predictable and improved controller performance is achieved as well. The proposed method is implemented experimentally to show the accurate stability margin calculation as well as the excellent steady state and dynamic performances of the repetitive control scheme. [ABSTRACT FROM PUBLISHER]

In this paper, a global study in terms of control architecture is applied to parallel voltage-source inverters. Parallelism of inverters represents very interesting advantages for the industrial applications to meet the high-power requirements, and it is possible to apply maintenance during the operation without interruptible operation. The main objective of this paper is to guarantee a reliable operation of the parallel inverters system during healthy and faulty conditions due to full disconnection of any inverter. Special precautions are recommended to avoid the negative effects of the circulating currents, which are caused essentially by the asynchronous pulse width modulation or existence of dispersion of the system component characteristics. To deal with this crucial problem, one-loop flatness-based control is proposed to the control of N parallel inverters and allows obtaining low total harmonic distortion. The proposed control uses the advantages of the flatness to ensure high power quality at the point of common coupling and equal currents distribution between the parallel inverters and minimize the impact of a full disconnection of any inverter on the performance. The proposed algorithm is theoretically analyzed and validated experimentally. [ABSTRACT FROM AUTHOR]

This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively. [ABSTRACT FROM AUTHOR]

In this paper, the near-state pulsewidth modulation (NSPWM), adapted to be implemented in dual-voltage-source inverter (VSI) fed open-end motor, is proposed with the aim of mitigating low-order harmonics (which lead to current total harmonic distortion (THD) minimization). The following two proposed methods are studied in detail: 1) fixing phase angle displacement (PAD) between two VSIs to 120° while adjusting the modulation index (MI); and 2) fixing MI to the predetermined value (wherein low-order harmonics are highly mitigated) while adjusting PAD. Furthermore, the proposed approaches enhance efficiency by limiting the number of commutations within the switching interval. The paper also presents the mathematical approaches to accurately determine low-order harmonic components and switching losses for dual-VSI structure. The experimental setup, including dual-VSI and open-end induction motor, is assembled in the laboratory to evaluate performance of the proposed method. Finally, the simulation results, carried out in the MATLAB/Simulink environment, are found to be in close agreement with experimental data. [ABSTRACT FROM AUTHOR]

Based on the Z-source inverter, this paper proposes a novel commutation torque ripple reduction strategy for brushless DC motor (BLDCM). The proposed strategy employs the same modulation mode in both the normal conduction period and the commutation period, and the commutation torque ripple is reduced by regulating the shoot-through vector and active vector duty cycles. The proposed detection method acquires the end point of commutation by comparing the clamped terminal voltages with reference zero level, and the signal-noise-ratio of the detection is improved by avoiding the attenuation of the terminal voltages. Furthermore, a certain pulse width of the shoot-through vector can not only reduce the commutation torque ripple but also provide a new opportunity to detect the end point of commutation. Moreover, Z-source inverter provides the buck–boost ability for BLDCM drive system, then the dc voltage utilization can be improved, and the safety of the drive system can also be improved. In addition, this paper analyzes the terminal voltages during each vector. The experimental results verify the correctness of the theories and the effectiveness of the proposed approach. [ABSTRACT FROM PUBLISHER]

In several electrical dc–ac power conversions, the ac output voltage is higher than the input voltage. If a voltage-source inverter (VSI) is used, then an additional dc–dc boosting stage is required to overcome the step-down VSI limitations. Recently, several impedance source converters are gaining higher attentions [1], [2], as they are able to provide buck-boost capability in a single conversion stage. This paper proposes the merging of the boost stage and the VSI stage in a single stage dc–ac power conversion, denoted as split-source inverter (SSI). The proposed topology requires the same number of active switches of the VSI, three additional diodes, and the same eight states of a conventional space-vector modulation. It also shows some merits compared to Z-source inverters, especially in terms of reduced switch voltage stress for voltage gains higher than 1.15. This paper presents the analysis of the SSI and compares different modulation schemes. Moreover, it presents a modified modulation scheme to eliminate the low frequency ripple in the input current and the voltage across the inverter bridge. The proposed analysis has been verified by simulation and experimental results on a 2.0-kW prototype. [ABSTRACT FROM PUBLISHER]

The paper proposes a method of active switching harmonics current reduction in the dc-link capacitor of a two-level, three-phase, back-to-back converter. Based on the derived analytical solution for switching harmonic currents in the dc-link, it is shown that by specific control over the pulsewidth-modulated (PWM) carriers’ phase angles, the targeted harmonics of the rectifier and the inverter can be synchronized in phase such that their cancellation occurs in the dc-link capacitor. This synchronization is provided by harmonic phase feedback control. A three-step procedure to implement the method is detailed in the paper. The effectiveness of the proposed approach is verified experimentally. [ABSTRACT FROM AUTHOR]

Pulse-width-modulated (PWM) converters have been widely applied for power processing, and they are typically the stems of other types of converters, such as quasi-resonant, Z-source, and switched-inductor hybrid converters. Development of PWM converters has been spanning over a century, starting from the buck converter. The well-known PWM converters include buck, boost, buck–boost, Ćuk, single ended primary inductive converter (SEPIC), zeta, Z-source, quasi-Z source, etc. Many attempts have been proposed to develop these converters based mostly on canonical cell concepts and by introducing extra LC filters to the cells. This paper presents an enhancement to the layer and graft schemes by introducing the ideas of dc voltage/current offsetting, capacitor/inductor component splitting, diode grafting, and inverse operation of PWM converters. The PWM converters, which can be operated in continuous conduction mode (CCM) or discontinuous conduction mode (DCM), therefore can be synthesized systematically according to decoded transfer gains. Decoding and synthesizing PWM converters uniquely bridge transfer gains to converter topologies and provide readers a comprehensive understanding of PWM-converter evolution from the original converter, the buck converter. Additionally, in this paper, the Ćuk, SEPIC, and zeta converters all with the same transfer gain of $D/(1 - D)$ are proved to be equivalent to the buck–boost converter with an extra LC filter. For further illustrating the proposed approaches, various types of Z-source converters, switched-capacitor/switched-inductor hybrid converters, and a single-stage interleaved converter are reviewed, and new PWM converters are developed. [ABSTRACT FROM AUTHOR]

The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper. [ABSTRACT FROM AUTHOR]

Two three-level inverters driving an open-end winding induction motor can generate equivalent voltage waveforms as a single five-level inverter-based drive. In addition, it can bring in benefits such as reduced dc-link voltage, less number of devices, and fault-tolerant capability, which is favored in high-power motor drive applications. The main challenge with this type of configuration is the appearance of large zero-sequence current circulating between the two inverters, which generates extra losses in the switching devices and the motor as well as affects the normal operation of the machine. Another challenge is to balance the dc-link neutral point voltage of the two three-level inverters. This paper has proposed a simplified decoupled space-vector pulsewidth-modulation (PWM) strategy to eliminate the averaged zero-sequence voltage in each switching cycle by the placement of redundant vectors of each individual inverter using a time shift. Neutral point voltage balance is further achieved by adjusting the time duration of the redundant vectors. In this paper, it is shown that it is possible to operate this kind of drive configuration with a single dc power supply and achieve averaged zero-sequence voltage elimination and neutral-point voltage balancing at the same time. Experimental results of a 5.5-kW dual three-level inverter drive using the proposed PWM strategy are presented, which validates the control method and drive configuration. [ABSTRACT FROM PUBLISHER]

This paper introduces a three-phase grid-connected inverter for commercial-scale photovoltaic systems. The circuit topology combines an ac-inductor-less active bridge with a parallel-connected pulsewidth modulation inverter acting as an instantaneous reactive power compensator. The active bridge, called a 120° conduction inverter, operates at a switching frequency equal to the grid frequency and outputs a 120° rectangular current, while the compensator eliminates the harmonic currents included in the rectangular current. The main advantage of this strategy is the reduction in size of the required ac inductor by a factor of 4, as well as the reduction of power losses in the switching devices. The theoretical analysis clearly shows that the compensator can synthesize a sinusoidal output current by controlling only instantaneous reactive power, thus eliminating the need for electrolytic capacitors. A 5-kW experimental setup validates the operating principle and the control method of the proposed inverter and exhibits an inverter efficiency as high as 99.2% with Si superjunction mosfets. [ABSTRACT FROM AUTHOR]

Among multilevel converter topologies, the cascaded H-bridge (CHB) converter is one suitable solution for multiple applications, such as flexible ac transmission systems and motor drives. CHB presents a natural high modularity because it is formed by the serial connection of H-bridges. This paper deals with a CHB where the cells do not have the same aging because the maintenance during the years of operation forces to replace some damaged cells of the converter with new or repaired ones. A method based on clamping one power cell can be used to reduce the power losses of that cell reducing its temperature and increasing its lifetime. However, clamping one cell of the CHB introduces high harmonic distortion around twice the carrier frequency due to the CHB unbalanced operation when a conventional phase-shifted pulsewidth modulation (PWM) is applied. A deep harmonic distortion analysis of the CHB output voltage with thermal control based on clamping one cell is presented. Using this analysis, the harmonic distortion at twice the carrier frequency is eliminated applying a nonconventional phase-shifted PWM where the angles between the carriers of consecutive power cells are modified. Experimental results show how the thermal control applying the clamping of a power cell is achieved while the harmonic distortion around twice the carrier frequency is eliminated. [ABSTRACT FROM AUTHOR]

In the renewable energy generation systems, the grid-connected inverter with LCL filter (GCI-LCL) is an important device to realize dc–ac power conversion and connect the distributed power generation system and power grid. However, the resonance problems of the LCL filter may bring instability to GCI-LCL. Besides, the grid impedance and the time delay in digital controllers also have a harmful influence on the stability of GCI-LCL. To solve these problems, a dual-current active damping control strategy based on the inverter-side current and grid-connected current feedback for GCI-LCL is proposed in this paper, and the systematic parameters design process is investigated. Compared with the conventional damping strategies, a resonance suppression for the LCL filter, a larger stability margin, and a better anti-interference capability in a weak grid can be achieved under the proposed strategy. In addition, by analyzing the active damping effect of the proposed strategy, a simplified model in a low-frequency band for GCI-LCL is proposed to enhance the anti-interference capability in the weak grid and simplify the parameters design process. Finally, a GCI-LCL prototype is constructed and the experiment results verify the correctness and feasibility of the analysis and proposed strategy. [ABSTRACT FROM AUTHOR]

This paper proposes a three-phase four-leg drive for dc-biased sinusoidal current vernier reluctance machine (DC-VRM). By adding an asymmetrical neutral leg to the conventional three-phase inverter, the dc field excitation current can be generated. Compared to the open-winding inverter (conventional drive topology), the three-phase four-leg inverter greatly reduces the number of power devices, and the asymmetrical neutral leg does not have short-circuit straight-through risk. The topology ensures that the stator current can flow in both directions and maximum torque per copper loss can be obtained in DC-VRM. Equivalent carrier-based pulsewidth modulation (PWM) strategy is proposed to produce the dc-biased sinusoidal current and maximize the dc bus utilization. The proposed carrier-based PWM has several different equivalent methods. Compared to the conventional DC-VRM drive, the power loss of the proposed drive with equivalent space vector PWM (SVPWM) can be reduced significantly and can be further reduced by discontinuous PWM minimum (DPWMMIN) in the rated condition. The proposed drive has the characteristics of low cost, high power density, and high efficiency compared to the conventional DC-VRM drive. [ABSTRACT FROM AUTHOR]

This paper presents a five-phase dual random space vector pulsewidth modulation (FPDR-SVPWM) strategy with an optimized probability density function (PDF) for a five-phase voltage-source inverter, and its performance and evaluation are also analyzed. Based on the nearest four vectors modulation method, the FPDR-SVPWM strategy, combined with random switching frequency and random zero vector, is investigated to significantly reduce the amplitude of high-order harmonics near the switching frequency and its integer multiples. For the nonsinusoidal power supply, third harmonic injection is introduced in this modulation strategy as well. Considering the effect of random numbers on the performance, an optimized Beta distribution is studied in detail. In order to analyze harmonic dispersion degree qualitatively and quantitatively, the power spectral density and the harmonic spread factor are both employed to assess the performance of the FPDR-SVPWM strategy. A series of results of simulation in MATLAB and experiments based on field programmable gate array demonstrate that the proposed modulation strategy is correct and valid, and it distributes high-order harmonics into a wide range without affecting the fundamental wave and third harmonic. [ABSTRACT FROM AUTHOR]

To reduce the common-mode voltage (CMV) and eliminate the CMV spikes for two-level voltage source inverters (2L-VSIs), an improved model predictive control (MPC) based CMV reduction method is proposed in this paper considering dead-time effects. First, an improved voltage vector (VV) preselection strategy is proposed to reduce the CMV spikes caused by the dead time. Second, a new hybrid VV preselection strategy based on a delay compensation strategy and a modified current sector division strategy is proposed to completely eliminate the CMV spikes. As the proposed hybrid VV preselection based MPC strategy makes full use of the six nonzero VVs of the 2L-VSI, the current total harmonic distortions and ripples are reduced. The simulation and experiments are carried out to verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

Multilevel inverters are now-a-days being applied in electric vehicles (EV). Considering the dynamic operating conditions of an EV propelled by an induction motor, this paper proposes a flexible discontinuous modulation strategy for three-level neutral-point-clamped (NPC) inverter that can shift modulation pattern seamlessly from sinusoidal pulsewidth modulation (SPWM) to discontinuous PWM (DPWM). The modulation scheme is generalized at each degree of discontinuity to ensure minimum switching losses for variable load power factors. Additionally, a hybrid voltage balancing strategy, which comprises two sets of compensating offset signals with complementary features, has been introduced to mitigate voltage deviation problem at neutral point of the inverter. The unique feature of the proposed hybrid balancing approach is that it generates uniform compensating neutral current regardless of the level of discontinuity. This results in identical and predictable voltage balancing dynamics for the entire modulation transition covering SPWM and DPWM. It has been shown that the proposed hybrid balancing strategy does not lose its unbalance compensation strength even during transition from one modulation pattern to another. The effectiveness of the proposed scheme for wide variations in operating conditions is studied through extensive simulation, and validated in experimentation using a prototype NPC inverter with induction motor loads. [ABSTRACT FROM AUTHOR]

Three-phase solar inverters can be operated with different modulation strategies such as sinusoidal pulsewidth modulation (SPWM), space vector modulation (SVM), and third-harmonic injection PWM (THIPWM). The selection of the modulation strategy can significantly affect photovoltaic (PV) leakage currents and power losses and compromise the inverter performance. This paper presents a detailed analysis of traditional and modified modulation effects on power semiconductor losses and PV leakage current. The research focuses on a three-phase three-level T-type neutral point clamped (3L-TNPC) solar inverter. A detailed exploration of traditional SPWM and SVM is presented, and a new modified modulation strategy referred to as two-triplen harmonic injection PWM (2THIPWM) is proposed, which can substitute the SVM scheme. Analytical expressions are derived for the proposed 2THIPWM strategy, which can be used for the SVM power-loss approximation. The comparison between 2THIPWM and SPWM shows a conduction-loss difference greater than the 5% normalized range. The modulation strategies are discussed with respect to the PV common mode current signature, and specific design techniques in modulation lead to reduced leakage currents for safety compliance. The theoretical and experimental results obtained using a 3L-TNPC solar inverter are presented to evaluate the modulation strategies and their impact on performance. [ABSTRACT FROM AUTHOR]

This paper proposed a novel method for two-segment three-phase motor to eliminate the harmonics nearby pulsewidth modulation (PWM) frequency. Due to PWM technique and switching losses considerations, ear-piercing high-frequency electromagnetic noise in drive system is common. By using magnetically coupled inductors (MCIs) and interleaved technique, the proposed novel method is able to remove the high-frequency harmonics located nearby the PWM frequency and other odd multiples in two-segment three-phase motor. With this method, the unpleasant acoustic noise could be removed when the PWM frequency is selected near 10 kHz. The size of MCIs mainly depends on the PWM frequency harmonic currents rather than the fundamental frequency currents. Thus, its size is very small compared with LC filter. Moreover, this method remains the control dynamics of two-segment three-phase motor without additional inductance for fundamental-frequency currents. The shift phase of two inverters PWM carriers is π, which is simple to implement. Finally, the effectiveness of the proposed method is verified by experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a general control scheme for the dual-input three-level inverter, which comes from a neutral point clamped three-level inverter. It can be used for photovoltaic (PV) systems or battery storage systems with two dc sources. The dual-input three-level inverter can be connected with two PV arrays, which are able to realize maximum power point tracking independently. First, the dynamic model of the dual-input three-level inverter is established, which describes the relationship between the dual-input voltages and the duty cycle. After discussing the control theory of the dual-input voltages, a typical control scheme is proposed. The design of a control loop is introduced in details. Afterward, modulation and restriction of the proposed method are discussed. Finally, experiment on a 125 kW dual-input three-level PV inverter is implemented to verify the validity and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

This paper proposed a novel family of pulsewidth modulation (PWM) strategies for single-phase quasi-switched boost inverter (qSBI). By combining shoot-through (ST) mode in the inverter's switches and the turning-on state of an additional switch, the qSBI produced a high voltage gain without adding any passive components. Compared to the conventional PWM strategy for the same input and output voltage gain, the introduced PWM strategies for qSBI could reduce voltage stress across semiconductors and capacitor with the following additional merits: having smaller high-frequency inductor current and capacitor voltage ripples, using high modulation index with low ST duty cycle, and having higher efficiency. Circuit analysis, operating theories, and simulation results of the single-phase qSBI with the introduced PWM5 strategy are shown. A 500-W laboratory prototype was constructed and the effectiveness of the introduced PWM strategy was validated. The qSBI with the proposed PWM strategies is suitable for applications where the required voltage gain lies between 2 and 3. [ABSTRACT FROM AUTHOR]

Most photovoltaic (PV) systems are composed of series and parallel inverters. The electromagnetic interference (EMI) mainly comes from the off–on of inverter switches with pulsewidth modulation (PWM). The output EMI peaks of PV systems would increase markedly due to the interference superposition effect caused by parallel inverters, whose carrier initial phases are in phase or close to each other. In this paper, an auto-screening carrier phase-shift scheme is proposed to weaken the superposition effect of EMI peaks and to get the result of reverse offset at its best. In a PV system, through voltage detections and spectrum estimations of each inverter with a series of phase-shift carriers, a best carrier phase of each inverter is obtained automatically to minimize EMI peaks of the PV system. In order to avoid the conflict that the screening processes of two or more inverters are underway at the same time, a specific frequency signal is output temporarily as an occupancy mark in one of the inverters. The feasibility and effectiveness of the proposed scheme are verified by experimental results in a PV system composed of four parallel single-phase inverters. [ABSTRACT FROM AUTHOR]

A discontinuous pulsewidth modulation (DPWM) strategy for three-level neutral-point-clamped (NPC) traction inverter drive for electric vehicles (EVs) with minimum switching loss for the full power factor (PF) range is developed and presented in this paper. Considering the dynamic loading conditions in an EV propelled by an induction motor (IM), the discontinuous modulation strategy is generalized to obtain minimum switching loss for a wide variations in load PF and modulation depth. The dynamic operating conditions in EV may render frequent unbalances in dc-link capacitor voltages in NPC inverter. It is demonstrated that the addition of an appropriate offset signal with the reference discontinuous signals generates compensating neutral current in the right direction, which can be used to mitigate existing unbalance in two dc-link capacitor voltages. Minimum switching loss at variable PF is attained by positioning the nonswitching clamped regions of the reference auxiliary signals according to the load PF. The effectiveness of the proposed scheme for a wide range of torque/speed variations is studied through simulation by developing a MATLAB/SIMULINK model of an IM traction inverter drive with field-oriented control strategy for closed loop control. Finally, the modulation scheme is validated through experimentation in a small-scale prototype NPC inverter with motor loads. [ABSTRACT FROM AUTHOR]

In this paper, a novel space-vector pulsewidth modulation technique for a five-level active neutral-point clamped (5L-ANPC) inverter is proposed to eliminate the common-mode voltage (CMV). For the 5L-ANPC inverter, which produces a good output voltage performance and lowdv/dt, the total 125 voltage vectors can be generated, among which the proposed scheme employs only 19 voltage vectors producing a zero CMV. Due to the limitation of voltage vectors selected, the dc-link capacitor voltages of the 5L-ANPC inverter cannot be balanced by themselves. Therefore, the capacitor voltages of the inverter should be controlled by choosing the redundant switching states appropriately. The validity of the proposed modulation scheme has been verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

This paper presents a two-segment motor system powered by two inverters with phase-shift pulsewidth modulation (PWM) to fulfill the purpose of low-torque ripple and vibration noise. Different from conventional multi-inverter structure, the inverters for this type of machine are electrically isolated between each other. First, the concept of multisegment machine is presented and the basic operation principle is analyzed with finite-element analysis (FEA) method. Then vibration caused by the switching device in machine is investigated and the control model of a two-segment motor is developed. Further, the principle of carrier phase-shift PWM is illustrated with the vibration analysis. Carrier phase shift can generate interleaved torque and force on the rotor for the two groups of windings in the machine and cancel each other for certain harmonics. Then simulation of control strategy for this type of machine has been done in MATLAB. Finally, based on the concept and principles mentioned before, a two-segment motor with its drive system is fabricated. Both the test of torque ripple and the vibration of the motor have been significantly improved. Compared with a normal three-phase motor driven by a paralleled inverter with interleaving, the proposed approach is with comparable vibration reduction but without using extra coupled inductors. [ABSTRACT FROM AUTHOR]

In voltage-source inverters (VSIs), dead time is used to prevent shoot-through over switching devices. However, the existence of the dead time will distort the output phase current, which degrades the performance of the inverter as well as influences the common-mode voltage (CMV), particularly in CMV elimination relevant modulation schemes, such as zero-common-mode (CM) pulsewidth modulation (PWM)-based paralleled inverters. In the light of the situation that the normal sampling-based dead-time compensation (DTC) methods are often disturbed by the current ripple, this paper introduces a novel DTC method for the VSI, which can mitigate the impact of the current ripple and improve the accuracy of DTC. The proposed method deduces the real-time current ripple, which can reconstruct the actual trajectory of phase-leg currents, and the peak values corresponding to rising and falling edges for PWM signals can be predicted. In this way, DTC can be implemented based on the direction of relevant instantaneous switching currents and finally improves the accuracy. Especially, the current-ripple-prediction-based DTC can help to improve the CMV distortion caused by the dead time for paralleled inverters with zero-CM PWM. Simulation and experimental results are provided to validate that the proposed method can be applied to different topologies and modulation schemes with good performance. [ABSTRACT FROM AUTHOR]

This paper proposes a transformerless line-interactive uninterruptible power supply (UPS) with low ground leakage current. A high-efficiency bidirectional inverter is suggested, which performs the line-interactive UPS functions with low ground leakage current. It has a full-bridge inverter and a bidirectional switch, which operate with the unipolar pulsewidth modulation. Because the bidirectional switch operates at the line-frequency, switching losses can be lower than the previous transformerless inverters. As the inverter operates, the parasitic capacitance between the inverter and the ac voltage ground is clamped to zero voltage for a positive line cycle and to the ac voltage for a negative line cycle, respectively. Thus, the parasitic capacitance can be prevented from being charged or discharged, which ensures the absence of the ground leakage current. The operation modes of the proposed system are described. The control schemes are presented to design the proposed inverter for the line-interactive UPS. Experimental results for a 2.0 kW prototype are discussed to verify the performance of the proposed system. [ABSTRACT FROM AUTHOR]