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This paper presents the design, analysis, and verification of a novel reaching law for discrete-time sliding-mode control. The control gains of the reaching law are automatically regulated by the power function and the exponential term that dynamically adapts to the variation of the switching function. The reaching law also employs the perturbation estimation and the difference function to redefine the change rate as the second-order difference of the uncertainty. Compared with previous methods, the proposed reaching law has the capability to amend the control gains in a wise manner, further mitigate chattering, and guarantee a smaller width of the quasi-sliding-mode domain (QSMD). In order to describe the system dynamics in the reaching phase and the sliding phase with respect to control gain values, both the decrement band and the QSMD (ultimate band) of the proposed reaching law are theoretically analyzed. The reaching steps for the switching function to converge toward the sliding surface are also obtained. The effectiveness of the proposed method is verified through numerical simulations and experimental investigations on a piezoelectric actuator. [ABSTRACT FROM AUTHOR]

Two parallel interleaved two-level (2L) three-phase voltage source inverters (VSIs) can be analyzed as a single three-level (3L) VSI. A generalized carrier-based method is proposed in this paper for implementing different 3L pulsewidth modulation (PWM) techniques using two parallel interleaved 2L VSIs. The proposed method modifies the given three-phase reference signals of 3L VSI for implementation of the PWM technique using two parallel interleaved 2L VSIs. The influence of nonidealities on the equivalent 3L PWM switching sequences is also discussed. To overcome the effect of nonidealities, a new modified discontinuous PWM technique (MDPWM1) is proposed. The analysis of different performance indices is carried out for different 3L PWM techniques, and the key advantages of different PWM techniques are identified. Simulation and experimental results are also presented. [ABSTRACT FROM AUTHOR]

In this paper, a high step up converter consisting of an integrated quadratic-boost converter and a voltage doubler is proposed. The integration of the quadratic-boost converter makes the system easier to lift up its voltage gain through slightly increasing the duty ratio of the single switch. The voltage doubler further increases the voltage gain of the system as the turn ratio rises. The voltage stresses on the switch and the diodes are decreased for such cascaded topology. Different operation modes are analyzed and mathematical analysis of the converter is presented in detail. The leakage inductance contributes to realizing zero current switching of the diodes in the second boost stage and the doubler and the energy can be recycled to the load. A 38-W prototype is built to work as a vehicle LED driver. Experiments are conducted to verify the advantages of the proposed converter and the efficiency is 90% at the nominal operating point. [ABSTRACT FROM AUTHOR]

Active pulsating power buffering (PPB) function can effectively reduce the twice-line frequency energy storage requirement in a single-phase rectifier. Existing single-phase solutions with active PPB must utilize more than two active switches in their circuits. Compared with conventional single-active-switch solutions without active PPB (e.g., a boost power-factor-correction (PFC) rectifier), the cost of additional semiconductor switches and gate drive circuitry in an active PPB-based rectifier may not be justified for low-power applications. This paper presents a family of single-switch single-phase rectifier with active PPB. Taking advantage of the on-time and off-time of a single switch, the proposed rectifiers are formulated by merging two converters that are duty and frequency controlled. The steady-state characteristics of these converters are analyzed. A step-by-step design procedure is provided, and an active control method for limiting the maximum switching frequency for wide-load-range operation is presented. A 100-W prototype is built for the demonstration of the proposed single-switch rectifier concept. It is envisaged that this concept, when combined with other circuit formulation techniques, e.g., partial power processing, dc-voltage feedback, may lead to new derivatives of single-switch rectifiers with more advanced features. [ABSTRACT FROM AUTHOR]

In this paper, the requirements of device cross section and aspect ratio (AR) are examined to facilitate steep switching in heavily doped 3-D multiple gate junctionless (JL) transistors. It is shown through well-calibrated simulations and physical insights that the sharp OFF-to- ON switching action is predominantly governed by the area of cross section (${A} _{\textsf {cross}}$) instead of the gate length. A 3-D JL architecture preferably oriented toward a planar topology, i.e., with wider fin and low AR, is conducive for steep switching as a greater bulk area is available for impact ionization. On the contrary, narrow vertical architectures with AR > 1 suppress ${A} _{\textsf {cross}}$ in the bulk and are less likely to support the steep current transition. Steep switching specific scaling methodology is showcased to attain a sharp increase in drain current with a sub-60 mV/decade swing in a tri-gate JL transistor along with an associated negative value of total gate capacitance. [ABSTRACT FROM AUTHOR]

In this paper, a new modified single-switch single-ended primary inductor converter (MS2-SEPIC)-based high step-up dc–dc converter is presented. The proposed topology uses the coupled-inductor (CL) technique and a voltage tripler rectifier, which results in a high voltage gain for the converter. Here, the switching loss has been reduced significantly owing to the quasi-resonance operation of the circuit created by the leakage inductance of the CL along with circuit capacitors. The operational principles and steady-state analysis are discussed. Experimental results based on a 100 W laboratory prototype verify the validity of theoretical analysis. [ABSTRACT FROM AUTHOR]

In this paper, a fixed switching frequency model predictive current controller is designed and implemented on a sensorless five-level packed U-cell (PUC5) inverter interfacing the utility. The predictive control methodology is based on a voltage vector generation technique for the cost function optimization by nullifying its derivative. The aim of the controller is to allow a fixed-frequency operation with no iterations while operating as a utility line current regulator. A pulsewidth modulator based on employing PUC5 redundant switching states fixes the PUC5 auxiliary dc bus capacitor voltage to its desired level with no necessity of a regulator; the overall technique reduces system complexity with less sensors and no loops in the predictive algorithm making it suitable for industrial applications. System discrete model is developed and experimental results verify the performance of the designed controller in making a fast response in regulating the grid current and balancing the capacitor voltage. [ABSTRACT FROM AUTHOR]

When the selected harmonic elimination pulsewidth modulation (SHEPWM) is adopted to three-level neutral-point-clamped converters to reduce the switching frequency, the neutral-point potential (NPP) problem becomes more severe compared with other modulations. It is because there is no degree of freedom for SHEPWM to control the NPP. SHEPWM realizes a better harmonic performance by calculating the switching angles offline based on harmonic requirements. Since it is harsh to solve the angles online, we cannot change the angles to control the NPP. Aiming at the low-frequency NPP fluctuation minimum, a novel current harmonic minimum method based on the optimal third-order/ninth-order harmonic is proposed in this paper. The optimal third-order/ninth-order harmonic is derived based on the relationships among the third-order/ninth-order harmonic and the NPP. They can be utilized to realize the low-frequency NPP fluctuation minimum without changing any switching angle online. Moreover, some comparisons, such as the solution ranges, weighted total harmonic distortion, the initial value of iteration calculation, show that the proposed method has a good output performance. Finally, the experimental results are given to verify the validity of the proposed method. [ABSTRACT FROM AUTHOR]

In photovoltaic systems, dc–dc converters have been identified as one of the most critical and challenging subsystem in terms of failure rate. Thus, this paper proposes fault-tolerant operation of a two-stage buck/buck–boost converter under open-circuit switch failure. Remedial actions are efficient in any failure of one of the two switches of the converter. Here, a new unified approach is considered, for the overall fault-tolerant operation of the two stages of the converter. The fault-tolerant circuit we propose lies on performing redundancy by implementing the equivalent synchronous switch for the two main switches of the two stages, in offline mode. The fault-tolerant circuit results from the basic two-stage buck/buck-boost converter and its equivalent circuit with a synchronous switch, merged together to form the new dc–dc fault-tolerant circuit. Therefore, postfault operation at full power can also be performed. By using a switch fault management unit with reduced complexity, inserted between the control block and the switches, we have designed an unified, efficient, and optimized fault-tolerant control, suitable in both healthy and postfault operations. Some selected experimental tests, which all confirm the good performances of the proposed fault-tolerant approach, are presented and discussed. [ABSTRACT FROM AUTHOR]

Flyback converter has advantages of simple circuit configuration and easy control. However, it suffers two problems. One is the active switch is hard switching. The other is a very high voltage spike when the active switch is turned off. In order to solve these problems, this paper presents a novel dc-to-dc converter that mainly consists of two interleaved flyback converters. Both active switches can achieve zero-voltage switching on without the use of any active clamp circuit or snubber circuit. In addition, the leakage flux energy can be delivered to the output by using two added diodes. It helps to reduce the voltage spikes on the active switches and improve circuit efficiency. The steady-state analyses at different operation modes and the mathematical equations for parameters design are provided. Finally, a 200-W prototype circuit for driving high-brightness light-emitting diodes (LEDs) is built and tested to verify the feasibility of the proposed circuit. The LEDs are dimmed from 100% to 10% full power. Satisfactory performances are obtained from the experimental results. [ABSTRACT FROM AUTHOR]

This paper proposes a family of multiport switched-capacitor multilevel inverter (SCMLI) topologies for high-frequency ac power distribution. It employs asymmetric dc voltage sources with a common ground that makes it ideal to be employed in renewable energy farms and modern electric vehicles. The proposed family of step-up SCMLI attains higher number of output voltage steps with optimum component count in comparison to several existing topologies. The problem of capacitor voltage balancing is solved as the capacitors are inherently charged to a finite voltage every half cycle. In-depth study on two staircase modulation strategies, namely, selective harmonic elimination and minimum total harmonic distortion (THD) scheme is presented with study on the variation of switching angles and THD with modulation indices under both schemes. Working principle and analysis are presented for the proposed family of topologies. Simulation outcomes are validated with experimental results under both the aforementioned modulation schemes with equal and unequal output voltage waveform steps. [ABSTRACT FROM AUTHOR]

Soft-switching inverters can achieve high efficiencies and low switchdv/dtanddi/dt, but often impose additional stress on the switches due to their resonant behavior. Multicell converters, on the other hand, can process high voltages by arranging the switches to share the stress. This paper proposes a buck–boost multicell soft-switching inverter with inherent cell voltage balancing. Both the current and voltage stresses are shared by the cells. Soft-switching conditions are achieved for all switching transitions without any need for auxiliary circuitry or clamps. A multiple-winding transformer transfers energy between the terminals and provides galvanic isolation. An analytical study and experimental results on a 1200-W prototype verify the operation of the inverter. [ABSTRACT FROM AUTHOR]

In this paper, a sequence switching control (SSC) scheme based on an auxiliary parallel inductor is proposed to improve the transient performance of buck converters. The proposed SSC scheme introduces a small controlled inductor in parallel with the output inductor, so as to increase the inductor-current slew rate when it is activated during a load transient. Furthermore, an “n+ 1” sequence switching strategy is proposed to control the auxiliary parallel inductor. The proposed scheme divides the transient event inton+ 1 periods. In the formernperiods, the same small output voltage deviations are designed, while in the last period, a smaller deviation is done for a smooth transition from the transient to the steady state. The switching sequence is derived applying the capacitor–charge balance principle for each ofn+ 1 periods. For a given buck converter in the experiment, the settling time and the output voltage deviation of the proposed SSC scheme enhance more than 50% and 67%, respectively, over those of the time-optimal control for a 3-A load step. [ABSTRACT FROM AUTHOR]

A new light emitting diode (LED) driver circuit is presented in this paper based on the buck converter with coupled inductors for automotive applications. Soft-switching condition is provided for the switch via a passive resonant circuit incorporating the leakage inductance of the coupled inductors. Also, the leakage inductance energy is recycled to the output. The proposed converter has a very simple structure as well as high efficiency, which makes it a good candidate for battery-operated applications. The proposed converter only applies one magnetic element and the leakage and magnetizing inductances are used as resonant elements. Also, during the resonance, a resonance capacitor is approximately charged to the input voltage, and therefore, the capacitor voltage stress and semiconductor devices voltage stress are low. These are the main advantages of the proposed converter over other similar converters. The theoretical analysis is provided and the operating principles and design considerations are explained. An 8 W laboratory prototype is implemented in order to prove the validity of the theoretical analysis. [ABSTRACT FROM AUTHOR]

Series connection of individual semiconductors is an effective way to achieve higher voltage switches. However, the inherent unequal dynamic voltage sharing problem needs to be solved, even when well-matched gate drivers and semiconductors are used. A majority of the existing voltage balancing schemes are developed for slow-switching silicon (Si)-based semiconductors, and are also associated with a significant amount of additional losses in the control circuit or on the switches. In this paper, a novel method is proposed for balancing the dynamic voltages among series-connected silicon carbide (SiC) MOSFETs with highdv/dtrates. The method takes advantage of a small capacitor to provide additional current to the gate of the MOSFETs at turn-off, meaning the switching speed (and thus, the device voltage after turn-off) is controlled. The proposed method generates negligible losses in the control circuit, and also does not significantly increase the switching losses of the semiconductors. Experimental results are provided to prove the effectiveness of the proposed voltage balancing scheme on two SiC MOSFETs inside a module connected in series. In order to do so, an active gate driver is designed embedding the activedv/dtcontrol scheme as well as other essential functionalities needed for operation of SiC MOSFETs. [ABSTRACT FROM AUTHOR]

DC-link current ripple is one of the important factors for operating the current-source converter. In practice, the dc-link current ripple can be reduced by increasing the switching frequency or inductance. However, it may result in the higher switching losses, larger size, or higher cost. In order to deal with this problem, the inherent limitation of the conventional solution is discussed in this paper. The time-domain equation of the dc-link current is established for the first time. And then, a new space vector control strategy is proposed to reduce the ripple with no need of increasing the switching frequency or inductance. The space vector is divided into 12 sectors, where the dc-link current ripple can be effectively reduced by the optimal vector sequence. Finally, the proposed method is implemented on the TMS320F28335DSP + XC3400FPGA digital control hardware platform. The experimental results verify the effectiveness of the proposed strategy. [ABSTRACT FROM AUTHOR]

A time-division duplex (TDD) transmit/receive (T/R) millimeter-wave (mm-wave) front-end comprises a power amplifier (PA), a low-noise amplifier (LNA), an antenna switch, and appropriate passive matching and combining networks. In this paper, a synthesis methodology is proposed that minimizes the overall losses by combining the PA output and the LNA input matching networks together with the T/R switch into one network. The technique improves mm-wave transceiver performance in terms of PA efficiency and LNA noise figure. The proposed T/R combiner can achieve high linearity and can handle large PA output voltage swings. The architecture can be implemented in any process which provides high integration capability. A Ka-band implementation is demonstrated using 45 nm CMOS silicon-on-insulator that includes a high power, four-stack-based PA and an inductively source-degenerated cascode-based LNA. Within the front-end, the PA achieves saturated output power of 23.6 dBm with peak power added efficiency of 28%, while the LNA achieves NF of 3.2 dB. The overall chip area is 0.54 mm2, including pads. [ABSTRACT FROM AUTHOR]

A dual-input high step-up DC/DC converter with zero voltage turn-off (ZVT) auxiliary circuit is presented in this paper. The cost of whole photovoltaic (PV) power could be decreased significantly by the proposed converter because it allows two PV panels to be connected at the same time. ZVT auxiliary circuit provides soft switching in a wide range of load variations with six passive components. Turn-off switching losses could be decreased and the efficiency of the whole converter could be improved. In , the operation principle and performance characteristics of the proposed converter have been analyzed and an 800 W experimental prototype has been built to validate the analytical results in. In , a dual-input maximum power point tracking (DMPPT) control algorithm has been designed for the proposed converter. Experimental results show that two PV panels can achieve the maximum power output state separately by the proposed DMPPT control algorithm. [ABSTRACT FROM AUTHOR]

This paper presents a self-powered interface circuit to extract energy from ambient vibrations for powering up microelectronic devices. The circuit interfaces a piezoelectric energy harvesting micro electro-mechanical systems (MEMS) device to scavenge acoustic energy. Synchronous electric charge extraction (SECE) technique is deployed through the implementation of a novel multistage energy extraction (MSEE) circuit in 180 nm HV CMOS technology to harvest and store energy. The circuit is optimized to operate with minimum power losses when input power is limited, and adapts well to operating conditions with higher input power. The highly accurate peak detector was validated for a wide piezoelectric frequency range from 20 Hz to 4 kHz. A charging efficiency of about 84% has been achieved for 4.75 V open-circuit piezoelectric voltage excited at 390 Hz input vibration under nominal input power range of 30–80 μW. Power optimizations enable the circuit to maintain a conversion efficiency of 47% at input power level as low as 3.12 μW. MSEE provides up to 15% efficiency improvement compared to traditional SECE, and maintains power efficiency as high as possible for a wide input power range. [ABSTRACT FROM AUTHOR]

A simple buck–boost LED driver suitable for battery operated applications with limited input voltage level is presented in this paper. Soft switching performance is provided for the main switch via a resonant circuit to improve the converter efficiency. The incorporated auxiliary switch also performs under zero voltage switching condition. Both power switches can be driven with a simple gate drive circuit, so, the additional switch does not add any driving complexity. In addition, only one magnetic element is utilized in the proposed LED driver which contributes to circuit simplicity and lower weight and size. Also, all diodes turn off at zero current switching which eliminates the reverse recovery losses and improves efficiency. A laboratory prototype converting 12 V input voltage to 32 V output operating at 26 W output power is implemented and tested to verify the effectiveness of the proposed LED driver. [ABSTRACT FROM AUTHOR]

A 1-φ hybrid nine-level inverter (H9LI) topology has been proposed in this paper. The proposed H9LI topology uses a simple phase disposition pulsewidth modulation strategy to generate nine-voltage levels in the output. The main advantage of this topology is that it has a low switch count (ten switches) compared to the existing nine-level inverter topologies. To regulate the voltage across auxiliary capacitor, two innovative control techniques are proposed, which are integrated with the inverter modulation technique itself. Hence, it does not require any extra voltage balancing circuits to maintain the voltage across the auxiliary capacitor and input dc capacitors. A major advantage of these control techniques is that they eliminate the sensing of the coupled inductor current. Another significant advantage of H9LI is that loss distribution among all the power switches is more uniform compared to existing nine-level inverters. Due to low part count and absence of extra voltage balancing circuits, the H9LI achieves higher efficiency (η ≍ 94.5%) and lower cost. Furthermore, the requirement of filter size reduces due to the presence of coupled inductor in H9LI. The proposed 1-φ grid connected H9LI is verified through MATLAB/Simulink simulations and validated through experiments on a laboratory prototype of 400-VA rating. [ABSTRACT FROM AUTHOR]

Piezoelectric vibration energy harvesting (PVEH) has been proved to be much promising in making low power electronics completely self-powered due to wide availability and high energy density. Self-powered synchronized switching harvesting on an inductor (SSHI) circuits have been proved to greatly increase the performance of a PVEH device and peak detector-based self-powered switches are widely used. In practice, however, the switch is impossible to turn on simultaneously at peak displacements due to nonlinear components so that switching delay (SD) always exists. Furthermore, the SD will degrade the performance of PVEH devices, so it must be reduced. Therefore, for this kind of SSHI circuits, the purpose of this paper is to explore basic causes of generating SD and investigate the corresponding solution. First, theoretical model of SD in self-powered parallel SSHI (SP-PSSHI) is derived and the SD is first proved to be positive. Then, effects of key component parameters on the SD are studied. Based on above results, an improved SP-PSSHI (ISP-PSSHI) circuit is proposed by adding a voltage divider and its SD is proved to be less than that of the SP-PSSHI circuit. Next, the key factor is discussed, namely the divider resistor. Circuit simulations validate theoretical results and also expose that there are optimal resistor and capacitor of the envelope detector for achieving the maximum harvested power. In the end, experimental results show that the ISP-PSSHI circuit can improve the averaged harvested power about 11% more than that of the SP-PSSHI circuit under choosing optimal components. [ABSTRACT FROM AUTHOR]

This paper proposes a novel FPGA-based matrix-inversion technique that is specifically tailored and optimized for real-time electromagnetic transients simulation of power electronic converters with high switching frequency. This is the first reported solution that is capable of solving the real-time equations related to using ideal switch model and the associated circuitry in very small time-steps (e.g., an average of 36 ns in a three-phase back-to-back converter case study), without requiring large amount of memory, being limited to small number of switches, adding parasitic elements, or depending on a priori knowledge of the circuit operation or switching strategy. The accuracy of the proposed real-time simulator is verified against the results from experimental measurements. [ABSTRACT FROM AUTHOR]

Resistive random access memory (ReRAM), a new emerging nonvolatile memory technology based on changes in electrical resistivity of a dielectric film, offers promising advantages such as scalability, fast switching, and low operation voltage. However, for ReRAM to become a successful technology, it is necessary to accurately control the stochastic nature of the conductive nanoscale filaments (CNFs) that governs the resistive switching (RS) behavior of the device and limits its long-term stability and reliability. In this paper, we developed a highly scalable nanostructured/textured electrode that is composed of an array of Al nanotips based on an anodic aluminum oxide template. The nanotips improve the RS characteristics by intensifying the electric field at the apex of each nanotip which is demonstrated using numerical simulations. The localized electric field induces the repetitive nucleation/ formation/rupture of the CNFs in a more controlled fashion compared to a flat Al electrode. As a result, the nanotip sample exhibits uniform and reduced forming/reset voltages as low as 4.70 ± 0.98V/1.00 ± 0.19 V, stable endurance, and long-term retention. As a result, we were able to achieve ultralow-power and error-free operation of 100 cells covering a large area, significantly demonstrating improved uniformity and reliability compared to devices made using flat Al electrodes. This universal bottom-up strategy of self-organized nanostructured-electrodes provides a pathway toward large-scale, highly reliable, and RS memory devices. [ABSTRACT FROM AUTHOR]

Global positioning system (GPS) based indoor positioning techniques generally utilize repeaters to amplify and retransmit the original GPS signals to indoor receivers. In this paper, a GPS repeater based indoor positioning approach is proposed. Unlike most repeater-based indoor positioning techniques in current literature, repeaters are not required to connect to an outdoor antenna with fixed length cables. Neither do repeaters need to be synchronized. Each repeater retransmits the GPS signals continuously to the indoor receivers without sequential switching. Assume more than one satellite is visible to four or more repeaters. At a measuring time instance, the range from a repeater to the user receiver is identical for any travelling satellite signal, which is repeated by this repeater. Incorporating this feature and comparing the ranges measured by means of repeated signals of different satellites, the receiver is able to identify the repeater, which repeats a given satellite signal. With the known coordinates of the identified repeaters and the ranges from repeaters to the receiver, then the receiver position can be found. To compromise the impact of the repeater signal processing time difference on positioning accuracy, this work proposes two methods to calculate the receiver position and fuses the results by Kalman filter. Furthermore, considering the general indoor positioning environments, altitudes of floors of a building are utilized to assist in improving the positioning performance. Simulation results with true repeater coordinate data are provided to verify the proposed approach. [ABSTRACT FROM AUTHOR]

This paper presents a type of bandpass filter (BPF)-integrated single-pole double-throw (SPDT) switch using common shorted stepped-impedance resonator technique. The BPF-integrated ON-state with reverse-biased p-i-n diodes can be synthesized by classical coupled-resonator filter design theory, and the OFF-state with forward-biased p-i-n diodes is detuned which exhibits high OFF-state suppression (OSS). The transmission zeros due to the direct coupled feed, the cross-couplings and the cancelling effect of mixed electric and magnetic coupling are produced to improve the ON-state passband selectivity significantly. As examples, the third-order/fourth-order BPF-integrated SPDT switches at center frequency $f_{0} = 1$ GHz with ripple bandwidth of 110/100 MHz are designed, which show low insertion losses of 1.08/1.58 dB, sharp skirts, high roll-off rate of sidebands, high OSSs of 40.9/40.1 dB as well as high port-to-port isolation of 57.4/47.8 dB. Then, the switched 50- $\Omega $ matching circuits are in series with two output ports of above BPF-integrated SPDT switches, resulting in the absorptive OFF-state. The fabricated third-order/fourth-order BPF-integrated SPDT switches with absorptive OFF-state have the matched return losses of 30/28.2 dB, and their OSSs and port-to-port isolations are also improved. [ABSTRACT FROM AUTHOR]

In the study of resistive random access memory using GeTeOx film as the switching layer, the device performed excellent property of bipolar resistive switching (BRS), which could be gradually transformed to the complementary resistive switching (CRS) by varying SET process current compliance. The conductive filament conduction mechanism of BRS could be verified by electrical characteristics and reliable data fitting. Through increasing current compliance of the SET process, CRS could be achieved due to higher activity of oxygen vacancies originated from the intensified thermal effect. This paper was beneficial to understand the switching mechanisms of BRS and CRS and provide a method to realize interconversion. Moreover, it was also a potential and promising device to be applied in the neurosynaptic biomimetic field. [ABSTRACT FROM AUTHOR]

Class-E RF power amplifiers (PAs) are very power efficient under nominal operating conditions. Due to incorporating two tuned tanks, the dependence on the load impedance is, however, relatively large, resulting in, e.g., load-dependent output power, power efficiency, peak voltages, and peak (and average) currents which can lead to reliability issues. This paper presents load–pull analyses for class-E RF PAs from a mathematical perspective, with analyses and discussions of the effects of the most common nonidealities of class-E PAs: the limited loaded quality factor ($Q_{\mathrm {loaded}}$) of the series filter, switch ON-resistance, the limited quality factor of the dc-feed inductor, load mismatch-dependent switch conduction loss, and the limited negative voltage excursions (due to, e.g., the reverse conduction of the switch transistor for negative voltage excursions). The theoretical findings are backed up by extensive circuit simulations and load–pull measurements of a class-E PA implemented in 65-nm CMOS technology. The PA provides 18.1-dBm output power and 72% efficiency at 1.4 GHz under nominal operating condition employing an off-chip matching network. [ABSTRACT FROM AUTHOR]

Common-mode voltage (CMV) is known as a major cause of premature motor failures. The form and amplitude of the CMV generated by any converter depends on both the circuit topology and modulation technique. Among single stage ac–ac converters employed in drive applications, the Z-source ultra sparse matrix converter (ZSUSMC) is a desirable choice due to reduced number of switches in its structure and voltage boosting capability. Based on these considerations, this paper aims to: 1) theoretically determine and compare the CMV of the ZSUSMC with four well-known impedance networks, namely, cascaded, switched-inductor, quasi, and series, in its structure and 2) propose modulation techniques for CMV reduction in the ZSUSMCs. To this end, first, it is shown that the ZSUSMC, depending on the impedance network used in its structure, provides more freedom to choose from redundant switching states compared to the ultra sparse matrix converter. Then, by taking advantage of this feature, novel modulation strategies that attenuate the CMV without affecting the boosting capability are developed. The proposed modulation schemes are based on avoiding the switching states most contributing to the CMV during a switching period. Through hardware-in-the-loop studies, the effectiveness of the proposed modulation strategies in reducing the CMV of the ZSUSMCs is verified. [ABSTRACT FROM AUTHOR]

As technology node scales down below 90 nm, the conventional complementary metal oxide semiconductor (CMOS) logic circuits suffer from various problems such as high standby power due to increase in leakage current. Spintronic devices based on magnetic tunnel junction (MTJ) is one of the most promising technology candidates for the future of the digital circuits. MTJ-based logic circuits can offer nonvolatility, high endurance, high density, low standby power dissipation, and 3-D integration capability with the CMOS technology. In recent years, several full-adder circuits are proposed based on MTJs that are not fully nonvolatile since they use MTJs to store only one of their inputs. This paper proposes a fully nonvolatile magnetic full-adder (MFA) circuit offering the capability of power gating with no loss of data. The proposed circuit stores all the inputs in MTJs using the spin-transfer torque (STT) method assisted by the spin-Hall effect (SHE). Thanks to the SHE assistance, delay and power consumption of the MTJ switching are reduced significantly. Moreover, as a result of lower write current, the endurance of the oxide barrier can be increased. Using a three-terminal SHE–STT–MTJ model and a 45 nm CMOS SPICE model, we simulated and validated the functionality of our design and compared it with some recent previous MFAs. Simulation results reveal that the proposed MFA offers considerable superiorities over the recent counterparts. [ABSTRACT FROM AUTHOR]

Recent years have seen significant advances in supercapacitor-based applications in portable electronics, where the switching resistor circuit acts as a common cell balancing circuit when charging the supercapacitors. However, existing charging control methods suffer from low energy efficiency, leading to considerable energy loss, and thermal heating. In this paper, we propose a state-of-health (SoH)-aware energy-efficient charging method to maximize the energy efficiency of supercapacitors during the charging process. First, we provide a sufficient and necessary condition to maximize the energy efficiency. Then, an online SoH estimation algorithm is designed to estimate capacitance and balancing resistance in real time. Thereafter, an SoH-aware energy-efficient charging algorithm is further proposed to be implemented in microcontrollers. A charger prototype has been built to verify the effectiveness of the proposed charging algorithm. Extensive simulation and experiment results show that the energy efficiency of the proposed design is improved considerably when compared with existing methods. [ABSTRACT FROM AUTHOR]

Although high-frequency circulating current exists in parallel-operated inverters, it has not attracted as much attention as low-frequency circulating current, and thus has not been analyzed in detail previously. In this paper, a mathematical model and analysis are presented, which reveal the spectrum components and their changing trends of the circulating currents caused by carrier phase differences. The impact of carrier phase difference on high-frequency circulating current is also analyzed and verified. A closed-loop control scheme is proposed to suppress the switching frequency circulating current caused by carrier phase difference. In addition, the deadbeat and closed-loop control are combined to suppress the low- and high-frequency circulating currents simultaneously, to improve the overall performance of circulating current suppression. The effectiveness of the proposed scheme is verified by the simulation and experimental results acquired from a laboratory platform. [ABSTRACT FROM AUTHOR]

In this paper, we present a smart capsule that can release its payload after a predetermined/adjustable delay subsequent to passing from the stomach into the small intestine. The described capsule (9 mm × 22 mm) comprises a pH-sensitive hydrogel-based switch, an electronic compartment containing a capacitor charged to 2.7 V, and a drug reservoir capped by a taut fusible thread intertwined with a nichrome wire. The nichrome wire, capacitor, and pH-responsive electrical switch are connected in series. The pH transition the capsule encounters when it enters the small intestine triggers controlled swelling of the pH-responsive hydrogel, which pushes a conductive elastic membrane to close an electrical switch. This initiates a sequence of events, i.e., the discharge of the capacitor, heating the nichrome wire, breakage of the fusible thread, and release of the payload stored in the capsule reservoir through the unlatched cap. The time lag between initiation of hydrogel swelling (by the near-neutral pH of the small intestine) and payload release is controlled by the deflection of the conductive elastic membrane and the gap separating the contacts. The release time can be set to within ±5 min after one hour in the small intestine (start of the swelling) increasing to ±40 min after 4 h. [ABSTRACT FROM AUTHOR]

Superconducting inductive pulsed power supplies have attracted a lot of attention due to its lower electrical loss and higher energy storage density than traditional inductors. To effectively improve charging rate and output continuous current pulses, a repetitive inductive pulsed power supply circuit topology based on high-temperature superconducting (HTS) pulsed power transformer was proposed and simulated in our previous studies. This paper aims to further study the feasibility of the repetitive inductive pulsed power supply circuit topology through experiments. A small air-core HTS pulsed power transformer and a bridge-type capacitor switching circuit were used to build the experimental platform. The experimental results show that the bridge-type capacitor switching circuit can shorten the charging time of each new cycle and the repetitive inductive pulsed power supply circuit is feasible for continuous current pulse output. [ABSTRACT FROM AUTHOR]

In this paper, we propose a novel technique of realizing discrete-time (D-T) signal amplification using Nano-Electro-Mechanical systems (NEMS). The amplifier uses mechanical switches instead of traditional solid-state devices and acts as an inherent sample and hold amplifier. The proposed NEMS D-T amplifier operates on a wide dynamic range of signals without consuming the dc power. Moreover, the proposed amplifier does not suffer from the leakage current and the nonlinearity associated with the sampling ohmic switch. As a proof of concept, the proposed NEMS D-T amplifier is demonstrated in circuit simulations using the calibrated verilog-A models of the NEMS device. The simulated amplifier achieves a gain of ~5, handles the maximum differential input signal of 0.65 V, and consumes only $0.6~\mu \text{W}$ of power for a sampling frequency of 100 kHz. The nonidealities present in the proposed amplifier are highlighted and possible ways to overcome them are discussed. Finally, the design considerations required for the NEMS D-T amplifier are described. [ABSTRACT FROM AUTHOR]

Self-powered realization for synchronous switching circuits is a hot spot for piezoelectric vibration energy harvesting. Two typical kinds of switches, bipolar junction transistor (BJT) or metal–oxide semiconductor field effect transistor (MOSFET) are popularly used without a clear understanding about the performance difference. In this paper, comparative investigations about adopting these two types of switches based on a case study are performed. It is determined that the performance difference comes from three aspects: the gate parasitic capacitance, the turning-on threshold, and the driven mechanism. In particular, the third one imposes a critical influence on the performance. Investigations are performed on the self-powered synchronous switching circuit of two possible methods: with electronic breakers or with external control units. The results from simulations and experiments show that the current-driven mechanism limits the available performance in the case of the BJT switch in comparison with the case of the MOSFET switch. The difference is especially obvious for the cases of large piezoelectric capacitance and open-circuit voltage. A preliminary design guideline is concluded that the MOSFET is probably a better choice with the same voltage and current ratings in most cases. [ABSTRACT FROM AUTHOR]

The figure of merit (FOM) of a semiconductor device represents an important quality as it pertains to its performance limits and is often used to drive the technology development in a specific direction. Comparing the performances of switching power MOSFETs using their FOMs has become ubiquitous practice in power semiconductor and power electronics industries. In this paper, a critical review of the proposed power MOSFET FOMs is presented, and key limitations are discussed. It is shown that the quality factor ${Q}_{F2}={(}{\lambda {E}_{c}}/{R_{ \mathrm{\scriptscriptstyle ON},\textsf {sp}}}{)}$ along with ${Q}_{G}$ and ${T}_{j\textsf {max}}$ may be used to guide the development of future generations of power semiconductor device technologies for power electronics switching applications, where $\lambda $ and ${E}_{c}$ are the thermal conductivity and critical electric field strength for the avalanche breakdown of the semiconductor material, respectively, ${R}_{ \mathrm{\scriptscriptstyle ON},\textsf {sp}}$ is the specific on-state electrical resistance, ${Q}_{G}$ is the gate charge, and ${T}_{j\textsf {max}}$ is the maximum junction temperature of the semiconductor power device, respectively. [ABSTRACT FROM AUTHOR]

The neutral-point potential fluctuation in single-phase three-level rectifiers leads to coupling between the line current regulation and dc-link capacitor voltage balancing, deteriorating waveform quality of the line current. For addressing this issue, this paper proposes a low-complexity model predictive current control (MPCC) with constant switching frequency, which achieves a decoupling control of the line current and the neutral-point potential under the unbalanced load condition. The switching frequency is fixed by combining the MPCC scheme with predefined switching sequences. The boundary of the durations for voltage vectors in switching sequences is presented to balance the capacitor voltage without worsening the line current quality. The optimal switching sequence and the corresponding optimal durations of voltage vectors in the switching sequence are readily derived without the assessment of the cost function, which dramatically simplifies the complexity of the MPCC scheme. Finally, simulations and experimental results are conducted to verify the effectiveness of the proposed MPCC scheme. [ABSTRACT FROM AUTHOR]

Flyback/forward derived power converters offer operational simplicity, but require active clamping circuits to reduce switch voltage stress and improve the converter efficiency. This paper presents an active clamping circuit technique, which additionally ensures enhancement in the converter voltage gain. This is enabled by the proposed auxiliary circuit, which introduces a charged capacitor in series with the primary source during the energizing interval. Two circuits are designed on this principle, and design and operation of both are presented for discontinuous conduction modes. It is shown that the voltage gain of these circuits increases with increase in the leakage inductance, which is an improvement over existing converters. Also, in one circuit primary (secondary) winding, rms current is similar to (lower than) that in a typical ideal flyback converter, leading to improvement in power density. Operation and analyses of this variant are experimentally verified with a 400-V laboratory prototype. [ABSTRACT FROM AUTHOR]

In this paper, we demonstrate the linear conductance-change characteristics of a conductive-bridging RAM (CBRAM) to be employed as an artificial synapse device in neuromorphic systems. The CBRAM with a bilayer electrolyte structure (${\mathrm {Cu/Cu}}_{{2}-{x}}\text{S}$ / $\mathrm {WO}_{{3}-{x}}$ /W) exhibits analog switching behavior during the depression process due to the well-controlled dissolution of the conductive filament. To analyze the origin of this motion, we investigate the effective voltage applied to $\mathrm {Cu}_{{2}-{x}}\text{S}$ and $\mathrm {WO}_{{3}-{x}}$. Our findings reveal that $\mathrm {Cu}_{{2}-{x}}\text{S}$ , acting as a voltage divider, helps in suppressing the large voltage drop in $\mathrm {WO}_{{3}-{x}}$ , where the formation/dissolution of filament occurs. Furthermore, due to the diode-like characteristics of $\mathrm {Cu}_{{2}-{x}}\text{S}$ and the division of voltage drop between $\mathrm {WO}_{{3}-{x}}$ and $\mathrm {Cu}_{{2}-{x}}\text{S}$ , an optimum programming energy is applied to $\mathrm {WO}_{{3}-{x}}$ during the depression process. This leads to linear conductance-change characteristics under identical pulses. However, abrupt conductance-change characteristics are observed during the potentiation process. Thus, we use only the device characteristics of the depression part for the neuromorphic system. An excellent classification accuracy is achieved due to the linear conductance-change characteristics and optimized pulse conditions. [ABSTRACT FROM AUTHOR]

The accurate calculation of switching voltage (${V}_{s}$) is necessary for the reliable and low-power operation of monolithic 3-D (M3D) CMOS-nanoelectromechanical (NEM) hybrid reconfigurable logic circuits because ${V}_{s}$ corresponds to the operating voltage (${V}_{\text {dd}}$) of NEM memory switches. In this paper, based on the Euler–Bernoulli equation, the physics-based analytical model is proposed to determine ${V}_{s}$. The accuracy of the proposed model is verified by both the finite-element analysis and experimental results. Our proposed model shows >3% error compared with experimental data. Also, the design guidelines of NEM memory switches are presented in terms of minimum ${V}_{s}$ (${V}_{s\_{}{m}}$) and device dimensions. [ABSTRACT FROM AUTHOR]

Power usage reduction and efficiency enhancement of measurement devices are a major challenge in self-powered wireless sensor nodes and also sensors implanted in the human body. Such instruments should be usually operated using the limited environmental energy resources. Electrochemical sensors and potentiostats are extensively used in this context for the measurement of chemical components. In these cases, a lot of research has focused on internal processing blocks power reduction of the potentiostat circuit. In this paper, a discrete current mode (DCM) switching potentiostat is presented, which can significantly reduce the static power usage at the output stage of the potentiostat compared with linear output stage counterparts. Using time-domain analyses, the unexpected oscillatory behavior of a continuous current mode (CCM) output stage switching potentiostat is investigated. Consecutively, it is shown that in current fabrication processes, this configuration will consume more power than the DCM topology. The correctness of the designs and analyses are shown using both simulation and experimental results. The simulated 0.18- $\mu \text{m}$ CMOS DCM output stage potentiostat has an efficiency of 95% at an output load of $12~\mu \text{A}$ , while the long-channel MOSFET-based prototype implementation shows an efficiency of 64%. [ABSTRACT FROM AUTHOR]

A wide-range soft-switching high-efficiency cycloconverter-type high-frequency-link inverter with dual-phase-shift modulation strategy is proposed in this paper. By adding an auxiliary inductor in primary-side full bridge circuit and adopting center-tapped four-winding transformer structure, the soft-switching range for primary-side switches has been extended. The secondary-side active clamper network is designed to recycle leakage inductor energy, and suppress voltage spikes caused by the resonance of the leakage inductor and the parasitic capacitance of switches. One feature of the proposed inverter is that both the primary-side full-bridge and active clamper network employ phase-shift modulation technique where all switches are driven with nearly 50% duty cycle square signals, hence a simple and reliable transformer-isolated gate drive circuit with small transmission delay is presented. Moreover, all switches in the proposed inverter achieve zero voltage switching, which contributes to higher conversion efficiency as well as higher switching frequency. Analysis, design, and implementation of the proposed inverter are discussed in detail. A 200-kHz laboratory prototype for the high-voltage audio amplifier application is developed and the experimental results are presented to validate the analysis and performance of the proposed inverter. [ABSTRACT FROM AUTHOR]

Zero-missing is a phenomenon in shunt-compensated cable systems, in which the current through the line breaker does not cross the zero point for several cycles. This paper deals with a thorough investigation on countermeasures of the zero-missing phenomenon in transmission systems and determines the requirements, benefits, and risks of applying each method. The effectiveness of countermeasures is studied on a simulated cable project with different cable lengths in an actual grid model of the Dutch 380 kV transmission system. Results are analyzed based on three criteria related to the IEC standards and the Dutch grid code. In addition, the switching sequence of circuit breakers is specified to maximize the effectiveness of the countermeasures. A statistical switching analysis is performed for the insulation coordination study since the application of some countermeasures increases the probability of high transient switching overvoltages. Moreover, the closing variation threshold of circuit breakers is calculated as a function of the circuit impedance and the shunt compensation degree. [ABSTRACT FROM PUBLISHER]

This paper presents a $K$ -band 4-bit phase shifter using micro-electromechanical system-based dc contact single-pole-sixteen-throw (SP16T) switching networks. The circuit is fabricated on 635- $\mu \text{m}$ alumina substrate using surface micromachining process. Compact circular type SP16T switch is the primary functional building block of the 4-bit phase shifter. SP16T switch demonstrates an average insertion loss of ~1.9 dB, isolation of better than 14 dB and average return loss of better than 14 dB in the 18–26-GHz band. Total area of the fabricated SP16T switch is only ~2.5 mm2. Finally, two SP16T switches are cascaded with different delay lines to develop the complete 4-bit phase shifter. The 4-bit phase shifter demonstrates an average insertion loss of 3.47 dB in the 19.75–20.25-GHz band with a return loss of better than 14 dB and average phase error is less than ~1.77 °at 20 GHz. Total area of the fabricated 4-bit phase shifter is ~13.5 mm2. The reliability of the SPST and SP16T switches show more than 1 billion (B) cycles with an RF power of 0.1–1 W. Finally, device demonstrates >1 B cycles with cold switched and >~600 million cycles with hot switched conditions. To the best of our knowledge, this is the first reported high reliable and more compact MEMS 4-bit phase shifter in the literature that has undergone extensive measurement stages with minimum number of switching elements per phase state. [2018-0014] [ABSTRACT FROM AUTHOR]

In this paper, a new plasma-based high-power microwave single-pole single-throw (SPST) switch is introduced and experimentally investigated. This switch is composed of a two-pole evanescent-mode cavity structure loaded with two gas discharge tubes over its posts. Since part of the energy required for the tubes ignition is supplied by the incoming electromagnetic waves, the switching mechanism is quasi absorptive. A prototype SPST switch at the frequency range of 2.8–3.9 GHz is fabricated and successfully examined over the power range of 2–20 W. With less than 1 dB of insertion loss, the ON/OFF isolation varies from 13 to 22 dB, depending on the input power. The measured switching time was on the order of tens of nanoseconds, and the input third-order intercept point that characterizes linearity was +53 dBm. Upon ignition, the microwave-sustained plasma in the switch operates in the $\alpha $ -discharge regime, ensuring that the switch performance is quite stable, with no degradation after long periods of operation. [ABSTRACT FROM AUTHOR]

In dc microgrid (MG) systems, energy storage systems (ESSs) capable of short- or long-term energy buffering are indispensable for energy management and providing high-quality electric energy. The MG should be able to operate in both islanded and grid-connected modes. A sudden failure of ac utility grids can lead to an inoperable condition of the MG or a large transient phenomenon accompanied by oscillation and overshoot during the mode transition. This paper proposes a control scheme of the bidirectional dc–dc converter for the ESS to resolve the issue associated with mode switching. The proposed control scheme provides autonomous and smooth mode switching, thereby reducing the reliance on the communication with the central controller, and enhancing the reliability of the system. To validate the proposed concept, simulation results and experimental results are provided. [ABSTRACT FROM AUTHOR]

Pulse generator in an ultrasound system produces electrical pulsing signals to drive piezoelectric transducer, which causes mechanical vibration of the crystals and generates sound waves. Different from conventional imaging short pulses, high-power ultrasonic system for therapeutic applications requires MHz pulses bursts of up to tens of milliseconds. The capability of switching high voltage (±90 V) at multi-MHz, delivering effective power efficiently, is crucial for practical systems. The advantages of low device loss at high switching frequency, and high power density make gallium nitride (GaN) high electron mobility transistors better devices than traditional silicon (Si) MOSFETs in such system. The GaN-based high-frequency transformer push–pull inverter presented in this paper is capable to produce high energy pulsating output with burst pulse length up to 50 ms and bipolar pulse amplitude of 180 Vpp. The maximum pulse frequency can be up to 10 MHz. The peak output power is 90 W with power density of 50.85 W/in2. The peak power for all the 128 pulser channels reaches up to 11.5 KW with average power of 192 W. This is the highest output power for pulse drivers that have been reported. A novel power transistor based RF switch circuit is also proposed in this design as the interface between image signal, high power signal, and return signal. [ABSTRACT FROM AUTHOR]

In this paper, a novel platform for the single phase switched-capacitor multilevel inverters (SCMLIs) is presented. It has several advantages over the classical topologies, such as an appropriate boosting property, higher efficiency, lower number of required dc voltage sources, and other accompanying components with less complexity and lower cost. The basic structure of the proposed converter is capable of making nine-level of the output voltage under different kinds of loading conditions. Hereby, by using the same two capacitors paralleled to a single dc source, a switched-capacitor (SC) cell is made that contributes to boosting the value of the input voltage. In this case, the balanced voltage of the capacitors can be precisely provided on the basis of the series–parallel technique and the redundant switching states. Afterward, to reach the higher number of output voltage levels, two suggested SC cells are connected to each other with a new extended configuration. Therefore, by the use of a reasonable number of required power electronic devices, and also by utilizing only two isolated dc voltage sources, which their magnitudes can be designed based on either symmetric or asymmetric types, a 17- and 49-level of the output voltage are obtained. Based on the proposed extended configuration, a new generalized version of SCMLIs is also derived. To confirm the precise performance of the proposed topologies, apart from the theoretical analysis and a complete comparison, several simulation and experimental results are also given. [ABSTRACT FROM AUTHOR]

This paper proposes a new isolated single-stage single-switch power-factor-correction (S4 PFC) driver for supplying light-emitting diodes (LEDs) without electrolytic capacitor. In the proposed LED driver, the switch turns on under zero current switching (ZCS) condition. Also, it turns on at a voltage less than its nominal voltage stress, and therefore, the switch capacitive turn-on loss decreases too much extent. The leakage energy is absorbed, so there are no voltage spikes across the switch when the switch turns off. In this paper, operating principles of the proposed driver are discussed, and design considerations are presented. Also, a laboratory prototype for supplying a 21 W/30 V LED module from 220 Vrms/50\,\rm Hz ac mains is implemented, and experimental results are presented to verify the theoretical analysis. [ABSTRACT FROM PUBLISHER]